2 * Copyright 2014 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
9 #include <power/pmic.h>
10 #include <power/pfuze100_pmic.h>
12 #ifndef CONFIG_DM_PMIC_PFUZE100
13 int pfuze_mode_init(struct pmic *p, u32 mode)
15 unsigned char offset, i, switch_num;
19 pmic_reg_read(p, PFUZE100_DEVICEID, &id);
24 offset = PFUZE100_SW1CMODE;
27 offset = PFUZE100_SW2MODE;
29 printf("Not supported, id=%d\n", id);
33 ret = pmic_reg_write(p, PFUZE100_SW1ABMODE, mode);
35 printf("Set SW1AB mode error!\n");
39 for (i = 0; i < switch_num - 1; i++) {
40 ret = pmic_reg_write(p, offset + i * SWITCH_SIZE, mode);
42 printf("Set switch 0x%x mode error!\n",
43 offset + i * SWITCH_SIZE);
51 struct pmic *pfuze_common_init(unsigned char i2cbus)
57 ret = power_pfuze100_init(i2cbus);
61 p = pmic_get("PFUZE100");
66 pmic_reg_read(p, PFUZE100_DEVICEID, ®);
67 printf("PMIC: PFUZE100 ID=0x%02x\n", reg);
69 /* Set SW1AB stanby volage to 0.975V */
70 pmic_reg_read(p, PFUZE100_SW1ABSTBY, ®);
71 reg &= ~SW1x_STBY_MASK;
73 pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
75 /* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
76 pmic_reg_read(p, PFUZE100_SW1ABCONF, ®);
77 reg &= ~SW1xCONF_DVSSPEED_MASK;
78 reg |= SW1xCONF_DVSSPEED_4US;
79 pmic_reg_write(p, PFUZE100_SW1ABCONF, reg);
81 /* Set SW1C standby voltage to 0.975V */
82 pmic_reg_read(p, PFUZE100_SW1CSTBY, ®);
83 reg &= ~SW1x_STBY_MASK;
85 pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
87 /* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
88 pmic_reg_read(p, PFUZE100_SW1CCONF, ®);
89 reg &= ~SW1xCONF_DVSSPEED_MASK;
90 reg |= SW1xCONF_DVSSPEED_4US;
91 pmic_reg_write(p, PFUZE100_SW1CCONF, reg);