2 * Copyright 2015-2016 Freescale Semiconductor, Inc.
5 * SPDX-License-Identifier:GPL-2.0+
15 #include <asm/types.h>
16 #include <fsl_dtsec.h>
17 #include <asm/arch/soc.h>
18 #include <asm/arch-fsl-layerscape/config.h>
19 #include <asm/arch-fsl-layerscape/immap_lsch2.h>
20 #include <asm/arch/fsl_serdes.h>
21 #include <net/pfe_eth/pfe_eth.h>
22 #include <dm/platform_data/pfe_dm_eth.h>
25 #define DEFAULT_PFE_MDIO_NAME "PFE_MDIO"
27 static inline void ls1012ardb_reset_phy(void)
29 /* Through reset IO expander reset both RGMII and SGMII PHYs */
30 i2c_reg_write(I2C_MUX_IO2_ADDR, 6, __PHY_MASK);
31 i2c_reg_write(I2C_MUX_IO2_ADDR, 2, __PHY_ETH2_MASK);
33 i2c_reg_write(I2C_MUX_IO2_ADDR, 2, __PHY_ETH1_MASK);
35 i2c_reg_write(I2C_MUX_IO2_ADDR, 2, 0xFF);
39 int pfe_eth_board_init(struct udevice *dev)
43 struct pfe_mdio_info mac_mdio_info;
44 struct pfe_eth_dev *priv = dev_get_priv(dev);
47 ls1012ardb_reset_phy();
48 mac_mdio_info.reg_base = (void *)EMAC1_BASE_ADDR;
49 mac_mdio_info.name = DEFAULT_PFE_MDIO_NAME;
51 bus = pfe_mdio_init(&mac_mdio_info);
53 printf("Failed to register mdio\n");
59 pfe_set_mdio(priv->gemac_port,
60 miiphy_get_dev_by_name(DEFAULT_PFE_MDIO_NAME));
62 if (!priv->gemac_port) {
64 pfe_set_phy_address_mode(priv->gemac_port, EMAC1_PHY_ADDR,
65 PHY_INTERFACE_MODE_SGMII);
68 pfe_set_phy_address_mode(priv->gemac_port, EMAC2_PHY_ADDR,
69 PHY_INTERFACE_MODE_RGMII_TXID);
74 static struct pfe_eth_pdata pfe_pdata0 = {
75 .pfe_eth_pdata_mac = {
76 .iobase = (phys_addr_t)EMAC1_BASE_ADDR,
81 .ddr_pfe_baseaddr = (void *)CONFIG_DDR_PFE_BASEADDR,
82 .ddr_pfe_phys_baseaddr = CONFIG_DDR_PFE_PHYS_BASEADDR,
86 static struct pfe_eth_pdata pfe_pdata1 = {
87 .pfe_eth_pdata_mac = {
88 .iobase = (phys_addr_t)EMAC2_BASE_ADDR,
93 .ddr_pfe_baseaddr = (void *)CONFIG_DDR_PFE_BASEADDR,
94 .ddr_pfe_phys_baseaddr = CONFIG_DDR_PFE_PHYS_BASEADDR,
98 U_BOOT_DEVICE(ls1012a_pfe0) = {
100 .platdata = &pfe_pdata0,
103 U_BOOT_DEVICE(ls1012a_pfe1) = {
105 .platdata = &pfe_pdata1,