2 * (C) Copyright 2000-2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
6 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #include <asm/immap.h>
32 DECLARE_GLOBAL_DATA_PTR;
34 #if defined(CONFIG_CMD_NAND)
36 #include <linux/mtd/mtd.h>
39 #define CLR_CLE ~SET_CLE
41 #define CLR_ALE ~SET_ALE
43 static void nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
45 struct nand_chip *this = mtdinfo->priv;
46 /* volatile fbcs_t *fbcs = (fbcs_t *) MMAP_FBCS; TODO: handle wp */
47 u32 nand_baseaddr = (u32) this->IO_ADDR_W;
49 if (ctrl & NAND_CTRL_CHANGE) {
50 if ( ctrl & NAND_CLE )
51 nand_baseaddr |= SET_CLE;
53 nand_baseaddr &= CLR_CLE;
54 if ( ctrl & NAND_ALE )
55 nand_baseaddr |= SET_ALE;
57 nand_baseaddr &= CLR_ALE;
59 this->IO_ADDR_W = (void __iomem *)(nand_baseaddr);
61 if (cmd != NAND_CMD_NONE)
62 writeb(cmd, this->IO_ADDR_W);
65 static void nand_write_byte(struct mtd_info *mtdinfo, u_char byte)
67 struct nand_chip *this = mtdinfo->priv;
68 *((volatile u8 *)(this->IO_ADDR_W)) = byte;
71 static u8 nand_read_byte(struct mtd_info *mtdinfo)
73 struct nand_chip *this = mtdinfo->priv;
74 return (u8) (*((volatile u8 *)this->IO_ADDR_R));
77 static int nand_dev_ready(struct mtd_info *mtdinfo)
82 int board_nand_init(struct nand_chip *nand)
84 volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
86 *((volatile u16 *)CONFIG_SYS_LATCH_ADDR) |= 0x0004;
88 /* set up pin configuration */
89 gpio->par_timer &= ~GPIO_PAR_TIN3_TIN3;
90 gpio->pddr_timer |= 0x08;
91 gpio->ppd_timer |= 0x08;
92 gpio->pclrr_timer = 0;
95 nand->chip_delay = 50;
96 nand->ecc.mode = NAND_ECC_SOFT;
97 nand->cmd_ctrl = nand_hwcontrol;
98 nand->read_byte = nand_read_byte;
99 nand->write_byte = nand_write_byte;
100 nand->dev_ready = nand_dev_ready;