2 * Copyright 2009 Freescale Semiconductor, Inc.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * Version 2 as published by the Free Software Foundation.
12 #include <asm/fsl_ddr_sdram.h>
13 #include <asm/fsl_ddr_dimm_params.h>
16 get_spd(ddr3_spd_eeprom_t *spd, unsigned char i2c_address)
18 i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr3_spd_eeprom_t));
21 void fsl_ddr_get_spd(ddr3_spd_eeprom_t *ctrl_dimms_spd,
22 unsigned int ctrl_num)
25 unsigned int i2c_address = 0;
27 for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
28 if (ctrl_num == 0 && i == 0)
29 i2c_address = SPD_EEPROM_ADDRESS1;
30 if (ctrl_num == 0 && i == 1)
31 i2c_address = SPD_EEPROM_ADDRESS2;
32 get_spd(&(ctrl_dimms_spd[i]), i2c_address);
36 void fsl_ddr_board_options(memctl_options_t *popts,
38 unsigned int ctrl_num)
41 * Factors to consider for clock adjust:
42 * - number of chips on bus
47 * This needs to be determined on a board-by-board basis.
51 popts->clk_adjust = 4;
54 * Factors to consider for CPO:
58 popts->cpo_override = 0xff;
61 * Factors to consider for write data delay:
71 popts->write_data_delay = 2;
74 * Enable half drive strength
76 popts->half_strength_driver_enable = 1;
78 /* Write leveling override */
80 popts->wrlvl_override = 1;
81 popts->wrlvl_sample = 0xa;
82 popts->wrlvl_start = 0x4;
84 /* Rtt and Rtt_W override */
85 popts->rtt_override = 1;
86 popts->rtt_override_value = DDR3_RTT_60_OHM;
87 popts->rtt_wr_override_value = 0; /* Rtt_WR= dynamic ODT off */