]> git.sur5r.net Git - u-boot/blob - board/gdsys/common/ioep-fpga.c
8e105012479999f46715c7b19ed1b752bc017f4c
[u-boot] / board / gdsys / common / ioep-fpga.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2014
4  * Dirk Eibach,  Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
5  */
6
7 #include <common.h>
8
9 #include <gdsys_fpga.h>
10
11 enum {
12         UNITTYPE_MAIN_SERVER = 0,
13         UNITTYPE_MAIN_USER = 1,
14         UNITTYPE_VIDEO_SERVER = 2,
15         UNITTYPE_VIDEO_USER = 3,
16 };
17
18 enum {
19         UNITTYPEPCB_DVI = 0,
20         UNITTYPEPCB_DP_165 = 1,
21         UNITTYPEPCB_DP_300 = 2,
22         UNITTYPEPCB_HDMI = 3,
23 };
24
25 enum {
26         COMPRESSION_NONE = 0,
27         COMPRESSION_TYPE_1 = 1,
28         COMPRESSION_TYPE_1_2 = 3,
29         COMPRESSION_TYPE_1_2_3 = 7,
30 };
31
32 enum {
33         AUDIO_NONE = 0,
34         AUDIO_TX = 1,
35         AUDIO_RX = 2,
36         AUDIO_RXTX = 3,
37 };
38
39 enum {
40         SYSCLK_147456 = 0,
41 };
42
43 enum {
44         RAM_DDR2_32 = 0,
45         RAM_DDR3_32 = 1,
46         RAM_DDR3_48 = 2,
47 };
48
49 enum {
50         CARRIER_SPEED_1G = 0,
51         CARRIER_SPEED_2_5G = 1,
52 };
53
54 bool ioep_fpga_has_osd(unsigned int fpga)
55 {
56         u16 fpga_features;
57         unsigned feature_osd;
58
59         FPGA_GET_REG(0, fpga_features, &fpga_features);
60         feature_osd = fpga_features & (1<<11);
61
62         return feature_osd;
63 }
64
65 void ioep_fpga_print_info(unsigned int fpga)
66 {
67         u16 versions;
68         u16 fpga_version;
69         u16 fpga_features;
70         unsigned unit_type;
71         unsigned unit_type_pcb_video;
72         unsigned feature_compression;
73         unsigned feature_osd;
74         unsigned feature_audio;
75         unsigned feature_sysclock;
76         unsigned feature_ramconfig;
77         unsigned feature_carrier_speed;
78         unsigned feature_carriers;
79         unsigned feature_video_channels;
80
81         FPGA_GET_REG(fpga, versions, &versions);
82         FPGA_GET_REG(fpga, fpga_version, &fpga_version);
83         FPGA_GET_REG(fpga, fpga_features, &fpga_features);
84
85         unit_type = (versions & 0xf000) >> 12;
86         unit_type_pcb_video = (versions & 0x01c0) >> 6;
87         feature_compression = (fpga_features & 0xe000) >> 13;
88         feature_osd = fpga_features & (1<<11);
89         feature_audio = (fpga_features & 0x0600) >> 9;
90         feature_sysclock = (fpga_features & 0x0180) >> 7;
91         feature_ramconfig = (fpga_features & 0x0060) >> 5;
92         feature_carrier_speed = fpga_features & (1<<4);
93         feature_carriers = (fpga_features & 0x000c) >> 2;
94         feature_video_channels = fpga_features & 0x0003;
95
96         switch (unit_type) {
97         case UNITTYPE_MAIN_SERVER:
98         case UNITTYPE_MAIN_USER:
99                 printf("Mainchannel");
100                 break;
101
102         case UNITTYPE_VIDEO_SERVER:
103         case UNITTYPE_VIDEO_USER:
104                 printf("Videochannel");
105                 break;
106
107         default:
108                 printf("UnitType %d(not supported)", unit_type);
109                 break;
110         }
111
112         switch (unit_type) {
113         case UNITTYPE_MAIN_SERVER:
114         case UNITTYPE_VIDEO_SERVER:
115                 printf(" Server");
116                 if (versions & (1<<4))
117                         printf(" UC");
118                 break;
119
120         case UNITTYPE_MAIN_USER:
121         case UNITTYPE_VIDEO_USER:
122                 printf(" User");
123                 break;
124
125         default:
126                 break;
127         }
128
129         if (versions & (1<<5))
130                 printf(" Fiber");
131         else
132                 printf(" CAT");
133
134         switch (unit_type_pcb_video) {
135         case UNITTYPEPCB_DVI:
136                 printf(" DVI,");
137                 break;
138
139         case UNITTYPEPCB_DP_165:
140                 printf(" DP 165MPix/s,");
141                 break;
142
143         case UNITTYPEPCB_DP_300:
144                 printf(" DP 300MPix/s,");
145                 break;
146
147         case UNITTYPEPCB_HDMI:
148                 printf(" HDMI,");
149                 break;
150         }
151
152         printf(" FPGA V %d.%02d\n       features:",
153                fpga_version / 100, fpga_version % 100);
154
155
156         switch (feature_compression) {
157         case COMPRESSION_NONE:
158                 printf(" no compression");
159                 break;
160
161         case COMPRESSION_TYPE_1:
162                 printf(" compression type1(delta)");
163                 break;
164
165         case COMPRESSION_TYPE_1_2:
166                 printf(" compression type1(delta), type2(inline)");
167                 break;
168
169         case COMPRESSION_TYPE_1_2_3:
170                 printf(" compression type1(delta), type2(inline), type3(intempo)");
171                 break;
172
173         default:
174                 printf(" compression %d(not supported)", feature_compression);
175                 break;
176         }
177
178         printf(", %sosd", feature_osd ? "" : "no ");
179
180         switch (feature_audio) {
181         case AUDIO_NONE:
182                 printf(", no audio");
183                 break;
184
185         case AUDIO_TX:
186                 printf(", audio tx");
187                 break;
188
189         case AUDIO_RX:
190                 printf(", audio rx");
191                 break;
192
193         case AUDIO_RXTX:
194                 printf(", audio rx+tx");
195                 break;
196
197         default:
198                 printf(", audio %d(not supported)", feature_audio);
199                 break;
200         }
201
202         puts(",\n       ");
203
204         switch (feature_sysclock) {
205         case SYSCLK_147456:
206                 printf("clock 147.456 MHz");
207                 break;
208
209         default:
210                 printf("clock %d(not supported)", feature_sysclock);
211                 break;
212         }
213
214         switch (feature_ramconfig) {
215         case RAM_DDR2_32:
216                 printf(", RAM 32 bit DDR2");
217                 break;
218
219         case RAM_DDR3_32:
220                 printf(", RAM 32 bit DDR3");
221                 break;
222
223         case RAM_DDR3_48:
224                 printf(", RAM 48 bit DDR3");
225                 break;
226
227         default:
228                 printf(", RAM %d(not supported)", feature_ramconfig);
229                 break;
230         }
231
232         printf(", %d carrier(s) %s", feature_carriers,
233                feature_carrier_speed ? "2.5Gbit/s" : "1Gbit/s");
234
235         printf(", %d video channel(s)\n", feature_video_channels);
236 }