3 * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #define CH7301_I2C_ADDR 0x75
32 #define PIXCLK_640_480_60 25180000
35 #define BASE_HEIGHT 16
36 #define BUFSIZE (BASE_WIDTH * BASE_HEIGHT)
40 REG_MPC3W_CONTROL = 0x001a,
41 REG_VIDEOCONTROL = 0x0042,
42 REG_OSDVERSION = 0x0100,
43 REG_OSDFEATURES = 0x0102,
44 REG_OSDCONTROL = 0x0104,
46 REG_VIDEOMEM = 0x0800,
50 CH7301_CM = 0x1c, /* Clock Mode Register */
51 CH7301_IC = 0x1d, /* Input Clock Register */
52 CH7301_GPIO = 0x1e, /* GPIO Control Register */
53 CH7301_IDF = 0x1f, /* Input Data Format Register */
54 CH7301_CD = 0x20, /* Connection Detect Register */
55 CH7301_DC = 0x21, /* DAC Control Register */
56 CH7301_HPD = 0x23, /* Hot Plug Detection Register */
57 CH7301_TCTL = 0x31, /* DVI Control Input Register */
58 CH7301_TPCP = 0x33, /* DVI PLL Charge Pump Ctrl Register */
59 CH7301_TPD = 0x34, /* DVI PLL Divide Register */
60 CH7301_TPVT = 0x35, /* DVI PLL Supply Control Register */
61 CH7301_TPF = 0x36, /* DVI PLL Filter Register */
62 CH7301_TCT = 0x37, /* DVI Clock Test Register */
63 CH7301_TSTP = 0x48, /* Test Pattern Register */
64 CH7301_PM = 0x49, /* Power Management register */
65 CH7301_VID = 0x4a, /* Version ID Register */
66 CH7301_DID = 0x4b, /* Device ID Register */
67 CH7301_DSP = 0x56, /* DVI Sync polarity Register */
70 static void mpc92469ac_calc_parameters(unsigned int fout,
71 unsigned int *post_div, unsigned int *feedback_div)
73 unsigned int n = *post_div;
74 unsigned int m = *feedback_div;
76 unsigned int b = 14745600 / 16;
80 else if (fout < 100339199)
82 else if (fout < 200678399)
87 a = fout * n + (b / 2); /* add b/2 for proper rounding */
95 static void mpc92469ac_set(unsigned int fout)
99 unsigned int bitval = 0;
100 mpc92469ac_calc_parameters(fout, &n, &m);
117 fpga_set_reg(REG_MPC3W_CONTROL, (bitval << 9) | m);
120 static int osd_write_videomem(unsigned offset, u16 *data, size_t charcount)
124 for (k = 0; k < charcount; ++k) {
125 if (offset + k >= BUFSIZE)
127 fpga_set_reg(REG_VIDEOMEM + 2 * (offset + k), data[k]);
133 static int osd_print(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
145 return cmd_usage(cmdtp);
148 x = simple_strtoul(argv[1], NULL, 16);
149 y = simple_strtoul(argv[2], NULL, 16);
150 color = simple_strtoul(argv[3], NULL, 16);
152 charcount = strlen(text);
153 len = (charcount > BUFSIZE) ? BUFSIZE : charcount;
155 for (k = 0; k < len; ++k)
156 buf[k] = (text[k] << 8) | color;
158 return osd_write_videomem(y * BASE_WIDTH + x, buf, len);
164 u16 version = fpga_get_reg(REG_OSDVERSION);
165 u16 features = fpga_get_reg(REG_OSDFEATURES);
169 width = ((features & 0x3f00) >> 8) + 1;
170 height = (features & 0x001f) + 1;
172 printf("OSD: Digital-OSD version %01d.%02d, %d" "x%d characters\n",
173 version/100, version%100, width, height);
175 value = i2c_reg_read(CH7301_I2C_ADDR, CH7301_DID);
177 printf(" Probing CH7301 failed, DID %02x\n", value);
180 i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPCP, 0x08);
181 i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPD, 0x16);
182 i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPF, 0x60);
183 i2c_reg_write(CH7301_I2C_ADDR, CH7301_DC, 0x09);
184 i2c_reg_write(CH7301_I2C_ADDR, CH7301_PM, 0xc0);
186 mpc92469ac_set(PIXCLK_640_480_60);
187 fpga_set_reg(REG_VIDEOCONTROL, 0x0002);
188 fpga_set_reg(REG_OSDCONTROL, 0x0049);
190 fpga_set_reg(REG_XY_SIZE, ((32 - 1) << 8) | (16 - 1));
195 int osd_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
200 u16 buffer[BASE_WIDTH];
203 unsigned count = (argc > 4) ? simple_strtoul(argv[4], NULL, 16) : 1;
205 if ((argc < 4) || (strlen(argv[3]) % 4)) {
206 return cmd_usage(cmdtp);
209 x = simple_strtoul(argv[1], NULL, 16);
210 y = simple_strtoul(argv[2], NULL, 16);
217 memcpy(substr, rp, 4);
219 *wp = simple_strtoul(substr, NULL, 16);
223 if (wp - buffer > BASE_WIDTH)
227 for (k = 0; k < count; ++k) {
228 unsigned offset = y * BASE_WIDTH + x + k * (wp - buffer);
229 osd_write_videomem(offset, buffer, wp - buffer);
236 osdw, 5, 0, osd_write,
237 "write 16-bit hex encoded buffer to osd memory",
238 "pos_x pos_y buffer count\n"
242 osdp, 5, 0, osd_print,
243 "write ASCII buffer to osd memory",
244 "pos_x pos_y color text\n"