2 * (C) Copyright 2003-2004
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
9 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
11 * See file CREDITS for list of people who contributed to this
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
35 static void sdram_start (int hi_addr)
37 long hi_addr_bit = hi_addr ? 0x01000000 : 0;
39 /* unlock mode register */
40 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit;
41 __asm__ volatile ("sync");
43 /* precharge all banks */
44 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
45 __asm__ volatile ("sync");
48 /* set mode register: extended mode */
49 *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_EMODE;
50 __asm__ volatile ("sync");
52 /* set mode register: reset DLL */
53 *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000;
54 __asm__ volatile ("sync");
57 /* precharge all banks */
58 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
59 __asm__ volatile ("sync");
62 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit;
63 __asm__ volatile ("sync");
65 /* set mode register */
66 *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
67 __asm__ volatile ("sync");
69 /* normal operation */
70 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
71 __asm__ volatile ("sync");
76 * ATTENTION: Although partially referenced initdram does NOT make real use
77 * use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE
78 * is something else than 0x00000000.
81 long int initdram (int board_type)
87 /* setup SDRAM chip selects */
88 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001c; /* 512MB at 0x0 */
89 *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x40000000; /* disabled */
90 __asm__ volatile ("sync");
92 /* setup config registers */
93 *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
94 *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
95 __asm__ volatile ("sync");
99 *(vu_long *)MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY;
100 __asm__ volatile ("sync");
103 /* find RAM size using SDRAM CS0 only */
105 test1 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x20000000);
107 test2 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x20000000);
115 /* memory smaller than 1MB is impossible */
116 if (dramsize < (1 << 20)) {
120 /* set SDRAM CS0 size according to the amount of RAM found */
122 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 +
123 __builtin_ffs(dramsize >> 20) - 1;
125 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
128 *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
129 #else /* CFG_RAMBOOT */
131 /* retrieve size of memory connected to SDRAM CS0 */
132 dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
133 if (dramsize >= 0x13) {
134 dramsize = (1 << (dramsize - 0x13)) << 20;
139 /* retrieve size of memory connected to SDRAM CS1 */
140 dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF;
141 if (dramsize2 >= 0x13) {
142 dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
147 #endif /* CFG_RAMBOOT */
149 /* return dramsize + dramsize2; */
153 int checkboard (void)
155 puts ("Board: HMI1001\n");
159 int misc_init_f (void)
164 int board_early_init_r (void)
166 *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
167 *(vu_long *)MPC5XXX_BOOTCS_START =
168 *(vu_long *)MPC5XXX_CS0_START = START_REG(CFG_FLASH_BASE);
169 *(vu_long *)MPC5XXX_BOOTCS_STOP =
170 *(vu_long *)MPC5XXX_CS0_STOP = STOP_REG(CFG_FLASH_BASE, CFG_FLASH_SIZE);
174 static struct pci_controller hose;
176 extern void pci_mpc5xxx_init(struct pci_controller *);
178 void pci_init_board(void)
180 pci_mpc5xxx_init(&hose);