3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
5 * (C) Copyright 2003-2004
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9 * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
12 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
14 * SPDX-License-Identifier: GPL-2.0+
18 #include <fdt_support.h>
23 /* some SIMPLE GPIO Pins */
24 #define GPIO_USB_8 (31-12)
25 #define GPIO_USB_7 (31-13)
26 #define GPIO_USB_6 (31-14)
27 #define GPIO_USB_0 (31-15)
28 #define GPIO_PSC3_7 (31-18)
29 #define GPIO_PSC3_6 (31-19)
30 #define GPIO_PSC3_1 (31-22)
31 #define GPIO_PSC3_0 (31-23)
33 /* some simple Interrupt GPIO Pins */
37 #define GPT_OUT_0 0x00000027
38 #define GPT_OUT_1 0x00000037
39 #define GPT_DISABLE 0x00000000 /* GPT pin disabled */
41 #define GP_SIMP_ENABLE_O(n, v) {pgpio->simple_dvo |= (v << n); \
42 pgpio->simple_ddr |= (1 << n); \
43 pgpio->simple_gpioe |= (1 << n); \
46 #define GP_SIMP_ENABLE_I(n) { pgpio->simple_ddr |= ~(1 << n); \
47 pgpio->simple_gpioe |= (1 << n); \
50 #define GP_SIMP_SET_O(n, v) (pgpio->simple_dvo = v ? \
51 (pgpio->simple_dvo | (1 << n)) : \
52 (pgpio->simple_dvo & ~(1 << n)) )
54 #define GP_SIMP_GET_O(n) ((pgpio->simple_dvo >> n) & 1)
55 #define GP_SIMP_GET_I(n) ((pgpio->simple_ival >> n) & 1)
57 #define GP_SINT_SET_O(n, v) (pgpio->sint_dvo = v ? \
58 (pgpio->sint_dvo | (1 << n)) : \
59 (pgpio->sint_dvo & ~(1 << n)) )
61 #define GP_SINT_ENABLE_O(n, v) {pgpio->sint_ode &= ~(1 << n); \
62 pgpio->sint_ddr |= (1 << n); \
63 GP_SINT_SET_O(n, v); \
64 pgpio->sint_gpioe |= (1 << n); \
67 #define GP_SINT_ENABLE_I(n) { pgpio->sint_ddr |= ~(1 << n); \
68 pgpio->sint_gpioe |= (1 << n); \
71 #define GP_SINT_GET_O(n) ((pgpio->sint_ival >> n) & 1)
72 #define GP_SINT_GET_I(n) ((pgpio-ntt_ival >> n) & 1)
74 #define GP_TIMER_ENABLE_O(n, v) ( \
75 ((volatile struct mpc5xxx_gpt *)(MPC5XXX_GPT + n))->emsr = v ? \
79 #define GP_TIMER_SET_O(n, v) GP_TIMER_ENABLE_O(n, v)
81 #define GP_TIMER_GET_O(n, v) ( \
82 (((volatile struct mpc5xxx_gpt *)(MPC5XXX_GPT + n))->emsr & 0x10) >> 4)
84 #define GP_TIMER_GET_I(n, v) ( \
85 (((volatile struct mpc5xxx_gpt *)(MPC5XXX_GPT + n))->sr & 0x100) >> 8)
87 #ifndef CONFIG_SYS_RAMBOOT
88 static void sdram_start (int hi_addr)
90 long hi_addr_bit = hi_addr ? 0x01000000 : 0;
92 /* unlock mode register */
93 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit;
94 __asm__ volatile ("sync");
96 /* precharge all banks */
97 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
98 __asm__ volatile ("sync");
101 /* set mode register: extended mode */
102 *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_EMODE;
103 __asm__ volatile ("sync");
105 /* set mode register: reset DLL */
106 *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000;
107 __asm__ volatile ("sync");
110 /* precharge all banks */
111 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
112 __asm__ volatile ("sync");
115 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit;
116 __asm__ volatile ("sync");
118 /* set mode register */
119 *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
120 __asm__ volatile ("sync");
122 /* normal operation */
123 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
124 __asm__ volatile ("sync");
129 * ATTENTION: Although partially referenced initdram does NOT make real use
130 * use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE
131 * is something else than 0x00000000.
134 phys_size_t initdram (int board_type)
137 #ifndef CONFIG_SYS_RAMBOOT
140 /* setup SDRAM chip selects */
141 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001c; /* 512MB at 0x0 */
142 *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x40000000; /* disabled */
143 __asm__ volatile ("sync");
145 /* setup config registers */
146 *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
147 *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
148 __asm__ volatile ("sync");
152 *(vu_long *)MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY;
153 __asm__ volatile ("sync");
156 /* find RAM size using SDRAM CS0 only */
158 test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x20000000);
160 test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x20000000);
168 /* memory smaller than 1MB is impossible */
169 if (dramsize < (1 << 20)) {
173 /* set SDRAM CS0 size according to the amount of RAM found */
175 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 +
176 __builtin_ffs(dramsize >> 20) - 1;
178 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
181 *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
182 #else /* CONFIG_SYS_RAMBOOT */
184 /* retrieve size of memory connected to SDRAM CS0 */
185 dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
186 if (dramsize >= 0x13) {
187 dramsize = (1 << (dramsize - 0x13)) << 20;
192 /* retrieve size of memory connected to SDRAM CS1 */
193 dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF;
194 if (dramsize2 >= 0x13) {
195 dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
200 #endif /* CONFIG_SYS_RAMBOOT */
202 /* return dramsize + dramsize2; */
206 int checkboard (void)
208 puts ("Board: MAN UC101\n");
209 /* clear the Display */
210 *(char *)(CONFIG_SYS_DISP_CWORD) = 0x80;
214 static void init_ports (void)
216 volatile struct mpc5xxx_gpio *pgpio =
217 (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
219 GP_SIMP_ENABLE_I(GPIO_USB_8); /* HEX Bit 3 */
220 GP_SIMP_ENABLE_I(GPIO_USB_7); /* HEX Bit 2 */
221 GP_SIMP_ENABLE_I(GPIO_USB_6); /* HEX Bit 1 */
222 GP_SIMP_ENABLE_I(GPIO_USB_0); /* HEX Bit 0 */
223 GP_SIMP_ENABLE_I(GPIO_PSC3_0); /* Switch Menue A */
224 GP_SIMP_ENABLE_I(GPIO_PSC3_1); /* Switch Menue B */
225 GP_SIMP_ENABLE_I(GPIO_PSC3_6); /* Switch Cold_Warm */
226 GP_SIMP_ENABLE_I(GPIO_PSC3_7); /* Switch Restart */
227 GP_SINT_ENABLE_O(GPIO_PSC3_8, 0); /* LED H2 */
228 GP_SINT_ENABLE_O(GPIO_USB1_9, 0); /* LED H3 */
229 GP_TIMER_ENABLE_O(4, 0); /* LED H4 */
230 GP_TIMER_ENABLE_O(5, 0); /* LED H5 */
231 GP_TIMER_ENABLE_O(3, 0); /* LED HB */
232 GP_TIMER_ENABLE_O(1, 0); /* RES_COLDSTART */
235 #ifdef CONFIG_PREBOOT
237 static uchar kbd_magic_prefix[] = "key_magic";
238 static uchar kbd_command_prefix[] = "key_cmd";
244 struct kbd_data_t* get_keys (struct kbd_data_t *kbd_data)
246 volatile struct mpc5xxx_gpio *pgpio =
247 (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
249 kbd_data->s1 = GP_SIMP_GET_I(GPIO_USB_8) << 3 | \
250 GP_SIMP_GET_I(GPIO_USB_7) << 2 | \
251 GP_SIMP_GET_I(GPIO_USB_6) << 1 | \
252 GP_SIMP_GET_I(GPIO_USB_0) << 0;
256 static int compare_magic (const struct kbd_data_t *kbd_data, char *str)
260 if (s1 >= '0' && s1 <= '9')
262 else if (s1 >= 'a' && s1 <= 'f')
264 else if (s1 >= 'A' && s1 <= 'F')
269 if (s1 != kbd_data->s1) return -1;
273 static char *key_match (const struct kbd_data_t *kbd_data)
275 char magic[sizeof (kbd_magic_prefix) + 1];
277 char *kbd_magic_keys;
280 * The following string defines the characters that can be appended
281 * to "key_magic" to form the names of environment variables that
282 * hold "magic" key codes, i. e. such key codes that can cause
283 * pre-boot actions. If the string is empty (""), then only
284 * "key_magic" is checked (old behaviour); the string "125" causes
285 * checks for "key_magic1", "key_magic2" and "key_magic5", etc.
287 if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
290 /* loop over all magic keys;
291 * use '\0' suffix in case of empty string
293 for (suffix = kbd_magic_keys; *suffix ||
294 suffix == kbd_magic_keys; ++suffix) {
295 sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
297 if (compare_magic(kbd_data, getenv(magic)) == 0) {
298 char cmd_name[sizeof (kbd_command_prefix) + 1];
301 sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
302 cmd = getenv (cmd_name);
311 #endif /* CONFIG_PREBOOT */
313 int misc_init_r (void)
315 /* Init the I/O ports */
318 #ifdef CONFIG_PREBOOT
319 struct kbd_data_t kbd_data;
321 char *str = strdup (key_match (get_keys (&kbd_data)));
322 /* Set or delete definition */
323 setenv ("preboot", str);
325 #endif /* CONFIG_PREBOOT */
329 int board_early_init_r (void)
331 *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
332 *(vu_long *)MPC5XXX_BOOTCS_START =
333 *(vu_long *)MPC5XXX_CS0_START = START_REG(CONFIG_SYS_FLASH_BASE);
334 *(vu_long *)MPC5XXX_BOOTCS_STOP =
335 *(vu_long *)MPC5XXX_CS0_STOP = STOP_REG(CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_SIZE);
336 /* Interbus enable it here ?? */
337 *(vu_long *)MPC5XXX_GPT6_ENABLE = GPT_OUT_1;
341 static struct pci_controller hose;
343 extern void pci_mpc5xxx_init(struct pci_controller *);
345 void pci_init_board(void)
347 pci_mpc5xxx_init(&hose);
351 #if defined(CONFIG_HW_WATCHDOG)
352 void hw_watchdog_reset(void)
354 /* Trigger HW Watchdog with TIMER_0 */
355 *(vu_long *)MPC5XXX_GPT0_ENABLE = GPT_OUT_1;
356 *(vu_long *)MPC5XXX_GPT0_ENABLE = GPT_OUT_0;
360 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
361 void ft_board_setup(void *blob, bd_t *bd)
363 ft_cpu_setup(blob, bd);
365 #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */