2 * (C) Copyright 2000, 2001
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * Wait for completion of each sector erase command issued
28 * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
33 * - adapted for pip405, Denis Peter, MPL AG Switzerland
40 #if !defined(CONFIG_PATI)
41 #include <asm/ppc4xx.h>
42 #include <asm/processor.h>
43 #include "common_util.h"
44 #if defined(CONFIG_MIP405)
45 #include "../mip405/mip405.h"
47 #if defined(CONFIG_PIP405)
48 #include "../pip405/pip405.h"
50 #include <asm/4xx_pci.h>
51 #else /* defined(CONFIG_PATI) */
55 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
56 /*-----------------------------------------------------------------------
59 static ulong flash_get_size (vu_long *addr, flash_info_t *info);
60 static int write_word (flash_info_t *info, ulong dest, ulong data);
62 void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt);
66 #define FLASH_WORD_SIZE unsigned short
71 #if !defined(CONFIG_PATI)
73 /*-----------------------------------------------------------------------
74 * Some CS switching routines:
76 * On PIP/MIP405 we have 3 (4) possible boot mode
78 * - Boot from Flash (Flash CS = CS0, MPS CS = CS1)
79 * - Boot from MPS (Flash CS = CS1, MPS CS = CS0)
80 * - Boot from PCI with Flash map (Flash CS = CS0, MPS CS = CS1)
81 * - Boot from PCI with MPS map (Flash CS = CS1, MPS CS = CS0)
82 * The flash init is the first board specific routine which is called
83 * after code relocation (running from SDRAM)
84 * The first thing we do is to map the Flash CS to the Flash area and
85 * the MPS CS to the MPS area. Since the flash size is unknown at this
86 * point, we use the max flash size and the lowest flash address as base.
88 * After flash detection we adjust the size of the CS area accordingly.
89 * The board_init_r will fill in wrong values in the board init structure,
90 * but this will be fixed in the misc_init_r routine:
91 * bd->bi_flashstart=0-flash_info[0].size
92 * bd->bi_flashsize=flash_info[0].size-CONFIG_SYS_MONITOR_LEN
93 * bd->bi_flashoffset=0
96 int get_boot_mode(void)
100 pbcr = mfdcr (CPC0_PSR);
101 if ((pbcr & PSR_ROM_WIDTH_MASK) == 0)
102 /* boot via MPS or MPS mapping */
104 if(pbcr & PSR_ROM_LOC)
110 /* Map the flash high (in boot area)
111 This code can only be executed from SDRAM (after relocation).
113 void setup_cs_reloc(void)
116 /* Since we are relocated, we can set-up the CS finaly
117 * but first of all, switch off PCI mapping (in case it was a PCI boot) */
119 icache_enable (); /* we are relocated */
121 mode=get_boot_mode();
122 /* we map the flash high in every case */
123 /* first findout on which cs the flash is */
124 if(mode & BOOT_MPS) {
125 /* map flash high on CS1 and MPS on CS0 */
126 mtdcr (EBC0_CFGADDR, PB0AP);
127 mtdcr (EBC0_CFGDATA, MPS_AP);
128 mtdcr (EBC0_CFGADDR, PB0CR);
129 mtdcr (EBC0_CFGDATA, MPS_CR);
130 /* we use the default values (max values) for the flash
131 * because its real size is not yet known */
132 mtdcr (EBC0_CFGADDR, PB1AP);
133 mtdcr (EBC0_CFGDATA, FLASH_AP);
134 mtdcr (EBC0_CFGADDR, PB1CR);
135 mtdcr (EBC0_CFGDATA, FLASH_CR_B);
138 /* map flash high on CS0 and MPS on CS1 */
139 mtdcr (EBC0_CFGADDR, PB1AP);
140 mtdcr (EBC0_CFGDATA, MPS_AP);
141 mtdcr (EBC0_CFGADDR, PB1CR);
142 mtdcr (EBC0_CFGDATA, MPS_CR);
143 /* we use the default values (max values) for the flash
144 * because its real size is not yet known */
145 mtdcr (EBC0_CFGADDR, PB0AP);
146 mtdcr (EBC0_CFGDATA, FLASH_AP);
147 mtdcr (EBC0_CFGADDR, PB0CR);
148 mtdcr (EBC0_CFGDATA, FLASH_CR_B);
152 #endif /* #if !defined(CONFIG_PATI) */
154 unsigned long flash_init (void)
156 unsigned long size_b0;
159 #if !defined(CONFIG_PATI)
160 unsigned long flashcr,size_reg;
162 extern char version_string;
163 char *p = &version_string;
165 /* Since we are relocated, we can set-up the CS finally */
167 /* get and display boot mode */
168 mode=get_boot_mode();
170 printf("(PCI Boot %s Map) ",(mode & BOOT_MPS) ?
173 printf("(%s Boot) ",(mode & BOOT_MPS) ?
175 #endif /* #if !defined(CONFIG_PATI) */
176 /* Init: no FLASHes known */
177 for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
178 flash_info[i].flash_id = FLASH_UNKNOWN;
181 /* Static FLASH Bank configuration here - FIXME XXX */
183 size_b0 = flash_get_size((vu_long *)CONFIG_SYS_MONITOR_BASE, &flash_info[0]);
185 if (flash_info[0].flash_id == FLASH_UNKNOWN) {
186 printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
187 size_b0, size_b0<<20);
189 /* protect the bootloader */
190 /* Monitor protection ON by default */
191 #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
192 flash_protect(FLAG_PROTECT_SET,
193 CONFIG_SYS_MONITOR_BASE,
194 CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
197 #if !defined(CONFIG_PATI)
198 /* protect reset vector */
199 flash_info[0].protect[flash_info[0].sector_count-1] = 1;
200 flash_info[0].size = size_b0;
201 /* set up flash cs according to the size */
202 size_reg=(flash_info[0].size >>20);
205 case 1: i=0; break; /* <= 1MB */
206 case 2: i=1; break; /* = 2MB */
207 case 4: i=2; break; /* = 4MB */
208 case 8: i=3; break; /* = 8MB */
209 case 16: i=4; break; /* = 16MB */
210 case 32: i=5; break; /* = 32MB */
211 case 64: i=6; break; /* = 64MB */
212 case 128: i=7; break; /*= 128MB */
214 printf("\n #### ERROR, wrong size %ld MByte reset board #####\n",size_reg);
217 if(mode & BOOT_MPS) {
218 /* flash is on CS1 */
219 mtdcr(EBC0_CFGADDR, PB1CR);
220 flashcr = mfdcr (EBC0_CFGDATA);
221 /* we map the flash high in every case */
222 flashcr&=0x0001FFFF; /* mask out address bits */
223 flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
224 flashcr|= (i << 17); /* size addr */
225 mtdcr(EBC0_CFGADDR, PB1CR);
226 mtdcr(EBC0_CFGDATA, flashcr);
229 /* flash is on CS0 */
230 mtdcr(EBC0_CFGADDR, PB0CR);
231 flashcr = mfdcr (EBC0_CFGDATA);
232 /* we map the flash high in every case */
233 flashcr&=0x0001FFFF; /* mask out address bits */
234 flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
235 flashcr|= (i << 17); /* size addr */
236 mtdcr(EBC0_CFGADDR, PB0CR);
237 mtdcr(EBC0_CFGDATA, flashcr);
240 /* enable this (PIP405/MIP405 only) if you want to test if
241 the relocation has be done ok.
242 This will disable both Chipselects */
243 mtdcr (EBC0_CFGADDR, PB0CR);
244 mtdcr (EBC0_CFGDATA, 0L);
245 mtdcr (EBC0_CFGADDR, PB1CR);
246 mtdcr (EBC0_CFGDATA, 0L);
247 printf("CS0 & CS1 switched off for test\n");
249 /* patch version_string */
250 for(i=0;i<0x100;i++) {
257 #else /* #if !defined(CONFIG_PATI) */
258 #ifdef CONFIG_ENV_IS_IN_FLASH
259 /* ENV protection ON by default */
260 flash_protect(FLAG_PROTECT_SET,
262 CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE-1,
265 #endif /* #if !defined(CONFIG_PATI) */
270 /*-----------------------------------------------------------------------
272 void flash_print_info (flash_info_t *info)
278 volatile unsigned long *flash;
280 if (info->flash_id == FLASH_UNKNOWN) {
281 printf ("missing or unknown FLASH type\n");
285 switch (info->flash_id & FLASH_VENDMASK) {
286 case FLASH_MAN_AMD: printf ("AMD "); break;
287 case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
288 case FLASH_MAN_SST: printf ("SST "); break;
289 case FLASH_MAN_INTEL: printf ("Intel "); break;
290 default: printf ("Unknown Vendor "); break;
293 switch (info->flash_id & FLASH_TYPEMASK) {
294 case FLASH_AM040: printf ("AM29F040 (512 Kbit, uniform sector size)\n");
296 case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
298 case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
300 case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
302 case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
304 case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
306 case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
308 case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
310 case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
312 case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
314 case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
316 case FLASH_INTEL320T: printf ("TE28F320C3 (32 Mbit, top sector size)\n");
318 case FLASH_AM640U: printf ("AM29LV640U (64 Mbit, uniform sector size)\n");
320 default: printf ("Unknown Chip Type\n");
324 printf (" Size: %ld KB in %d Sectors\n",
325 info->size >> 10, info->sector_count);
327 printf (" Sector Start Addresses:");
328 for (i=0; i<info->sector_count; ++i) {
330 * Check if whole sector is erased
332 if (i != (info->sector_count-1))
333 size = info->start[i+1] - info->start[i];
335 size = info->start[0] + info->size - info->start[i];
337 flash = (volatile unsigned long *)info->start[i];
338 size = size >> 2; /* divide by 4 for longword access */
339 for (k=0; k<size; k++) {
340 if (*flash++ != 0xffffffff) {
347 printf (" %08lX%s%s",
350 info->protect[i] ? "RO " : " ");
355 /*-----------------------------------------------------------------------
359 /*-----------------------------------------------------------------------
364 * The following code cannot be run from FLASH!
366 static ulong flash_get_size (vu_long *addr, flash_info_t *info)
369 FLASH_WORD_SIZE value;
371 volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr;
373 /* Write auto select command: read Manufacturer ID */
374 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
375 addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
376 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090;
379 /* printf("flash_get_size value: %x\n",value); */
381 case (FLASH_WORD_SIZE)AMD_MANUFACT:
382 info->flash_id = FLASH_MAN_AMD;
384 case (FLASH_WORD_SIZE)FUJ_MANUFACT:
385 info->flash_id = FLASH_MAN_FUJ;
387 case (FLASH_WORD_SIZE)INTEL_MANUFACT:
388 info->flash_id = FLASH_MAN_INTEL;
390 case (FLASH_WORD_SIZE)SST_MANUFACT:
391 info->flash_id = FLASH_MAN_SST;
394 info->flash_id = FLASH_UNKNOWN;
395 info->sector_count = 0;
397 return (0); /* no or unknown flash */
399 value = addr2[1]; /* device ID */
400 /* printf("Device value %x\n",value); */
402 case (FLASH_WORD_SIZE)AMD_ID_F040B:
403 info->flash_id += FLASH_AM040;
404 info->sector_count = 8;
405 info->size = 0x0080000; /* => 512 ko */
407 case (FLASH_WORD_SIZE)AMD_ID_LV400T:
408 info->flash_id += FLASH_AM400T;
409 info->sector_count = 11;
410 info->size = 0x00080000;
411 break; /* => 0.5 MB */
413 case (FLASH_WORD_SIZE)AMD_ID_LV400B:
414 info->flash_id += FLASH_AM400B;
415 info->sector_count = 11;
416 info->size = 0x00080000;
417 break; /* => 0.5 MB */
419 case (FLASH_WORD_SIZE)AMD_ID_LV800T:
420 info->flash_id += FLASH_AM800T;
421 info->sector_count = 19;
422 info->size = 0x00100000;
425 case (FLASH_WORD_SIZE)AMD_ID_LV800B:
426 info->flash_id += FLASH_AM800B;
427 info->sector_count = 19;
428 info->size = 0x00100000;
431 case (FLASH_WORD_SIZE)AMD_ID_LV160T:
432 info->flash_id += FLASH_AM160T;
433 info->sector_count = 35;
434 info->size = 0x00200000;
437 case (FLASH_WORD_SIZE)AMD_ID_LV160B:
438 info->flash_id += FLASH_AM160B;
439 info->sector_count = 35;
440 info->size = 0x00200000;
442 case (FLASH_WORD_SIZE)AMD_ID_LV320T:
443 info->flash_id += FLASH_AM320T;
444 info->sector_count = 67;
445 info->size = 0x00400000;
447 case (FLASH_WORD_SIZE)AMD_ID_LV640U:
448 info->flash_id += FLASH_AM640U;
449 info->sector_count = 128;
450 info->size = 0x00800000;
452 #if 0 /* enable when device IDs are available */
454 case (FLASH_WORD_SIZE)AMD_ID_LV320B:
455 info->flash_id += FLASH_AM320B;
456 info->sector_count = 67;
457 info->size = 0x00400000;
460 case (FLASH_WORD_SIZE)SST_ID_xF800A:
461 info->flash_id += FLASH_SST800A;
462 info->sector_count = 16;
463 info->size = 0x00100000;
465 case (FLASH_WORD_SIZE)INTEL_ID_28F320C3T:
466 info->flash_id += FLASH_INTEL320T;
467 info->sector_count = 71;
468 info->size = 0x00400000;
472 case (FLASH_WORD_SIZE)SST_ID_xF160A:
473 info->flash_id += FLASH_SST160A;
474 info->sector_count = 32;
475 info->size = 0x00200000;
479 info->flash_id = FLASH_UNKNOWN;
480 return (0); /* => no or unknown flash */
483 /* base address calculation */
485 /* set up sector start address table */
486 if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
487 (info->flash_id == FLASH_AM040) ||
488 (info->flash_id == FLASH_AM640U)){
489 for (i = 0; i < info->sector_count; i++)
490 info->start[i] = base + (i * 0x00010000);
493 if (info->flash_id & FLASH_BTYPE) {
494 /* set sector offsets for bottom boot block type */
495 info->start[0] = base + 0x00000000;
496 info->start[1] = base + 0x00004000;
497 info->start[2] = base + 0x00006000;
498 info->start[3] = base + 0x00008000;
499 for (i = 4; i < info->sector_count; i++)
500 info->start[i] = base + (i * 0x00010000) - 0x00030000;
503 /* set sector offsets for top boot block type */
504 i = info->sector_count - 1;
505 if(info->sector_count==71) {
507 info->start[i--] = base + info->size - 0x00002000;
508 info->start[i--] = base + info->size - 0x00004000;
509 info->start[i--] = base + info->size - 0x00006000;
510 info->start[i--] = base + info->size - 0x00008000;
511 info->start[i--] = base + info->size - 0x0000A000;
512 info->start[i--] = base + info->size - 0x0000C000;
513 info->start[i--] = base + info->size - 0x0000E000;
515 info->start[i] = base + i * 0x000010000;
518 info->start[i--] = base + info->size - 0x00004000;
519 info->start[i--] = base + info->size - 0x00006000;
520 info->start[i--] = base + info->size - 0x00008000;
522 info->start[i] = base + i * 0x00010000;
527 /* check for protected sectors */
528 for (i = 0; i < info->sector_count; i++) {
529 /* read sector protection at sector address, (A7 .. A0) = 0x02 */
530 /* D0 = 1 if protected */
531 addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
532 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
533 info->protect[i] = 0;
535 info->protect[i] = addr2[2] & 1;
539 * Prevent writes to uninitialized FLASH.
541 if (info->flash_id != FLASH_UNKNOWN) {
542 addr2 = (FLASH_WORD_SIZE *)info->start[0];
543 *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
549 int wait_for_DQ7(flash_info_t *info, int sect)
551 ulong start, now, last;
552 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
554 start = get_timer (0);
556 while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
557 if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
558 printf ("Timeout\n");
561 /* show that we're waiting */
562 if ((now - last) > 1000) { /* every second */
570 int intel_wait_for_DQ7(flash_info_t *info, int sect)
572 ulong start, now, last, status;
573 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
575 start = get_timer (0);
577 while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
578 if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
579 printf ("Timeout\n");
582 /* show that we're waiting */
583 if ((now - last) > 1000) { /* every second */
588 status = addr[0] & (FLASH_WORD_SIZE)0x00280028;
589 /* clear status register */
590 addr[0] = (FLASH_WORD_SIZE)0x00500050;
591 /* check status for block erase fail and VPP low */
592 return (status == 0 ? ERR_OK : ERR_NOT_ERASED);
595 /*-----------------------------------------------------------------------
598 int flash_erase (flash_info_t *info, int s_first, int s_last)
600 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
601 volatile FLASH_WORD_SIZE *addr2;
602 int flag, prot, sect;
606 if ((s_first < 0) || (s_first > s_last)) {
607 if (info->flash_id == FLASH_UNKNOWN) {
608 printf ("- missing\n");
610 printf ("- no sectors to erase\n");
615 if (info->flash_id == FLASH_UNKNOWN) {
616 printf ("Can't erase unknown flash type - aborted\n");
621 for (sect=s_first; sect<=s_last; ++sect) {
622 if (info->protect[sect]) {
628 printf ("- Warning: %d protected sectors will not be erased!\n",
634 /* Disable interrupts which might cause a timeout here */
635 flag = disable_interrupts();
637 /* Start erase on unprotected sectors */
638 for (sect = s_first; sect<=s_last; sect++) {
639 if (info->protect[sect] == 0) { /* not protected */
640 addr2 = (FLASH_WORD_SIZE *)(info->start[sect]);
641 /* printf("Erasing sector %p\n", addr2); */ /* CLH */
642 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
643 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
644 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
645 addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
646 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
647 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
648 addr2[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */
650 udelay(1000); /* wait 1 ms */
651 rcode |= wait_for_DQ7(info, sect);
654 if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
655 addr2[0] = (FLASH_WORD_SIZE)0x00600060; /* unlock sector */
656 addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */
657 intel_wait_for_DQ7(info, sect);
658 addr2[0] = (FLASH_WORD_SIZE)0x00200020; /* sector erase */
659 addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */
660 rcode |= intel_wait_for_DQ7(info, sect);
663 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
664 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
665 addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
666 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
667 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
668 addr2[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */
669 rcode |= wait_for_DQ7(info, sect);
673 * Wait for each sector to complete, it's more
674 * reliable. According to AMD Spec, you must
675 * issue all erase commands within a specified
676 * timeout. This has been seen to fail, especially
677 * if printf()s are included (for debug)!!
679 /* wait_for_DQ7(info, sect); */
683 /* re-enable interrupts if necessary */
687 /* wait at least 80us - let's wait 1 ms */
690 /* reset to read mode */
691 addr = (FLASH_WORD_SIZE *)info->start[0];
692 addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
701 void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt)
704 volatile FLASH_WORD_SIZE *addr2;
707 for(i=info->sector_count-1;i>0;i--)
709 if(addr>=info->start[i])
713 addr2 = (FLASH_WORD_SIZE *)(info->start[i]);
714 addr2[0] = (FLASH_WORD_SIZE)0x00600060; /* unlock sector setup */
715 addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* unlock sector */
716 intel_wait_for_DQ7(info, i);
718 c-=(info->start[i]-info->start[i-1]);
723 /*-----------------------------------------------------------------------
724 * Copy memory to flash, returns:
727 * 2 - Flash not erased
730 int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
735 if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
736 unlock_intel_sectors(info,addr,cnt);
738 wp = (addr & ~3); /* get lower word aligned address */
740 * handle unaligned start bytes
742 if ((l = addr - wp) != 0) {
744 for (i=0, cp=wp; i<l; ++i, ++cp) {
745 data = (data << 8) | (*(uchar *)cp);
747 for (; i<4 && cnt>0; ++i) {
748 data = (data << 8) | *src++;
752 for (; cnt==0 && i<4; ++i, ++cp) {
753 data = (data << 8) | (*(uchar *)cp);
756 if ((rc = write_word(info, wp, data)) != 0) {
763 * handle word aligned part
767 for (i=0; i<4; ++i) {
768 data = (data << 8) | *src++;
770 if ((rc = write_word(info, wp, data)) != 0) {
774 if((wp % 0x10000)==0)
775 printf("."); /* show Progress */
784 * handle unaligned tail bytes
787 for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
788 data = (data << 8) | *src++;
791 for (; i<4; ++i, ++cp) {
792 data = (data << 8) | (*(uchar *)cp);
794 rc=write_word(info, wp, data);
798 /*-----------------------------------------------------------------------
799 * Write a word to Flash, returns:
802 * 2 - Flash not erased
804 static FLASH_WORD_SIZE *read_val = (FLASH_WORD_SIZE *)0x200000;
806 static int write_word (flash_info_t *info, ulong dest, ulong data)
808 volatile FLASH_WORD_SIZE *addr2 = (volatile FLASH_WORD_SIZE *)(info->start[0]);
809 volatile FLASH_WORD_SIZE *dest2 = (volatile FLASH_WORD_SIZE *)dest;
810 volatile FLASH_WORD_SIZE *data2;
817 data2 = (volatile FLASH_WORD_SIZE *)data_p;
819 /* Check if Flash is (sufficiently) erased */
820 if ((*((volatile FLASH_WORD_SIZE *)dest) &
821 (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) {
824 /* Disable interrupts which might cause a timeout here */
825 flag = disable_interrupts();
826 for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++)
828 if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
829 /* intel style writting */
830 dest2[i] = (FLASH_WORD_SIZE)0x00500050;
831 dest2[i] = (FLASH_WORD_SIZE)0x00400040;
832 *read_val++ = data2[i];
836 /* data polling for D7 */
837 start = get_timer (0);
839 while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080)
841 if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT)
844 dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
846 dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
847 if(dest2[i]!=data2[i])
848 printf("Error at %p 0x%04X != 0x%04X\n",&dest2[i],dest2[i],data2[i]);
851 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
852 addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
853 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0;
855 /* re-enable interrupts if necessary */
858 /* data polling for D7 */
859 start = get_timer (0);
860 while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) !=
861 (data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
862 if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
871 /*-----------------------------------------------------------------------