2 * (C) Copyright 2000, 2001
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * Wait for completion of each sector erase command issued
28 * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
33 * - adapted for pip405, Denis Peter, MPL AG Switzerland
40 #include <asm/processor.h>
41 #include "common_util.h"
42 #if defined(CONFIG_MIP405)
43 #include "../mip405/mip405.h"
45 #if defined(CONFIG_PIP405)
46 #include "../pip405/pip405.h"
48 #include <405gp_pci.h>
50 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
51 /*-----------------------------------------------------------------------
54 static ulong flash_get_size (vu_long *addr, flash_info_t *info);
55 static int write_word (flash_info_t *info, ulong dest, ulong data);
57 void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt);
63 #define FLASH_WORD_SIZE unsigned short
69 #define FLASH_WORD_SIZE unsigned short
75 /*-----------------------------------------------------------------------
76 * Some CS switching routines:
78 * On PIP/MIP405 we have 3 (4) possible boot mode
80 * - Boot from Flash (Flash CS = CS0, MPS CS = CS1)
81 * - Boot from MPS (Flash CS = CS1, MPS CS = CS0)
82 * - Boot from PCI with Flash map (Flash CS = CS0, MPS CS = CS1)
83 * - Boot from PCI with MPS map (Flash CS = CS1, MPS CS = CS0)
84 * The flash init is the first board specific routine which is called
85 * after code relocation (running from SDRAM)
86 * The first thing we do is to map the Flash CS to the Flash area and
87 * the MPS CS to the MPS area. Since the flash size is unknown at this
88 * point, we use the max flash size and the lowest flash address as base.
90 * After flash detection we adjust the size of the CS area accordingly.
91 * The board_init_r will fill in wrong values in the board init structure,
92 * but this will be fixed in the misc_init_r routine:
93 * bd->bi_flashstart=0-flash_info[0].size
94 * bd->bi_flashsize=flash_info[0].size-CFG_MONITOR_LEN
95 * bd->bi_flashoffset=0
98 int get_boot_mode(void)
102 pbcr = mfdcr (strap);
103 if ((pbcr & PSR_ROM_WIDTH_MASK) == 0)
104 /* boot via MPS or MPS mapping */
106 if(pbcr & PSR_ROM_LOC)
112 /* Map the flash high (in boot area)
113 This code can only be executed from SDRAM (after relocation).
115 void setup_cs_reloc(void)
118 /* Since we are relocated, we can set-up the CS finaly
119 * but first of all, switch off PCI mapping (in case it was a PCI boot) */
121 icache_enable (); /* we are relocated */
123 mode=get_boot_mode();
124 /* we map the flash high in every case */
125 /* first findout on which cs the flash is */
126 if(mode & BOOT_MPS) {
127 /* map flash high on CS1 and MPS on CS0 */
128 mtdcr (ebccfga, pb0ap);
129 mtdcr (ebccfgd, MPS_AP);
130 mtdcr (ebccfga, pb0cr);
131 mtdcr (ebccfgd, MPS_CR);
132 /* we use the default values (max values) for the flash
133 * because its real size is not yet known */
134 mtdcr (ebccfga, pb1ap);
135 mtdcr (ebccfgd, FLASH_AP);
136 mtdcr (ebccfga, pb1cr);
137 mtdcr (ebccfgd, FLASH_CR_B);
140 /* map flash high on CS0 and MPS on CS1 */
141 mtdcr (ebccfga, pb1ap);
142 mtdcr (ebccfgd, MPS_AP);
143 mtdcr (ebccfga, pb1cr);
144 mtdcr (ebccfgd, MPS_CR);
145 /* we use the default values (max values) for the flash
146 * because its real size is not yet known */
147 mtdcr (ebccfga, pb0ap);
148 mtdcr (ebccfgd, FLASH_AP);
149 mtdcr (ebccfga, pb0cr);
150 mtdcr (ebccfgd, FLASH_CR_B);
156 unsigned long flash_init (void)
158 unsigned long size_b0, size_b1,flashcr;
160 extern char version_string;
161 char *p=&version_string;
163 /* Since we are relocated, we can set-up the CS finally */
165 /* get and display boot mode */
166 mode=get_boot_mode();
168 printf("(PCI Boot %s Map) ",(mode & BOOT_MPS) ?
171 printf("(%s Boot) ",(mode & BOOT_MPS) ?
173 /* Init: no FLASHes known */
174 for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
175 flash_info[i].flash_id = FLASH_UNKNOWN;
178 /* Static FLASH Bank configuration here - FIXME XXX */
180 size_b0 = flash_get_size((vu_long *)CFG_MONITOR_BASE, &flash_info[0]);
182 if (flash_info[0].flash_id == FLASH_UNKNOWN) {
183 printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
184 size_b0, size_b0<<20);
186 /* protect the bootloader */
187 /* Monitor protection ON by default */
188 #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
189 flash_protect(FLAG_PROTECT_SET,
191 CFG_MONITOR_BASE+monitor_flash_len-1,
194 /* protect reset vector */
195 flash_info[0].protect[flash_info[0].sector_count-1] = 1;
197 flash_info[0].size = size_b0;
198 /* set up flash cs according to the size */
199 if(mode & BOOT_MPS) {
200 /* flash is on CS1 */
201 mtdcr(ebccfga, pb1cr);
202 flashcr = mfdcr (ebccfgd);
203 /* we map the flash high in every case */
204 flashcr&=0x0001FFFF; /* mask out address bits */
205 flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
206 flashcr|= (((flash_info[0].size >>21) & 0x07) << 17); /* size addr */
207 mtdcr(ebccfga, pb1cr);
208 mtdcr(ebccfgd, flashcr);
211 /* flash is on CS0 */
212 mtdcr(ebccfga, pb0cr);
213 flashcr = mfdcr (ebccfgd);
214 /* we map the flash high in every case */
215 flashcr&=0x0001FFFF; /* mask out address bits */
216 flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
217 flashcr|= (((flash_info[0].size >>21) & 0x07) << 17); /* size addr */
218 mtdcr(ebccfga, pb0cr);
219 mtdcr(ebccfgd, flashcr);
222 /* enable this if you want to test if
223 the relocation has be done ok.
224 This will disable both Chipselects */
225 mtdcr (ebccfga, pb0cr);
227 mtdcr (ebccfga, pb1cr);
229 printf("CS0 & CS1 switched off for test\n");
231 /* patch version_string */
232 for(i=0;i<0x100;i++) {
243 /*-----------------------------------------------------------------------
245 void flash_print_info (flash_info_t *info)
251 volatile unsigned long *flash;
253 if (info->flash_id == FLASH_UNKNOWN) {
254 printf ("missing or unknown FLASH type\n");
258 switch (info->flash_id & FLASH_VENDMASK) {
259 case FLASH_MAN_AMD: printf ("AMD "); break;
260 case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
261 case FLASH_MAN_SST: printf ("SST "); break;
262 case FLASH_MAN_INTEL: printf ("Intel "); break;
263 default: printf ("Unknown Vendor "); break;
266 switch (info->flash_id & FLASH_TYPEMASK) {
267 case FLASH_AM040: printf ("AM29F040 (512 Kbit, uniform sector size)\n");
269 case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
271 case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
273 case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
275 case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
277 case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
279 case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
281 case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
283 case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
285 case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
287 case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
289 case FLASH_INTEL320T: printf ("TE28F320C3 (32 Mbit, top sector size)\n");
291 case FLASH_AM640U: printf ("AM29LV640U (64 Mbit, uniform sector size)\n");
293 default: printf ("Unknown Chip Type\n");
297 printf (" Size: %ld KB in %d Sectors\n",
298 info->size >> 10, info->sector_count);
300 printf (" Sector Start Addresses:");
301 for (i=0; i<info->sector_count; ++i) {
303 * Check if whole sector is erased
305 if (i != (info->sector_count-1))
306 size = info->start[i+1] - info->start[i];
308 size = info->start[0] + info->size - info->start[i];
310 flash = (volatile unsigned long *)info->start[i];
311 size = size >> 2; /* divide by 4 for longword access */
312 for (k=0; k<size; k++) {
313 if (*flash++ != 0xffffffff) {
320 printf (" %08lX%s%s",
323 info->protect[i] ? "RO " : " ");
328 /*-----------------------------------------------------------------------
332 /*-----------------------------------------------------------------------
337 * The following code cannot be run from FLASH!
339 static ulong flash_get_size (vu_long *addr, flash_info_t *info)
342 FLASH_WORD_SIZE value;
344 volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr;
346 /* Write auto select command: read Manufacturer ID */
347 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
348 addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
349 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090;
352 /* printf("flash_get_size value: %x\n",value); */
354 case (FLASH_WORD_SIZE)AMD_MANUFACT:
355 info->flash_id = FLASH_MAN_AMD;
357 case (FLASH_WORD_SIZE)FUJ_MANUFACT:
358 info->flash_id = FLASH_MAN_FUJ;
360 case (FLASH_WORD_SIZE)INTEL_MANUFACT:
361 info->flash_id = FLASH_MAN_INTEL;
363 case (FLASH_WORD_SIZE)SST_MANUFACT:
364 info->flash_id = FLASH_MAN_SST;
367 info->flash_id = FLASH_UNKNOWN;
368 info->sector_count = 0;
370 return (0); /* no or unknown flash */
372 value = addr2[1]; /* device ID */
373 /* printf("Device value %x\n",value); */
375 case (FLASH_WORD_SIZE)AMD_ID_F040B:
376 info->flash_id += FLASH_AM040;
377 info->sector_count = 8;
378 info->size = 0x0080000; /* => 512 ko */
380 case (FLASH_WORD_SIZE)AMD_ID_LV400T:
381 info->flash_id += FLASH_AM400T;
382 info->sector_count = 11;
383 info->size = 0x00080000;
384 break; /* => 0.5 MB */
386 case (FLASH_WORD_SIZE)AMD_ID_LV400B:
387 info->flash_id += FLASH_AM400B;
388 info->sector_count = 11;
389 info->size = 0x00080000;
390 break; /* => 0.5 MB */
392 case (FLASH_WORD_SIZE)AMD_ID_LV800T:
393 info->flash_id += FLASH_AM800T;
394 info->sector_count = 19;
395 info->size = 0x00100000;
398 case (FLASH_WORD_SIZE)AMD_ID_LV800B:
399 info->flash_id += FLASH_AM800B;
400 info->sector_count = 19;
401 info->size = 0x00100000;
404 case (FLASH_WORD_SIZE)AMD_ID_LV160T:
405 info->flash_id += FLASH_AM160T;
406 info->sector_count = 35;
407 info->size = 0x00200000;
410 case (FLASH_WORD_SIZE)AMD_ID_LV160B:
411 info->flash_id += FLASH_AM160B;
412 info->sector_count = 35;
413 info->size = 0x00200000;
415 case (FLASH_WORD_SIZE)AMD_ID_LV320T:
416 info->flash_id += FLASH_AM320T;
417 info->sector_count = 67;
418 info->size = 0x00400000;
420 case (FLASH_WORD_SIZE)AMD_ID_LV640U:
421 info->flash_id += FLASH_AM640U;
422 info->sector_count = 128;
423 info->size = 0x00800000;
425 #if 0 /* enable when device IDs are available */
427 case (FLASH_WORD_SIZE)AMD_ID_LV320B:
428 info->flash_id += FLASH_AM320B;
429 info->sector_count = 67;
430 info->size = 0x00400000;
433 case (FLASH_WORD_SIZE)SST_ID_xF800A:
434 info->flash_id += FLASH_SST800A;
435 info->sector_count = 16;
436 info->size = 0x00100000;
438 case (FLASH_WORD_SIZE)INTEL_ID_28F320C3T:
439 info->flash_id += FLASH_INTEL320T;
440 info->sector_count = 71;
441 info->size = 0x00400000;
445 case (FLASH_WORD_SIZE)SST_ID_xF160A:
446 info->flash_id += FLASH_SST160A;
447 info->sector_count = 32;
448 info->size = 0x00200000;
452 info->flash_id = FLASH_UNKNOWN;
453 return (0); /* => no or unknown flash */
456 /* base address calculation */
458 /* set up sector start address table */
459 if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
460 (info->flash_id == FLASH_AM040) ||
461 (info->flash_id == FLASH_AM640U)){
462 for (i = 0; i < info->sector_count; i++)
463 info->start[i] = base + (i * 0x00010000);
466 if (info->flash_id & FLASH_BTYPE) {
467 /* set sector offsets for bottom boot block type */
468 info->start[0] = base + 0x00000000;
469 info->start[1] = base + 0x00004000;
470 info->start[2] = base + 0x00006000;
471 info->start[3] = base + 0x00008000;
472 for (i = 4; i < info->sector_count; i++)
473 info->start[i] = base + (i * 0x00010000) - 0x00030000;
476 /* set sector offsets for top boot block type */
477 i = info->sector_count - 1;
478 if(info->sector_count==71) {
480 info->start[i--] = base + info->size - 0x00002000;
481 info->start[i--] = base + info->size - 0x00004000;
482 info->start[i--] = base + info->size - 0x00006000;
483 info->start[i--] = base + info->size - 0x00008000;
484 info->start[i--] = base + info->size - 0x0000A000;
485 info->start[i--] = base + info->size - 0x0000C000;
486 info->start[i--] = base + info->size - 0x0000E000;
488 info->start[i] = base + i * 0x000010000;
491 info->start[i--] = base + info->size - 0x00004000;
492 info->start[i--] = base + info->size - 0x00006000;
493 info->start[i--] = base + info->size - 0x00008000;
495 info->start[i] = base + i * 0x00010000;
500 /* check for protected sectors */
501 for (i = 0; i < info->sector_count; i++) {
502 /* read sector protection at sector address, (A7 .. A0) = 0x02 */
503 /* D0 = 1 if protected */
504 addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
505 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
506 info->protect[i] = 0;
508 info->protect[i] = addr2[2] & 1;
512 * Prevent writes to uninitialized FLASH.
514 if (info->flash_id != FLASH_UNKNOWN) {
515 addr2 = (FLASH_WORD_SIZE *)info->start[0];
516 *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
522 int wait_for_DQ7(flash_info_t *info, int sect)
524 ulong start, now, last;
525 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
527 start = get_timer (0);
529 while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
530 if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
531 printf ("Timeout\n");
534 /* show that we're waiting */
535 if ((now - last) > 1000) { /* every second */
543 int intel_wait_for_DQ7(flash_info_t *info, int sect)
545 ulong start, now, last;
546 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
548 start = get_timer (0);
550 while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
551 if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
552 printf ("Timeout\n");
555 /* show that we're waiting */
556 if ((now - last) > 1000) { /* every second */
561 addr[0]=(FLASH_WORD_SIZE)0x00500050;
565 /*-----------------------------------------------------------------------
568 int flash_erase (flash_info_t *info, int s_first, int s_last)
570 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
571 volatile FLASH_WORD_SIZE *addr2;
572 int flag, prot, sect, l_sect;
576 if ((s_first < 0) || (s_first > s_last)) {
577 if (info->flash_id == FLASH_UNKNOWN) {
578 printf ("- missing\n");
580 printf ("- no sectors to erase\n");
585 if (info->flash_id == FLASH_UNKNOWN) {
586 printf ("Can't erase unknown flash type - aborted\n");
591 for (sect=s_first; sect<=s_last; ++sect) {
592 if (info->protect[sect]) {
598 printf ("- Warning: %d protected sectors will not be erased!\n",
606 /* Disable interrupts which might cause a timeout here */
607 flag = disable_interrupts();
609 /* Start erase on unprotected sectors */
610 for (sect = s_first; sect<=s_last; sect++) {
611 if (info->protect[sect] == 0) { /* not protected */
612 addr2 = (FLASH_WORD_SIZE *)(info->start[sect]);
613 /* printf("Erasing sector %p\n", addr2); */ /* CLH */
614 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
615 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
616 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
617 addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
618 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
619 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
620 addr2[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */
622 udelay(1000); /* wait 1 ms */
623 wait_for_DQ7(info, sect);
626 if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
627 addr2[0] = (FLASH_WORD_SIZE)0x00600060; /* unlock sector */
628 addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */
629 intel_wait_for_DQ7(info, sect);
630 addr2[0] = (FLASH_WORD_SIZE)0x00200020; /* sector erase */
631 addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */
632 intel_wait_for_DQ7(info, sect);
635 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
636 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
637 addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
638 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
639 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
640 addr2[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */
641 wait_for_DQ7(info, sect);
646 * Wait for each sector to complete, it's more
647 * reliable. According to AMD Spec, you must
648 * issue all erase commands within a specified
649 * timeout. This has been seen to fail, especially
650 * if printf()s are included (for debug)!!
652 /* wait_for_DQ7(info, sect); */
656 /* re-enable interrupts if necessary */
660 /* wait at least 80us - let's wait 1 ms */
665 * We wait for the last triggered sector
669 wait_for_DQ7(info, l_sect);
673 /* reset to read mode */
674 addr = (FLASH_WORD_SIZE *)info->start[0];
675 addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
682 void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt)
685 volatile FLASH_WORD_SIZE *addr2;
688 for(i=info->sector_count-1;i>0;i--)
690 if(addr>=info->start[i])
694 addr2 = (FLASH_WORD_SIZE *)(info->start[i]);
695 addr2[0] = (FLASH_WORD_SIZE)0x00600060; /* unlock sector setup */
696 addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* unlock sector */
697 intel_wait_for_DQ7(info, i);
699 c-=(info->start[i]-info->start[i-1]);
704 /*-----------------------------------------------------------------------
705 * Copy memory to flash, returns:
708 * 2 - Flash not erased
711 int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
716 if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
717 unlock_intel_sectors(info,addr,cnt);
719 wp = (addr & ~3); /* get lower word aligned address */
721 * handle unaligned start bytes
723 if ((l = addr - wp) != 0) {
725 for (i=0, cp=wp; i<l; ++i, ++cp) {
726 data = (data << 8) | (*(uchar *)cp);
728 for (; i<4 && cnt>0; ++i) {
729 data = (data << 8) | *src++;
733 for (; cnt==0 && i<4; ++i, ++cp) {
734 data = (data << 8) | (*(uchar *)cp);
737 if ((rc = write_word(info, wp, data)) != 0) {
744 * handle word aligned part
748 for (i=0; i<4; ++i) {
749 data = (data << 8) | *src++;
751 if ((rc = write_word(info, wp, data)) != 0) {
755 if((wp % 0x10000)==0)
756 printf("."); /* show Progress */
765 * handle unaligned tail bytes
768 for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
769 data = (data << 8) | *src++;
772 for (; i<4; ++i, ++cp) {
773 data = (data << 8) | (*(uchar *)cp);
775 rc=write_word(info, wp, data);
779 /*-----------------------------------------------------------------------
780 * Write a word to Flash, returns:
783 * 2 - Flash not erased
785 static FLASH_WORD_SIZE *read_val = (FLASH_WORD_SIZE *)0x200000;
787 static int write_word (flash_info_t *info, ulong dest, ulong data)
789 volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]);
790 volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest;
791 volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data;
796 /* Check if Flash is (sufficiently) erased */
797 if ((*((volatile FLASH_WORD_SIZE *)dest) &
798 (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) {
801 /* Disable interrupts which might cause a timeout here */
802 flag = disable_interrupts();
803 for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++)
805 if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
806 /* intel style writting */
807 dest2[i] = (FLASH_WORD_SIZE)0x00500050;
808 dest2[i] = (FLASH_WORD_SIZE)0x00400040;
809 *read_val++ = data2[i];
813 /* data polling for D7 */
814 start = get_timer (0);
816 while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080)
818 if (get_timer(start) > CFG_FLASH_WRITE_TOUT)
821 dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
823 dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
824 if(dest2[i]!=data2[i])
825 printf("Error at %p 0x%04X != 0x%04X\n",&dest2[i],dest2[i],data2[i]);
828 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
829 addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
830 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0;
832 /* re-enable interrupts if necessary */
835 /* data polling for D7 */
836 start = get_timer (0);
837 while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) !=
838 (data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
839 if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
848 /*-----------------------------------------------------------------------