2 * board/mx1ads/syncflash.c
5 * Techware Information Technology, Inc.
6 * http://www.techware.com.tw/
8 * Ming-Len Wu <minglen_wu@techware.com.tw>
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 /*#include <mc9328.h>*/
28 #include <asm/arch/imx-regs.h>
30 typedef unsigned long * p_u32;
32 /* 4Mx16x2 IAM=0 CSD1 */
34 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
36 /* Following Setting is for CSD1 */
37 #define SFCTL 0x00221004
38 #define reg_SFCTL __REG(SFCTL)
40 #define SYNCFLASH_A10 (0x00100000)
42 #define CMD_NORMAL (0x81020300) /* Normal Mode */
43 #define CMD_PREC (CMD_NORMAL + 0x10000000) /* Precharge Command */
44 #define CMD_AUTO (CMD_NORMAL + 0x20000000) /* Auto Refresh Command */
45 #define CMD_LMR (CMD_NORMAL + 0x30000000) /* Load Mode Register Command */
46 #define CMD_LCR (CMD_NORMAL + 0x60000000) /* LCR Command */
47 #define CMD_PROGRAM (CMD_NORMAL + 0x70000000)
49 #define MODE_REG_VAL (CONFIG_SYS_FLASH_BASE+0x0008CC00) /* Cas Latency 3 */
52 #define LCR_READSTATUS (0x0001C000) /* 0x70 */
53 #define LCR_ERASE_CONFIRM (0x00008000) /* 0x20 */
54 #define LCR_ERASE_NVMODE (0x0000C000) /* 0x30 */
55 #define LCR_PROG_NVMODE (0x00028000) /* 0xA0 */
56 #define LCR_SR_CLEAR (0x00014000) /* 0x50 */
58 /* Get Status register */
62 reg_SFCTL = CMD_PROGRAM;
63 tmp = __REG(CONFIG_SYS_FLASH_BASE);
65 reg_SFCTL = CMD_NORMAL;
67 reg_SFCTL = CMD_LCR; /* Activate LCR Mode */
68 __REG(CONFIG_SYS_FLASH_BASE + LCR_SR_CLEAR);
73 /* check if SyncFlash is ready */
79 if ((tmp & 0x00800000) && (tmp & 0x001C0000)) {
80 printf ("SyncFlash Error code %08x\n",tmp);
83 if ((tmp & 0x00000080) && (tmp & 0x0000001C)) {
84 printf ("SyncFlash Error code %08x\n",tmp);
87 if (tmp == 0x00800080) /* Test Bit 7 of SR */
93 /* Issue the precharge all command */
94 void SF_PrechargeAll(void) {
96 /* Set Precharge Command */
98 /* Issue Precharge All Command */
99 __REG(CONFIG_SYS_FLASH_BASE + SYNCFLASH_A10);
102 /* set SyncFlash to normal mode */
103 void SF_Normal(void) {
107 reg_SFCTL = CMD_NORMAL;
110 /* Erase SyncFlash */
111 void SF_Erase(u32 RowAddress) {
113 reg_SFCTL = CMD_NORMAL;
116 reg_SFCTL = CMD_PREC;
119 reg_SFCTL = CMD_LCR; /* Set LCR mode */
120 __REG(RowAddress + LCR_ERASE_CONFIRM) = 0; /* Issue Erase Setup Command */
122 reg_SFCTL = CMD_NORMAL; /* return to Normal mode */
123 __REG(RowAddress) = 0xD0D0D0D0; /* Confirm */
128 void SF_NvmodeErase(void) {
131 reg_SFCTL = CMD_LCR; /* Set to LCR mode */
132 __REG(CONFIG_SYS_FLASH_BASE + LCR_ERASE_NVMODE) = 0; /* Issue Erase Nvmode Reg Command */
134 reg_SFCTL = CMD_NORMAL; /* Return to Normal mode */
135 __REG(CONFIG_SYS_FLASH_BASE + LCR_ERASE_NVMODE) = 0xC0C0C0C0; /* Confirm */
140 void SF_NvmodeWrite(void) {
143 reg_SFCTL = CMD_LCR; /* Set to LCR mode */
144 __REG(CONFIG_SYS_FLASH_BASE+LCR_PROG_NVMODE) = 0; /* Issue Program Nvmode reg command */
146 reg_SFCTL = CMD_NORMAL; /* Return to Normal mode */
147 __REG(CONFIG_SYS_FLASH_BASE+LCR_PROG_NVMODE) = 0xC0C0C0C0; /* Confirm not needed */
150 /****************************************************************************************/
152 ulong flash_init(void) {
155 /* Turn on CSD1 for negating RESETSF of SyncFLash */
157 reg_SFCTL |= 0x80000000; /* enable CSD1 for SyncFlash */
160 reg_SFCTL = CMD_LMR; /* Set Load Mode Register Command */
161 __REG(MODE_REG_VAL); /* Issue Load Mode Register Command */
167 flash_info[i].flash_id = FLASH_MAN_MT | FLASH_MT28S4M16LC;
169 flash_info[i].size = FLASH_BANK_SIZE;
170 flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
172 memset(flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
174 for (j = 0; j < flash_info[i].sector_count; j++) {
175 flash_info[i].start[j] = CONFIG_SYS_FLASH_BASE + j * 0x00100000;
178 flash_protect(FLAG_PROTECT_SET,
179 CONFIG_SYS_FLASH_BASE,
180 CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
183 flash_protect(FLAG_PROTECT_SET,
185 CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
188 return FLASH_BANK_SIZE;
191 void flash_print_info (flash_info_t *info) {
195 switch (info->flash_id & FLASH_VENDMASK) {
196 case (FLASH_MAN_MT & FLASH_VENDMASK):
200 printf("Unknown Vendor ");
204 switch (info->flash_id & FLASH_TYPEMASK) {
205 case (FLASH_MT28S4M16LC & FLASH_TYPEMASK):
206 printf("2x FLASH_MT28S4M16LC (16MB Total)\n");
209 printf("Unknown Chip Type\n");
214 printf(" Size: %ld MB in %d Sectors\n",
215 info->size >> 20, info->sector_count);
217 printf(" Sector Start Addresses: ");
219 for (i = 0; i < info->sector_count; i++) {
223 printf (" %08lX%s", info->start[i],
224 info->protect[i] ? " (RO)" : " ");
230 /*-----------------------------------------------------------------------*/
232 int flash_erase (flash_info_t *info, int s_first, int s_last) {
233 int iflag, cflag, prot, sect;
236 /* first look for protection bits */
238 if (info->flash_id == FLASH_UNKNOWN)
239 return ERR_UNKNOWN_FLASH_TYPE;
241 if ((s_first < 0) || (s_first > s_last))
244 if ((info->flash_id & FLASH_VENDMASK) != (FLASH_MAN_MT & FLASH_VENDMASK))
245 return ERR_UNKNOWN_FLASH_VENDOR;
249 for (sect = s_first; sect <= s_last; ++sect) {
250 if (info->protect[sect])
255 printf("protected!\n");
256 return ERR_PROTECTED;
259 * Disable interrupts which might cause a timeout
260 * here. Remember that our exception vectors are
261 * at address 0 in the flash, and we don't want a
262 * (ticker) exception to happen while the flash
263 * chip is in programming mode.
266 cflag = icache_status();
268 iflag = disable_interrupts();
270 /* Start erase on unprotected sectors */
271 for (sect = s_first; sect <= s_last && !ctrlc(); sect++) {
273 printf("Erasing sector %2d ... ", sect);
275 /* arm simple, non interrupt dependent timer */
282 SF_Erase(CONFIG_SYS_FLASH_BASE + (0x0100000 * sect));
289 printf("User Interrupt!\n");
300 /*-----------------------------------------------------------------------
301 * Copy memory to flash.
304 int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) {
307 for(i = 0; i < cnt; i += 4) {
311 reg_SFCTL = CMD_PROGRAM; /* Enter SyncFlash Program mode */
312 __REG(addr + i) = __REG((u32)src + i);