2 * (C) Copyright 2010,2011
3 * NVIDIA Corporation <www.nvidia.com>
5 * SPDX-License-Identifier: GPL-2.0+
11 #include <linux/compiler.h>
13 #include <asm/arch/clock.h>
15 #include <asm/arch/display.h>
17 #include <asm/arch/funcmux.h>
18 #include <asm/arch/pinmux.h>
19 #include <asm/arch/pmu.h>
20 #ifdef CONFIG_PWM_TEGRA
21 #include <asm/arch/pwm.h>
23 #include <asm/arch/tegra.h>
24 #include <asm/arch-tegra/board.h>
25 #include <asm/arch-tegra/clk_rst.h>
26 #include <asm/arch-tegra/pmc.h>
27 #include <asm/arch-tegra/sys_proto.h>
28 #include <asm/arch-tegra/uart.h>
29 #include <asm/arch-tegra/warmboot.h>
30 #ifdef CONFIG_TEGRA_CLOCK_SCALING
31 #include <asm/arch/emc.h>
33 #ifdef CONFIG_USB_EHCI_TEGRA
34 #include <asm/arch-tegra/usb.h>
37 #ifdef CONFIG_TEGRA_MMC
38 #include <asm/arch-tegra/tegra_mmc.h>
39 #include <asm/arch-tegra/mmc.h>
41 #include <asm/arch-tegra/xusb-padctl.h>
46 DECLARE_GLOBAL_DATA_PTR;
48 #ifdef CONFIG_SPL_BUILD
49 /* TODO(sjg@chromium.org): Remove once SPL supports device tree */
50 U_BOOT_DEVICE(tegra_gpios) = {
55 const struct tegra_sysinfo sysinfo = {
56 CONFIG_TEGRA_BOARD_STRING
59 __weak void pinmux_init(void) {}
60 __weak void pin_mux_usb(void) {}
61 __weak void pin_mux_spi(void) {}
62 __weak void gpio_early_init_uart(void) {}
63 __weak void pin_mux_display(void) {}
65 #if defined(CONFIG_TEGRA_NAND)
66 __weak void pin_mux_nand(void)
68 funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT);
73 * Routine: power_det_init
74 * Description: turn off power detects
76 static void power_det_init(void)
78 #if defined(CONFIG_TEGRA20)
79 struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
81 /* turn off power detects */
82 writel(0, &pmc->pmc_pwr_det_latch);
83 writel(0, &pmc->pmc_pwr_det);
89 * Description: Early hardware init.
93 __maybe_unused int err;
95 /* Do clocks and UART first so that printf() works */
99 #ifdef CONFIG_TEGRA_SPI
103 #ifdef CONFIG_PWM_TEGRA
104 if (pwm_init(gd->fdt_blob))
105 debug("%s: Failed to init pwm\n", __func__);
109 tegra_lcd_check_next_stage(gd->fdt_blob, 0);
111 /* boot param addr */
112 gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
116 #ifdef CONFIG_SYS_I2C_TEGRA
117 # ifdef CONFIG_TEGRA_PMU
118 if (pmu_set_nominal())
119 debug("Failed to select nominal voltages\n");
120 # ifdef CONFIG_TEGRA_CLOCK_SCALING
121 err = board_emc_init();
123 debug("Memory controller init failed: %d\n", err);
125 # endif /* CONFIG_TEGRA_PMU */
126 #endif /* CONFIG_SYS_I2C_TEGRA */
128 #ifdef CONFIG_USB_EHCI_TEGRA
130 usb_process_devicetree(gd->fdt_blob);
134 tegra_lcd_check_next_stage(gd->fdt_blob, 0);
137 #ifdef CONFIG_TEGRA_NAND
141 tegra_xusb_padctl_init(gd->fdt_blob);
143 #ifdef CONFIG_TEGRA_LP0
144 /* save Sdram params to PMC 2, 4, and 24 for WB0 */
145 warmboot_save_sdram_params();
147 /* prepare the WB code to LP0 location */
148 warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE);
154 #ifdef CONFIG_BOARD_EARLY_INIT_F
155 static void __gpio_early_init(void)
159 void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init")));
161 int board_early_init_f(void)
166 /* Initialize periph GPIOs */
168 gpio_early_init_uart();
170 tegra_lcd_early_init(gd->fdt_blob);
175 #endif /* EARLY_INIT */
177 int board_late_init(void)
180 /* Make sure we finish initing the LCD */
181 tegra_lcd_check_next_stage(gd->fdt_blob, 1);
186 #if defined(CONFIG_TEGRA_MMC)
187 __weak void pin_mux_mmc(void)
191 /* this is a weak define that we are overriding */
192 int board_mmc_init(bd_t *bd)
194 debug("%s called\n", __func__);
196 /* Enable muxes, etc. for SDMMC controllers */
199 debug("%s: init MMC\n", __func__);
205 void pad_init_mmc(struct mmc_host *host)
207 #if defined(CONFIG_TEGRA30)
208 enum periph_id id = host->mmc_id;
211 debug("%s: sdmmc address = %08x, id = %d\n", __func__,
212 (unsigned int)host->reg, id);
214 /* Set the pad drive strength for SDMMC1 or 3 only */
215 if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) {
216 debug("%s: settings are only valid for SDMMC1/SDMMC3!\n",
221 val = readl(&host->reg->sdmemcmppadctl);
223 val |= MEMCOMP_PADCTRL_VREF;
224 writel(val, &host->reg->sdmemcmppadctl);
226 val = readl(&host->reg->autocalcfg);
228 val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED;
229 writel(val, &host->reg->autocalcfg);