2 * Voipac PXA270 Support
4 * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 #include <asm/arch/hardware.h>
24 #include <asm/arch/regs-mmc.h>
29 DECLARE_GLOBAL_DATA_PTR;
32 * Miscelaneous platform dependent initialisations
36 /* We have RAM, disable cache */
40 /* memory and cpu-speed are setup before relocation */
41 /* so we do _nothing_ here */
43 /* Arch number of vpac270 */
44 gd->bd->bi_arch_number = MACH_TYPE_VPAC270;
46 /* adress of boot parameters */
47 gd->bd->bi_boot_params = 0xa0000100;
52 struct serial_device *default_serial_console(void)
54 return &serial_ffuart_device;
57 extern void pxa_dram_init(void);
61 gd->ram_size = PHYS_SDRAM_1_SIZE;
65 void dram_init_banksize(void)
67 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
68 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
70 #ifdef CONFIG_RAM_256M
71 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
72 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
77 int board_mmc_init(bd_t *bis)
85 int usb_board_init(void)
87 writel((UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
88 ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
91 writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
93 while (readl(UHCHR) & UHCHR_FSBIR)
96 writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
97 writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
99 /* Clear any OTG Pin Hold */
100 if (readl(PSSR) & PSSR_OTGPH)
101 writel(readl(PSSR) | PSSR_OTGPH, PSSR);
103 writel(readl(UHCRHDA) & ~(0x200), UHCRHDA);
104 writel(readl(UHCRHDA) | 0x100, UHCRHDA);
106 /* Set port power control mask bits, only 3 ports. */
107 writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB);
110 writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
111 UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
116 void usb_board_init_fail(void)
121 void usb_board_stop(void)
123 writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
125 writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
127 writel(readl(UHCCOMS) | 1, UHCCOMS);
130 writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
136 #ifdef CONFIG_DRIVER_DM9000
137 int board_eth_init(bd_t *bis)
139 return dm9000_initialize(bis);