2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * SPDX-License-Identifier: GPL-2.0+
14 #include <linux/compiler.h>
16 #include <environment.h>
20 #if defined(CONFIG_CMD_IDE)
29 /* TODO: Can we move these into arch/ headers? */
39 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
46 #include <status_led.h>
49 #include <asm/errno.h>
51 #include <asm/sections.h>
52 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
53 #include <asm/init_helpers.h>
54 #include <asm/relocate.h>
57 #include <asm/state.h>
60 #include <linux/compiler.h>
63 * Pointer to initial global data area
65 * Here we initialize it if needed.
67 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
68 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
69 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
70 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
72 DECLARE_GLOBAL_DATA_PTR;
76 * TODO(sjg@chromium.org): IMO this code should be
77 * refactored to a single function, something like:
79 * void led_set_state(enum led_colour_t colour, int on);
81 /************************************************************************
82 * Coloured LED functionality
83 ************************************************************************
84 * May be supplied by boards if desired
86 __weak void coloured_LED_init(void) {}
87 __weak void red_led_on(void) {}
88 __weak void red_led_off(void) {}
89 __weak void green_led_on(void) {}
90 __weak void green_led_off(void) {}
91 __weak void yellow_led_on(void) {}
92 __weak void yellow_led_off(void) {}
93 __weak void blue_led_on(void) {}
94 __weak void blue_led_off(void) {}
97 * Why is gd allocated a register? Prior to reloc it might be better to
98 * just pass it around to each function in this file?
100 * After reloc one could argue that it is hardly used and doesn't need
101 * to be in a register. Or if it is it should perhaps hold pointers to all
102 * global data for all modules, so that post-reloc we can avoid the massive
103 * literal pool we get on ARM. Or perhaps just encourage each module to use
108 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
111 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
112 static int init_func_watchdog_init(void)
114 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
115 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
116 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
117 defined(CONFIG_IMX_WATCHDOG))
120 puts(" Watchdog enabled\n");
126 int init_func_watchdog_reset(void)
132 #endif /* CONFIG_WATCHDOG */
134 __weak void board_add_ram_info(int use_default)
136 /* please define platform specific board_add_ram_info() */
139 static int init_baud_rate(void)
141 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
145 static int display_text_info(void)
147 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
148 ulong bss_start, bss_end, text_base;
150 bss_start = (ulong)&__bss_start;
151 bss_end = (ulong)&__bss_end;
153 #ifdef CONFIG_SYS_TEXT_BASE
154 text_base = CONFIG_SYS_TEXT_BASE;
156 text_base = CONFIG_SYS_MONITOR_BASE;
159 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
160 text_base, bss_start, bss_end);
163 #ifdef CONFIG_MODEM_SUPPORT
164 debug("Modem Support enabled\n");
166 #ifdef CONFIG_USE_IRQ
167 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
168 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
174 static int announce_dram_init(void)
180 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
181 static int init_func_ram(void)
183 #ifdef CONFIG_BOARD_TYPES
184 int board_type = gd->board_type;
186 int board_type = 0; /* use dummy arg */
189 gd->ram_size = initdram(board_type);
191 if (gd->ram_size > 0)
194 puts("*** failed ***\n");
199 static int show_dram_config(void)
201 unsigned long long size;
203 #ifdef CONFIG_NR_DRAM_BANKS
206 debug("\nRAM Configuration:\n");
207 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
208 size += gd->bd->bi_dram[i].size;
209 debug("Bank #%d: %llx ", i,
210 (unsigned long long)(gd->bd->bi_dram[i].start));
212 print_size(gd->bd->bi_dram[i].size, "\n");
220 print_size(size, "");
221 board_add_ram_info(0);
227 __weak void dram_init_banksize(void)
229 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
230 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
231 gd->bd->bi_dram[0].size = get_effective_memsize();
235 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
236 static int init_func_i2c(void)
239 #ifdef CONFIG_SYS_I2C
242 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
249 #if defined(CONFIG_HARD_SPI)
250 static int init_func_spi(void)
260 static int zero_global_data(void)
262 memset((void *)gd, '\0', sizeof(gd_t));
267 static int setup_mon_len(void)
269 #if defined(__ARM__) || defined(__MICROBLAZE__)
270 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
271 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
272 gd->mon_len = (ulong)&_end - (ulong)_init;
273 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
274 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
276 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
277 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
282 __weak int arch_cpu_init(void)
287 #ifdef CONFIG_SANDBOX
288 static int setup_ram_buf(void)
290 struct sandbox_state *state = state_get_current();
292 gd->arch.ram_buf = state->ram_buf;
293 gd->ram_size = state->ram_size;
299 /* Get the top of usable RAM */
300 __weak ulong board_get_usable_ram_top(ulong total_size)
302 #ifdef CONFIG_SYS_SDRAM_BASE
304 * Detect whether we have so much RAM that it goes past the end of our
305 * 32-bit address space. If so, clip the usable RAM so it doesn't.
307 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
309 * Will wrap back to top of 32-bit space when reservations
317 static int setup_dest_addr(void)
319 debug("Monitor len: %08lX\n", gd->mon_len);
321 * Ram is setup, size stored in gd !!
323 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
324 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
326 * Subtract specified amount of memory to hide so that it won't
327 * get "touched" at all by U-Boot. By fixing up gd->ram_size
328 * the Linux kernel should now get passed the now "corrected"
329 * memory size and won't touch it either. This should work
330 * for arch/ppc and arch/powerpc. Only Linux board ports in
331 * arch/powerpc with bootwrapper support, that recalculate the
332 * memory size from the SDRAM controller setup will have to
335 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
337 #ifdef CONFIG_SYS_SDRAM_BASE
338 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
340 gd->ram_top += get_effective_memsize();
341 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
342 gd->relocaddr = gd->ram_top;
343 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
344 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
346 * We need to make sure the location we intend to put secondary core
347 * boot code is reserved and not used by any part of u-boot
349 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
350 gd->relocaddr = determine_mp_bootpg(NULL);
351 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
357 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
358 static int reserve_logbuffer(void)
360 /* reserve kernel log buffer */
361 gd->relocaddr -= LOGBUFF_RESERVE;
362 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
369 /* reserve protected RAM */
370 static int reserve_pram(void)
374 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
375 gd->relocaddr -= (reg << 10); /* size is in kB */
376 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
380 #endif /* CONFIG_PRAM */
382 /* Round memory pointer down to next 4 kB limit */
383 static int reserve_round_4k(void)
385 gd->relocaddr &= ~(4096 - 1);
389 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
391 static int reserve_mmu(void)
393 /* reserve TLB table */
394 gd->arch.tlb_size = PGTABLE_SIZE;
395 gd->relocaddr -= gd->arch.tlb_size;
397 /* round down to next 64 kB limit */
398 gd->relocaddr &= ~(0x10000 - 1);
400 gd->arch.tlb_addr = gd->relocaddr;
401 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
402 gd->arch.tlb_addr + gd->arch.tlb_size);
408 static int reserve_lcd(void)
410 #ifdef CONFIG_FB_ADDR
411 gd->fb_base = CONFIG_FB_ADDR;
413 /* reserve memory for LCD display (always full pages) */
414 gd->relocaddr = lcd_setmem(gd->relocaddr);
415 gd->fb_base = gd->relocaddr;
416 #endif /* CONFIG_FB_ADDR */
419 #endif /* CONFIG_LCD */
421 static int reserve_trace(void)
424 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
425 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
426 debug("Reserving %dk for trace data at: %08lx\n",
427 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
433 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
434 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
435 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
436 static int reserve_video(void)
438 /* reserve memory for video display (always full pages) */
439 gd->relocaddr = video_setmem(gd->relocaddr);
440 gd->fb_base = gd->relocaddr;
446 static int reserve_uboot(void)
449 * reserve memory for U-Boot code, data & bss
450 * round down to next 4 kB limit
452 gd->relocaddr -= gd->mon_len;
453 gd->relocaddr &= ~(4096 - 1);
455 /* round down to next 64 kB limit so that IVPR stays aligned */
456 gd->relocaddr &= ~(65536 - 1);
459 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
462 gd->start_addr_sp = gd->relocaddr;
467 #ifndef CONFIG_SPL_BUILD
468 /* reserve memory for malloc() area */
469 static int reserve_malloc(void)
471 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
472 debug("Reserving %dk for malloc() at: %08lx\n",
473 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
477 /* (permanently) allocate a Board Info struct */
478 static int reserve_board(void)
481 gd->start_addr_sp -= sizeof(bd_t);
482 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
483 memset(gd->bd, '\0', sizeof(bd_t));
484 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
485 sizeof(bd_t), gd->start_addr_sp);
491 static int setup_machine(void)
493 #ifdef CONFIG_MACH_TYPE
494 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
499 static int reserve_global_data(void)
501 gd->start_addr_sp -= sizeof(gd_t);
502 gd->start_addr_sp &= ~0xf;
503 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
504 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
505 sizeof(gd_t), gd->start_addr_sp);
509 static int reserve_fdt(void)
512 * If the device tree is sitting immediately above our image then we
513 * must relocate it. If it is embedded in the data section, then it
514 * will be relocated with other data.
517 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
519 gd->start_addr_sp -= gd->fdt_size;
520 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
521 debug("Reserving %lu Bytes for FDT at: %08lx\n",
522 gd->fdt_size, gd->start_addr_sp);
528 int arch_reserve_stacks(void)
533 static int reserve_stacks(void)
535 /* make stack pointer 16-byte aligned */
536 gd->start_addr_sp -= 16;
537 gd->start_addr_sp &= ~0xf;
540 * let the architecture-specific code tailor gd->start_addr_sp and
543 return arch_reserve_stacks();
546 static int display_new_sp(void)
548 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
553 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
554 static int setup_board_part1(void)
559 * Save local variables to board info struct
561 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
562 bd->bi_memsize = gd->ram_size; /* size in bytes */
564 #ifdef CONFIG_SYS_SRAM_BASE
565 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
566 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
569 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
570 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
571 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
573 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
574 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
576 #if defined(CONFIG_MPC83xx)
577 bd->bi_immrbar = CONFIG_SYS_IMMR;
583 static int setup_board_part2(void)
587 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
588 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
589 #if defined(CONFIG_CPM2)
590 bd->bi_cpmfreq = gd->arch.cpm_clk;
591 bd->bi_brgfreq = gd->arch.brg_clk;
592 bd->bi_sccfreq = gd->arch.scc_clk;
593 bd->bi_vco = gd->arch.vco_out;
594 #endif /* CONFIG_CPM2 */
595 #if defined(CONFIG_MPC512X)
596 bd->bi_ipsfreq = gd->arch.ips_clk;
597 #endif /* CONFIG_MPC512X */
598 #if defined(CONFIG_MPC5xxx)
599 bd->bi_ipbfreq = gd->arch.ipb_clk;
600 bd->bi_pcifreq = gd->pci_clk;
601 #endif /* CONFIG_MPC5xxx */
602 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
603 bd->bi_pcifreq = gd->pci_clk;
605 #if defined(CONFIG_EXTRA_CLOCK)
606 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
607 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
608 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
615 #ifdef CONFIG_SYS_EXTBDINFO
616 static int setup_board_extra(void)
620 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
621 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
622 sizeof(bd->bi_r_version));
624 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
625 bd->bi_plb_busfreq = gd->bus_clk;
626 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
627 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
628 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
629 bd->bi_pci_busfreq = get_PCI_freq();
630 bd->bi_opbfreq = get_OPB_freq();
631 #elif defined(CONFIG_XILINX_405)
632 bd->bi_pci_busfreq = get_PCI_freq();
640 static int init_post(void)
642 post_bootmode_init();
643 post_run(NULL, POST_ROM | post_bootmode_get(0));
649 static int setup_dram_config(void)
651 /* Ram is board specific, so move it to board code ... */
652 dram_init_banksize();
657 static int reloc_fdt(void)
659 if (gd->flags & GD_FLG_SKIP_RELOC)
662 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
663 gd->fdt_blob = gd->new_fdt;
669 static int setup_reloc(void)
671 if (gd->flags & GD_FLG_SKIP_RELOC) {
672 debug("Skipping relocation due to flag\n");
676 #ifdef CONFIG_SYS_TEXT_BASE
677 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
680 * On all ColdFire arch cpu, monitor code starts always
681 * just after the default vector table location, so at 0x400
683 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
686 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
688 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
689 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
690 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
696 /* ARM calls relocate_code from its crt0.S */
697 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
699 static int jump_to_copy(void)
701 if (gd->flags & GD_FLG_SKIP_RELOC)
704 * x86 is special, but in a nice way. It uses a trampoline which
705 * enables the dcache if possible.
707 * For now, other archs use relocate_code(), which is implemented
708 * similarly for all archs. When we do generic relocation, hopefully
709 * we can make all archs enable the dcache prior to relocation.
711 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
713 * SDRAM and console are now initialised. The final stack can now
714 * be setup in SDRAM. Code execution will continue in Flash, but
715 * with the stack in SDRAM and Global Data in temporary memory
718 arch_setup_gd(gd->new_gd);
719 board_init_f_r_trampoline(gd->start_addr_sp);
721 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
728 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
729 static int mark_bootstage(void)
731 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
736 static int initf_dm(void)
738 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
741 ret = dm_init_and_scan(true);
749 /* Architecture-specific memory reservation */
750 __weak int reserve_arch(void)
755 __weak int arch_cpu_init_dm(void)
760 static init_fnc_t init_sequence_f[] = {
761 #ifdef CONFIG_SANDBOX
765 #ifdef CONFIG_OF_CONTROL
768 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
775 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
776 /* TODO: can this go into arch_cpu_init()? */
779 arch_cpu_init, /* basic arch cpu dependent setup */
783 #if defined(CONFIG_BOARD_EARLY_INIT_F)
786 /* TODO: can any of this go into arch_cpu_init()? */
787 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
788 get_clocks, /* get CPU and bus clocks (etc.) */
789 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
790 && !defined(CONFIG_TQM885D)
791 adjust_sdram_tbs_8xx,
793 /* TODO: can we rename this to timer_init()? */
796 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN)
797 timer_init, /* initialize timer */
799 #ifdef CONFIG_SYS_ALLOC_DPRAM
800 #if !defined(CONFIG_CPM2)
804 #if defined(CONFIG_BOARD_POSTCLK_INIT)
807 #ifdef CONFIG_FSL_ESDHC
813 env_init, /* initialize environment */
814 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
815 /* get CPU and bus clocks according to the environment variable */
817 /* adjust sdram refresh rate according to the new clock */
821 init_baud_rate, /* initialze baudrate settings */
822 serial_init, /* serial communications setup */
823 console_init_f, /* stage 1 init of console */
824 #ifdef CONFIG_SANDBOX
825 sandbox_early_getopt_check,
827 #ifdef CONFIG_OF_CONTROL
830 display_options, /* say that we are here */
831 display_text_info, /* show debugging info if required */
832 #if defined(CONFIG_MPC8260)
835 #endif /* CONFIG_MPC8260 */
836 #if defined(CONFIG_MPC83xx)
839 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
842 print_cpuinfo, /* display cpu info (and speed) */
843 #if defined(CONFIG_MPC5xxx)
845 #endif /* CONFIG_MPC5xxx */
846 #if defined(CONFIG_DISPLAY_BOARDINFO)
849 INIT_FUNC_WATCHDOG_INIT
850 #if defined(CONFIG_MISC_INIT_F)
853 INIT_FUNC_WATCHDOG_RESET
854 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
857 #if defined(CONFIG_HARD_SPI)
861 /* TODO: unify all these dram functions? */
862 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
863 dram_init, /* configure available RAM banks */
865 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
871 INIT_FUNC_WATCHDOG_RESET
872 #if defined(CONFIG_SYS_DRAM_TEST)
874 #endif /* CONFIG_SYS_DRAM_TEST */
875 INIT_FUNC_WATCHDOG_RESET
880 INIT_FUNC_WATCHDOG_RESET
882 * Now that we have DRAM mapped and working, we can
883 * relocate the code and continue running from DRAM.
885 * Reserve memory at end of RAM for (top down in that order):
886 * - area that won't get touched by U-Boot and Linux (optional)
887 * - kernel log buffer
891 * - board info struct
894 #if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
895 /* Blackfin u-boot monitor should be on top of the ram */
898 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
905 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
913 /* TODO: Why the dependency on CONFIG_8xx? */
914 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
915 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
916 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
919 #if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2)
922 #ifndef CONFIG_SPL_BUILD
933 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
935 INIT_FUNC_WATCHDOG_RESET
939 #ifdef CONFIG_SYS_EXTBDINFO
942 INIT_FUNC_WATCHDOG_RESET
945 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
950 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
956 void board_init_f(ulong boot_flags)
958 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
960 * For some archtectures, global data is initialized and used before
961 * calling this function. The data should be preserved. For others,
962 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
963 * here to host global data until relocation.
970 * Clear global data before it is accessed at debug print
971 * in initcall_run_list. Otherwise the debug print probably
972 * get the wrong vaule of gd->have_console.
977 gd->flags = boot_flags;
978 gd->have_console = 0;
980 if (initcall_run_list(init_sequence_f))
983 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
984 !defined(CONFIG_EFI_APP)
985 /* NOTREACHED - jump_to_copy() does not return */
990 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
992 * For now this code is only used on x86.
994 * init_sequence_f_r is the list of init functions which are run when
995 * U-Boot is executing from Flash with a semi-limited 'C' environment.
996 * The following limitations must be considered when implementing an
998 * - 'static' variables are read-only
999 * - Global Data (gd->xxx) is read/write
1001 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1002 * supported). It _should_, if possible, copy global data to RAM and
1003 * initialise the CPU caches (to speed up the relocation process)
1005 * NOTE: At present only x86 uses this route, but it is intended that
1006 * all archs will move to this when generic relocation is implemented.
1008 static init_fnc_t init_sequence_f_r[] = {
1014 void board_init_f_r(void)
1016 if (initcall_run_list(init_sequence_f_r))
1020 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1021 * Transfer execution from Flash to RAM by calculating the address
1022 * of the in-RAM copy of board_init_r() and calling it
1024 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1026 /* NOTREACHED - board_init_r() does not return */
1029 #endif /* CONFIG_X86 */
1031 /* Unfortunately x86 can't compile this code as gd cannot be assigned */
1033 __weak void arch_setup_gd(struct global_data *gd_ptr)
1037 #endif /* !CONFIG_X86 */
1039 ulong board_init_f_mem(ulong top)
1041 struct global_data *gd_ptr;
1043 /* Leave space for the stack we are running with now */
1046 top -= sizeof(struct global_data);
1047 top = ALIGN(top, 16);
1048 gd_ptr = (struct global_data *)top;
1049 memset(gd_ptr, '\0', sizeof(*gd));
1050 arch_setup_gd(gd_ptr);
1052 #ifdef CONFIG_SYS_MALLOC_F_LEN
1053 top -= CONFIG_SYS_MALLOC_F_LEN;
1054 gd->malloc_base = top;