3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * I2C Functions similar to the standard memory functions.
27 * There are several parameters in many of the commands that bear further
30 * {i2c_chip} is the I2C chip address (the first byte sent on the bus).
31 * Each I2C chip on the bus has a unique address. On the I2C data bus,
32 * the address is the upper seven bits and the LSB is the "read/write"
33 * bit. Note that the {i2c_chip} address specified on the command
34 * line is not shifted up: e.g. a typical EEPROM memory chip may have
35 * an I2C address of 0x50, but the data put on the bus will be 0xA0
36 * for write and 0xA1 for read. This "non shifted" address notation
37 * matches at least half of the data sheets :-/.
39 * {addr} is the address (or offset) within the chip. Small memory
40 * chips have 8 bit addresses. Large memory chips have 16 bit
41 * addresses. Other memory chips have 9, 10, or 11 bit addresses.
42 * Many non-memory chips have multiple registers and {addr} is used
43 * as the register index. Some non-memory chips have only one register
44 * and therefore don't need any {addr} parameter.
46 * The default {addr} parameter is one byte (.1) which works well for
47 * memories and registers with 8 bits of address space.
49 * You can specify the length of the {addr} field with the optional .0,
50 * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are
51 * manipulating a single register device which doesn't use an address
52 * field, use "0.0" for the address and the ".0" length field will
53 * suppress the address in the I2C data stream. This also works for
54 * successive reads using the I2C auto-incrementing memory pointer.
56 * If you are manipulating a large memory with 2-byte addresses, use
57 * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal).
59 * Then there are the unfortunate memory chips that spill the most
60 * significant 1, 2, or 3 bits of address into the chip address byte.
61 * This effectively makes one chip (logically) look like 2, 4, or
62 * 8 chips. This is handled (awkwardly) by #defining
63 * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the
64 * {addr} field (since .1 is the default, it doesn't actually have to
65 * be specified). Examples: given a memory chip at I2C chip address
66 * 0x50, the following would happen...
67 * i2c md 50 0 10 display 16 bytes starting at 0x000
68 * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd>
69 * i2c md 50 100 10 display 16 bytes starting at 0x100
70 * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd>
71 * i2c md 50 210 10 display 16 bytes starting at 0x210
72 * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd>
73 * This is awfully ugly. It would be nice if someone would think up
74 * a better way of handling this.
76 * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de).
81 #include <environment.h>
84 #include <asm/byteorder.h>
86 /* Display values from last command.
87 * Memory modify remembered values are different from display memory.
89 static uchar i2c_dp_last_chip;
90 static uint i2c_dp_last_addr;
91 static uint i2c_dp_last_alen;
92 static uint i2c_dp_last_length = 0x10;
94 static uchar i2c_mm_last_chip;
95 static uint i2c_mm_last_addr;
96 static uint i2c_mm_last_alen;
98 /* If only one I2C bus is present, the list of devices to ignore when
99 * the probe command is issued is represented by a 1D array of addresses.
100 * When multiple buses are present, the list is an array of bus-address
101 * pairs. The following macros take care of this */
103 #if defined(CONFIG_SYS_I2C_NOPROBES)
104 #if defined(CONFIG_I2C_MULTI_BUS)
109 } i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
110 #define GET_BUS_NUM i2c_get_bus_num()
111 #define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b))
112 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a))
113 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr
114 #else /* single bus */
115 static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
116 #define GET_BUS_NUM 0
117 #define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */
118 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a))
119 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)]
120 #endif /* CONFIG_MULTI_BUS */
122 #define NUM_ELEMENTS_NOPROBE (sizeof(i2c_no_probes)/sizeof(i2c_no_probes[0]))
125 #if defined(CONFIG_I2C_MUX)
126 static I2C_MUX_DEVICE *i2c_mux_devices = NULL;
127 static int i2c_mux_busid = CONFIG_SYS_MAX_I2C_BUS;
129 DECLARE_GLOBAL_DATA_PTR;
133 /* TODO: Implement architecture-specific get/set functions */
134 unsigned int __def_i2c_get_bus_speed(void)
136 return CONFIG_SYS_I2C_SPEED;
138 unsigned int i2c_get_bus_speed(void)
139 __attribute__((weak, alias("__def_i2c_get_bus_speed")));
141 int __def_i2c_set_bus_speed(unsigned int speed)
143 if (speed != CONFIG_SYS_I2C_SPEED)
148 int i2c_set_bus_speed(unsigned int)
149 __attribute__((weak, alias("__def_i2c_set_bus_speed")));
153 * i2c md {i2c_chip} {addr}{.0, .1, .2} {len}
155 #define DISP_LINE_LEN 16
157 int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
160 uint addr, alen, length;
161 int j, nbytes, linebytes;
163 /* We use the last specified parameters, unless new ones are
166 chip = i2c_dp_last_chip;
167 addr = i2c_dp_last_addr;
168 alen = i2c_dp_last_alen;
169 length = i2c_dp_last_length;
176 if ((flag & CMD_FLAG_REPEAT) == 0) {
178 * New command specified.
185 chip = simple_strtoul(argv[1], NULL, 16);
188 * I2C data address within the chip. This can be 1 or
189 * 2 bytes long. Some day it might be 3 bytes long :-).
191 addr = simple_strtoul(argv[2], NULL, 16);
193 for (j = 0; j < 8; j++) {
194 if (argv[2][j] == '.') {
195 alen = argv[2][j+1] - '0';
201 } else if (argv[2][j] == '\0')
206 * If another parameter, it is the length to display.
207 * Length is the number of objects, not number of bytes.
210 length = simple_strtoul(argv[3], NULL, 16);
216 * We buffer all read data, so we can make sure data is read only
221 unsigned char linebuf[DISP_LINE_LEN];
224 linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
226 if (i2c_read(chip, addr, alen, linebuf, linebytes) != 0)
227 puts ("Error reading the chip.\n");
229 printf("%04x:", addr);
231 for (j=0; j<linebytes; j++) {
232 printf(" %02x", *cp++);
237 for (j=0; j<linebytes; j++) {
238 if ((*cp < 0x20) || (*cp > 0x7e))
247 } while (nbytes > 0);
249 i2c_dp_last_chip = chip;
250 i2c_dp_last_addr = addr;
251 i2c_dp_last_alen = alen;
252 i2c_dp_last_length = length;
258 /* Write (fill) memory
261 * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
263 int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
272 if ((argc < 4) || (argc > 5)) {
278 * Chip is always specified.
280 chip = simple_strtoul(argv[1], NULL, 16);
283 * Address is always specified.
285 addr = simple_strtoul(argv[2], NULL, 16);
287 for (j = 0; j < 8; j++) {
288 if (argv[2][j] == '.') {
289 alen = argv[2][j+1] - '0';
295 } else if (argv[2][j] == '\0')
300 * Value to write is always specified.
302 byte = simple_strtoul(argv[3], NULL, 16);
308 count = simple_strtoul(argv[4], NULL, 16);
312 while (count-- > 0) {
313 if (i2c_write(chip, addr++, alen, &byte, 1) != 0)
314 puts ("Error writing the chip.\n");
316 * Wait for the write to complete. The write can take
317 * up to 10mSec (we allow a little more time).
319 * On some chips, while the write is in progress, the
320 * chip doesn't respond. This apparently isn't a
321 * universal feature so we don't take advantage of it.
324 * No write delay with FRAM devices.
326 #if !defined(CONFIG_SYS_I2C_FRAM)
334 /* Calculate a CRC on memory
337 * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count}
339 int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
356 * Chip is always specified.
358 chip = simple_strtoul(argv[1], NULL, 16);
361 * Address is always specified.
363 addr = simple_strtoul(argv[2], NULL, 16);
365 for (j = 0; j < 8; j++) {
366 if (argv[2][j] == '.') {
367 alen = argv[2][j+1] - '0';
373 } else if (argv[2][j] == '\0')
378 * Count is always specified
380 count = simple_strtoul(argv[3], NULL, 16);
382 printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1);
384 * CRC a byte at a time. This is going to be slooow, but hey, the
385 * memories are small and slow too so hopefully nobody notices.
389 while (count-- > 0) {
390 if (i2c_read(chip, addr, alen, &byte, 1) != 0)
392 crc = crc32 (crc, &byte, 1);
396 puts ("Error reading the chip,\n");
398 printf ("%08lx\n", crc);
406 * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
407 * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
411 mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[])
420 extern char console_buffer[];
427 #ifdef CONFIG_BOOT_RETRY_TIME
428 reset_cmd_timeout(); /* got a good command to get here */
431 * We use the last specified parameters, unless new ones are
434 chip = i2c_mm_last_chip;
435 addr = i2c_mm_last_addr;
436 alen = i2c_mm_last_alen;
438 if ((flag & CMD_FLAG_REPEAT) == 0) {
440 * New command specified. Check for a size specification.
441 * Defaults to byte if no or incorrect specification.
443 size = cmd_get_data_size(argv[0], 1);
446 * Chip is always specified.
448 chip = simple_strtoul(argv[1], NULL, 16);
451 * Address is always specified.
453 addr = simple_strtoul(argv[2], NULL, 16);
455 for (j = 0; j < 8; j++) {
456 if (argv[2][j] == '.') {
457 alen = argv[2][j+1] - '0';
463 } else if (argv[2][j] == '\0')
469 * Print the address, followed by value. Then accept input for
470 * the next value. A non-converted value exits.
473 printf("%08lx:", addr);
474 if (i2c_read(chip, addr, alen, (uchar *)&data, size) != 0)
475 puts ("\nError reading the chip,\n");
477 data = cpu_to_be32(data);
479 printf(" %02lx", (data >> 24) & 0x000000FF);
481 printf(" %04lx", (data >> 16) & 0x0000FFFF);
483 printf(" %08lx", data);
486 nbytes = readline (" ? ");
489 * <CR> pressed as only input, don't modify current
490 * location and move to next.
495 #ifdef CONFIG_BOOT_RETRY_TIME
496 reset_cmd_timeout(); /* good enough to not time out */
499 #ifdef CONFIG_BOOT_RETRY_TIME
500 else if (nbytes == -2)
501 break; /* timed out, exit the command */
506 data = simple_strtoul(console_buffer, &endp, 16);
511 data = be32_to_cpu(data);
512 nbytes = endp - console_buffer;
514 #ifdef CONFIG_BOOT_RETRY_TIME
516 * good enough to not time out
520 if (i2c_write(chip, addr, alen, (uchar *)&data, size) != 0)
521 puts ("Error writing the chip.\n");
522 #ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
523 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
531 i2c_mm_last_chip = chip;
532 i2c_mm_last_addr = addr;
533 i2c_mm_last_alen = alen;
540 * i2c probe {addr}{.0, .1, .2}
542 int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
545 #if defined(CONFIG_SYS_I2C_NOPROBES)
547 uchar bus = GET_BUS_NUM;
548 #endif /* NOPROBES */
550 puts ("Valid chip addresses:");
551 for (j = 0; j < 128; j++) {
552 #if defined(CONFIG_SYS_I2C_NOPROBES)
554 for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) {
555 if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) {
563 if (i2c_probe(j) == 0)
568 #if defined(CONFIG_SYS_I2C_NOPROBES)
569 puts ("Excluded chip addresses:");
570 for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) {
571 if (COMPARE_BUS(bus,k))
572 printf(" %02X", NO_PROBE_ADDR(k));
582 * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}]
583 * {length} - Number of bytes to read
584 * {delay} - A DECIMAL number and defaults to 1000 uSec
586 int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
602 * Chip is always specified.
604 chip = simple_strtoul(argv[1], NULL, 16);
607 * Address is always specified.
609 addr = simple_strtoul(argv[2], NULL, 16);
611 for (j = 0; j < 8; j++) {
612 if (argv[2][j] == '.') {
613 alen = argv[2][j+1] - '0';
619 } else if (argv[2][j] == '\0')
624 * Length is the number of objects, not number of bytes.
627 length = simple_strtoul(argv[3], NULL, 16);
628 if (length > sizeof(bytes))
629 length = sizeof(bytes);
632 * The delay time (uSec) is optional.
636 delay = simple_strtoul(argv[4], NULL, 10);
641 if (i2c_read(chip, addr, alen, bytes, length) != 0)
642 puts ("Error reading the chip.\n");
651 * The SDRAM command is separately configured because many
652 * (most?) embedded boards don't use SDRAM DIMMs.
654 #if defined(CONFIG_CMD_SDRAM)
655 static void print_ddr2_tcyc (u_char const b)
657 printf ("%d.", (b >> 4) & 0x0F);
669 printf ("%d ns\n", b & 0x0F);
689 static void decode_bits (u_char const b, char const *str[], int const do_once)
693 for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) {
704 * i2c sdram {i2c_chip}
706 int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
708 enum { unknown, EDO, SDRAM, DDR2 } type;
715 static const char *decode_CAS_DDR2[] = {
716 " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD"
719 static const char *decode_CAS_default[] = {
720 " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1"
723 static const char *decode_CS_WE_default[] = {
724 " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0"
727 static const char *decode_byte21_default[] = {
729 " Redundant row address\n",
730 " Differential clock input\n",
731 " Registerd DQMB inputs\n",
732 " Buffered DQMB inputs\n",
734 " Registered address/control lines\n",
735 " Buffered address/control lines\n"
738 static const char *decode_byte22_DDR2[] = {
744 " Supports partial array self refresh\n",
745 " Supports 50 ohm ODT\n",
746 " Supports weak driver\n"
749 static const char *decode_row_density_DDR2[] = {
750 "512 MiB", "256 MiB", "128 MiB", "16 GiB",
751 "8 GiB", "4 GiB", "2 GiB", "1 GiB"
754 static const char *decode_row_density_default[] = {
755 "512 MiB", "256 MiB", "128 MiB", "64 MiB",
756 "32 MiB", "16 MiB", "8 MiB", "4 MiB"
764 * Chip is always specified.
766 chip = simple_strtoul (argv[1], NULL, 16);
768 if (i2c_read (chip, 0, 1, data, sizeof (data)) != 0) {
769 puts ("No SDRAM Serial Presence Detect found.\n");
774 for (j = 0; j < 63; j++) {
777 if (cksum != data[63]) {
778 printf ("WARNING: Configuration data checksum failure:\n"
779 " is 0x%02x, calculated 0x%02x\n", data[63], cksum);
781 printf ("SPD data revision %d.%d\n",
782 (data[62] >> 4) & 0x0F, data[62] & 0x0F);
783 printf ("Bytes used 0x%02X\n", data[0]);
784 printf ("Serial memory size 0x%02X\n", 1 << data[1]);
786 puts ("Memory type ");
806 puts ("Row address bits ");
807 if ((data[3] & 0x00F0) == 0)
808 printf ("%d\n", data[3] & 0x0F);
810 printf ("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F);
812 puts ("Column address bits ");
813 if ((data[4] & 0x00F0) == 0)
814 printf ("%d\n", data[4] & 0x0F);
816 printf ("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F);
820 printf ("Number of ranks %d\n",
821 (data[5] & 0x07) + 1);
824 printf ("Module rows %d\n", data[5]);
830 printf ("Module data width %d bits\n", data[6]);
833 printf ("Module data width %d bits\n",
834 (data[7] << 8) | data[6]);
838 puts ("Interface signal levels ");
840 case 0: puts ("TTL 5.0 V\n"); break;
841 case 1: puts ("LVTTL\n"); break;
842 case 2: puts ("HSTL 1.5 V\n"); break;
843 case 3: puts ("SSTL 3.3 V\n"); break;
844 case 4: puts ("SSTL 2.5 V\n"); break;
845 case 5: puts ("SSTL 1.8 V\n"); break;
846 default: puts ("unknown\n"); break;
851 printf ("SDRAM cycle time ");
852 print_ddr2_tcyc (data[9]);
855 printf ("SDRAM cycle time %d.%d ns\n",
856 (data[9] >> 4) & 0x0F, data[9] & 0x0F);
862 printf ("SDRAM access time 0.%d%d ns\n",
863 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
866 printf ("SDRAM access time %d.%d ns\n",
867 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
871 puts ("EDC configuration ");
873 case 0: puts ("None\n"); break;
874 case 1: puts ("Parity\n"); break;
875 case 2: puts ("ECC\n"); break;
876 default: puts ("unknown\n"); break;
879 if ((data[12] & 0x80) == 0)
880 puts ("No self refresh, rate ");
882 puts ("Self refresh, rate ");
884 switch(data[12] & 0x7F) {
885 case 0: puts ("15.625 us\n"); break;
886 case 1: puts ("3.9 us\n"); break;
887 case 2: puts ("7.8 us\n"); break;
888 case 3: puts ("31.3 us\n"); break;
889 case 4: puts ("62.5 us\n"); break;
890 case 5: puts ("125 us\n"); break;
891 default: puts ("unknown\n"); break;
896 printf ("SDRAM width (primary) %d\n", data[13]);
899 printf ("SDRAM width (primary) %d\n", data[13] & 0x7F);
900 if ((data[13] & 0x80) != 0) {
901 printf (" (second bank) %d\n",
902 2 * (data[13] & 0x7F));
910 printf ("EDC width %d\n", data[14]);
914 printf ("EDC width %d\n",
917 if ((data[14] & 0x80) != 0) {
918 printf (" (second bank) %d\n",
919 2 * (data[14] & 0x7F));
926 printf ("Min clock delay, back-to-back random column addresses "
930 puts ("Burst length(s) ");
931 if (data[16] & 0x80) puts (" Page");
932 if (data[16] & 0x08) puts (" 8");
933 if (data[16] & 0x04) puts (" 4");
934 if (data[16] & 0x02) puts (" 2");
935 if (data[16] & 0x01) puts (" 1");
937 printf ("Number of banks %d\n", data[17]);
941 puts ("CAS latency(s) ");
942 decode_bits (data[18], decode_CAS_DDR2, 0);
946 puts ("CAS latency(s) ");
947 decode_bits (data[18], decode_CAS_default, 0);
953 puts ("CS latency(s) ");
954 decode_bits (data[19], decode_CS_WE_default, 0);
959 puts ("WE latency(s) ");
960 decode_bits (data[20], decode_CS_WE_default, 0);
966 puts ("Module attributes:\n");
968 puts (" TBD (bit 7)\n");
970 puts (" Analysis probe installed\n");
972 puts (" TBD (bit 5)\n");
974 puts (" FET switch external enable\n");
975 printf (" %d PLLs on DIMM\n", (data[21] >> 2) & 0x03);
976 if (data[20] & 0x11) {
977 printf (" %d active registers on DIMM\n",
978 (data[21] & 0x03) + 1);
982 puts ("Module attributes:\n");
986 decode_bits (data[21], decode_byte21_default, 0);
992 decode_bits (data[22], decode_byte22_DDR2, 0);
995 puts ("Device attributes:\n");
996 if (data[22] & 0x80) puts (" TBD (bit 7)\n");
997 if (data[22] & 0x40) puts (" TBD (bit 6)\n");
998 if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n");
999 else puts (" Upper Vcc tolerance 10%\n");
1000 if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n");
1001 else puts (" Lower Vcc tolerance 10%\n");
1002 if (data[22] & 0x08) puts (" Supports write1/read burst\n");
1003 if (data[22] & 0x04) puts (" Supports precharge all\n");
1004 if (data[22] & 0x02) puts (" Supports auto precharge\n");
1005 if (data[22] & 0x01) puts (" Supports early RAS# precharge\n");
1011 printf ("SDRAM cycle time (2nd highest CAS latency) ");
1012 print_ddr2_tcyc (data[23]);
1015 printf ("SDRAM cycle time (2nd highest CAS latency) %d."
1016 "%d ns\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F);
1022 printf ("SDRAM access from clock (2nd highest CAS latency) 0."
1023 "%d%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
1026 printf ("SDRAM access from clock (2nd highest CAS latency) %d."
1027 "%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
1033 printf ("SDRAM cycle time (3rd highest CAS latency) ");
1034 print_ddr2_tcyc (data[25]);
1037 printf ("SDRAM cycle time (3rd highest CAS latency) %d."
1038 "%d ns\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F);
1044 printf ("SDRAM access from clock (3rd highest CAS latency) 0."
1045 "%d%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
1048 printf ("SDRAM access from clock (3rd highest CAS latency) %d."
1049 "%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
1055 printf ("Minimum row precharge %d.%02d ns\n",
1056 (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03));
1059 printf ("Minimum row precharge %d ns\n", data[27]);
1065 printf ("Row active to row active min %d.%02d ns\n",
1066 (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03));
1069 printf ("Row active to row active min %d ns\n", data[28]);
1075 printf ("RAS to CAS delay min %d.%02d ns\n",
1076 (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03));
1079 printf ("RAS to CAS delay min %d ns\n", data[29]);
1083 printf ("Minimum RAS pulse width %d ns\n", data[30]);
1087 puts ("Density of each row ");
1088 decode_bits (data[31], decode_row_density_DDR2, 1);
1092 puts ("Density of each row ");
1093 decode_bits (data[31], decode_row_density_default, 1);
1100 puts ("Command and Address setup ");
1101 if (data[32] >= 0xA0) {
1102 printf ("1.%d%d ns\n",
1103 ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F);
1105 printf ("0.%d%d ns\n",
1106 ((data[32] >> 4) & 0x0F), data[32] & 0x0F);
1110 printf ("Command and Address setup %c%d.%d ns\n",
1111 (data[32] & 0x80) ? '-' : '+',
1112 (data[32] >> 4) & 0x07, data[32] & 0x0F);
1118 puts ("Command and Address hold ");
1119 if (data[33] >= 0xA0) {
1120 printf ("1.%d%d ns\n",
1121 ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F);
1123 printf ("0.%d%d ns\n",
1124 ((data[33] >> 4) & 0x0F), data[33] & 0x0F);
1128 printf ("Command and Address hold %c%d.%d ns\n",
1129 (data[33] & 0x80) ? '-' : '+',
1130 (data[33] >> 4) & 0x07, data[33] & 0x0F);
1136 printf ("Data signal input setup 0.%d%d ns\n",
1137 (data[34] >> 4) & 0x0F, data[34] & 0x0F);
1140 printf ("Data signal input setup %c%d.%d ns\n",
1141 (data[34] & 0x80) ? '-' : '+',
1142 (data[34] >> 4) & 0x07, data[34] & 0x0F);
1148 printf ("Data signal input hold 0.%d%d ns\n",
1149 (data[35] >> 4) & 0x0F, data[35] & 0x0F);
1152 printf ("Data signal input hold %c%d.%d ns\n",
1153 (data[35] & 0x80) ? '-' : '+',
1154 (data[35] >> 4) & 0x07, data[35] & 0x0F);
1158 puts ("Manufacturer's JEDEC ID ");
1159 for (j = 64; j <= 71; j++)
1160 printf ("%02X ", data[j]);
1162 printf ("Manufacturing Location %02X\n", data[72]);
1163 puts ("Manufacturer's Part Number ");
1164 for (j = 73; j <= 90; j++)
1165 printf ("%02X ", data[j]);
1167 printf ("Revision Code %02X %02X\n", data[91], data[92]);
1168 printf ("Manufacturing Date %02X %02X\n", data[93], data[94]);
1169 puts ("Assembly Serial Number ");
1170 for (j = 95; j <= 98; j++)
1171 printf ("%02X ", data[j]);
1175 printf ("Speed rating PC%d\n",
1176 data[126] == 0x66 ? 66 : data[126]);
1182 #if defined(CONFIG_I2C_MUX)
1183 int do_i2c_add_bus(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
1188 /* show all busses */
1190 I2C_MUX_DEVICE *device = i2c_mux_devices;
1192 printf ("Busses reached over muxes:\n");
1193 while (device != NULL) {
1194 printf ("Bus ID: %x\n", device->busid);
1195 printf (" reached over Mux(es):\n");
1197 while (mux != NULL) {
1198 printf (" %s@%x ch: %x\n", mux->name, mux->chip, mux->channel);
1201 device = device->next;
1204 I2C_MUX_DEVICE *dev;
1206 dev = i2c_mux_ident_muxstring ((uchar *)argv[1]);
1211 #endif /* CONFIG_I2C_MUX */
1213 #if defined(CONFIG_I2C_MULTI_BUS)
1214 int do_i2c_bus_num(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
1219 /* querying current setting */
1220 printf("Current bus is %d\n", i2c_get_bus_num());
1222 bus_idx = simple_strtoul(argv[1], NULL, 10);
1223 printf("Setting bus to %d\n", bus_idx);
1224 ret = i2c_set_bus_num(bus_idx);
1226 printf("Failure changing bus number (%d)\n", ret);
1230 #endif /* CONFIG_I2C_MULTI_BUS */
1232 int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
1237 /* querying current speed */
1238 printf("Current bus speed=%d\n", i2c_get_bus_speed());
1240 speed = simple_strtoul(argv[1], NULL, 10);
1241 printf("Setting bus speed to %d Hz\n", speed);
1242 ret = i2c_set_bus_speed(speed);
1244 printf("Failure changing bus speed (%d)\n", ret);
1249 int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
1251 /* Strip off leading 'i2c' command argument */
1255 #if defined(CONFIG_I2C_MUX)
1256 if (!strncmp(argv[0], "bu", 2))
1257 return do_i2c_add_bus(cmdtp, flag, argc, argv);
1258 #endif /* CONFIG_I2C_MUX */
1259 if (!strncmp(argv[0], "sp", 2))
1260 return do_i2c_bus_speed(cmdtp, flag, argc, argv);
1261 #if defined(CONFIG_I2C_MULTI_BUS)
1262 if (!strncmp(argv[0], "de", 2))
1263 return do_i2c_bus_num(cmdtp, flag, argc, argv);
1264 #endif /* CONFIG_I2C_MULTI_BUS */
1265 if (!strncmp(argv[0], "md", 2))
1266 return do_i2c_md(cmdtp, flag, argc, argv);
1267 if (!strncmp(argv[0], "mm", 2))
1268 return mod_i2c_mem (cmdtp, 1, flag, argc, argv);
1269 if (!strncmp(argv[0], "mw", 2))
1270 return do_i2c_mw(cmdtp, flag, argc, argv);
1271 if (!strncmp(argv[0], "nm", 2))
1272 return mod_i2c_mem (cmdtp, 0, flag, argc, argv);
1273 if (!strncmp(argv[0], "cr", 2))
1274 return do_i2c_crc(cmdtp, flag, argc, argv);
1275 if (!strncmp(argv[0], "pr", 2))
1276 return do_i2c_probe(cmdtp, flag, argc, argv);
1277 if (!strncmp(argv[0], "re", 2)) {
1278 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
1281 if (!strncmp(argv[0], "lo", 2))
1282 return do_i2c_loop(cmdtp, flag, argc, argv);
1283 #if defined(CONFIG_CMD_SDRAM)
1284 if (!strncmp(argv[0], "sd", 2))
1285 return do_sdram(cmdtp, flag, argc, argv);
1291 /***************************************************/
1296 "speed [speed] - show or set I2C bus speed\n"
1297 #if defined(CONFIG_I2C_MUX)
1298 "i2c bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes\n"
1299 #endif /* CONFIG_I2C_MUX */
1300 #if defined(CONFIG_I2C_MULTI_BUS)
1301 "i2c dev [dev] - show or set current I2C bus\n"
1302 #endif /* CONFIG_I2C_MULTI_BUS */
1303 "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n"
1304 "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n"
1305 "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n"
1306 "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n"
1307 "i2c crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
1308 "i2c probe - show devices on the I2C bus\n"
1309 "i2c reset - re-init the I2C Controller\n"
1310 "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device"
1311 #if defined(CONFIG_CMD_SDRAM)
1313 "i2c sdram chip - print SDRAM configuration information"
1317 #if defined(CONFIG_I2C_MUX)
1319 int i2c_mux_add_device(I2C_MUX_DEVICE *dev)
1321 I2C_MUX_DEVICE *devtmp = i2c_mux_devices;
1323 if (i2c_mux_devices == NULL) {
1324 i2c_mux_devices = dev;
1327 while (devtmp->next != NULL)
1328 devtmp = devtmp->next;
1334 I2C_MUX_DEVICE *i2c_mux_search_device(int id)
1336 I2C_MUX_DEVICE *device = i2c_mux_devices;
1338 while (device != NULL) {
1339 if (device->busid == id)
1341 device = device->next;
1346 /* searches in the buf from *pos the next ':'.
1348 * 0 if found (with *pos = where)
1349 * < 0 if an error occured
1350 * > 0 if the end of buf is reached
1352 static int i2c_mux_search_next (int *pos, uchar *buf, int len)
1354 while ((buf[*pos] != ':') && (*pos < len)) {
1359 if (buf[*pos] != ':')
1364 static int i2c_mux_get_busid (void)
1366 int tmp = i2c_mux_busid;
1372 /* Analyses a Muxstring and sends immediately the
1373 Commands to the Muxes. Runs from Flash.
1375 int i2c_mux_ident_muxstring_f (uchar *buf)
1380 int len = strlen((char *)buf);
1388 ret = i2c_mux_search_next(&pos, buf, len);
1391 /* search address */
1394 ret = i2c_mux_search_next(&pos, buf, len);
1398 chip = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1400 /* search channel */
1403 ret = i2c_mux_search_next(&pos, buf, len);
1407 if (buf[pos] != 0) {
1411 channel = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1414 if (i2c_write(chip, 0, 0, &channel, 1) != 0) {
1415 printf ("Error setting Mux: chip:%x channel: \
1416 %x\n", chip, channel);
1427 /* Analyses a Muxstring and if this String is correct
1428 * adds a new I2C Bus.
1430 I2C_MUX_DEVICE *i2c_mux_ident_muxstring (uchar *buf)
1432 I2C_MUX_DEVICE *device;
1437 int len = strlen((char *)buf);
1440 device = (I2C_MUX_DEVICE *)malloc (sizeof(I2C_MUX_DEVICE));
1442 device->busid = i2c_mux_get_busid ();
1443 device->next = NULL;
1445 mux = (I2C_MUX *)malloc (sizeof(I2C_MUX));
1447 /* search name of mux */
1449 ret = i2c_mux_search_next(&pos, buf, len);
1451 printf ("%s no name.\n", __FUNCTION__);
1452 mux->name = (char *)malloc (pos - oldpos + 1);
1453 memcpy (mux->name, &buf[oldpos], pos - oldpos);
1454 mux->name[pos - oldpos] = 0;
1455 /* search address */
1458 ret = i2c_mux_search_next(&pos, buf, len);
1460 printf ("%s no mux address.\n", __FUNCTION__);
1462 mux->chip = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1464 /* search channel */
1467 ret = i2c_mux_search_next(&pos, buf, len);
1469 printf ("%s no mux channel.\n", __FUNCTION__);
1471 if (buf[pos] != 0) {
1475 mux->channel = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1478 if (device->mux == NULL)
1481 I2C_MUX *muxtmp = device->mux;
1482 while (muxtmp->next != NULL) {
1483 muxtmp = muxtmp->next;
1492 i2c_mux_add_device (device);
1499 int i2x_mux_select_mux(int bus)
1501 I2C_MUX_DEVICE *dev;
1504 if ((gd->flags & GD_FLG_RELOC) != GD_FLG_RELOC) {
1505 /* select Default Mux Bus */
1506 #if defined(CONFIG_SYS_I2C_IVM_BUS)
1507 i2c_mux_ident_muxstring_f ((uchar *)CONFIG_SYS_I2C_IVM_BUS);
1511 buf = (unsigned char *) getenv("EEprom_ivm");
1513 i2c_mux_ident_muxstring_f (buf);
1518 dev = i2c_mux_search_device(bus);
1523 while (mux != NULL) {
1524 if (i2c_write(mux->chip, 0, 0, &mux->channel, 1) != 0) {
1525 printf ("Error setting Mux: chip:%x channel: \
1526 %x\n", mux->chip, mux->channel);
1533 #endif /* CONFIG_I2C_MUX */