3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * I2C Functions similar to the standard memory functions.
27 * There are several parameters in many of the commands that bear further
30 * {i2c_chip} is the I2C chip address (the first byte sent on the bus).
31 * Each I2C chip on the bus has a unique address. On the I2C data bus,
32 * the address is the upper seven bits and the LSB is the "read/write"
33 * bit. Note that the {i2c_chip} address specified on the command
34 * line is not shifted up: e.g. a typical EEPROM memory chip may have
35 * an I2C address of 0x50, but the data put on the bus will be 0xA0
36 * for write and 0xA1 for read. This "non shifted" address notation
37 * matches at least half of the data sheets :-/.
39 * {addr} is the address (or offset) within the chip. Small memory
40 * chips have 8 bit addresses. Large memory chips have 16 bit
41 * addresses. Other memory chips have 9, 10, or 11 bit addresses.
42 * Many non-memory chips have multiple registers and {addr} is used
43 * as the register index. Some non-memory chips have only one register
44 * and therefore don't need any {addr} parameter.
46 * The default {addr} parameter is one byte (.1) which works well for
47 * memories and registers with 8 bits of address space.
49 * You can specify the length of the {addr} field with the optional .0,
50 * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are
51 * manipulating a single register device which doesn't use an address
52 * field, use "0.0" for the address and the ".0" length field will
53 * suppress the address in the I2C data stream. This also works for
54 * successive reads using the I2C auto-incrementing memory pointer.
56 * If you are manipulating a large memory with 2-byte addresses, use
57 * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal).
59 * Then there are the unfortunate memory chips that spill the most
60 * significant 1, 2, or 3 bits of address into the chip address byte.
61 * This effectively makes one chip (logically) look like 2, 4, or
62 * 8 chips. This is handled (awkwardly) by #defining
63 * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the
64 * {addr} field (since .1 is the default, it doesn't actually have to
65 * be specified). Examples: given a memory chip at I2C chip address
66 * 0x50, the following would happen...
67 * i2c md 50 0 10 display 16 bytes starting at 0x000
68 * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd>
69 * i2c md 50 100 10 display 16 bytes starting at 0x100
70 * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd>
71 * i2c md 50 210 10 display 16 bytes starting at 0x210
72 * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd>
73 * This is awfully ugly. It would be nice if someone would think up
74 * a better way of handling this.
76 * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de).
81 #include <environment.h>
84 #include <asm/byteorder.h>
85 #include <linux/compiler.h>
87 /* Display values from last command.
88 * Memory modify remembered values are different from display memory.
90 static uchar i2c_dp_last_chip;
91 static uint i2c_dp_last_addr;
92 static uint i2c_dp_last_alen;
93 static uint i2c_dp_last_length = 0x10;
95 static uchar i2c_mm_last_chip;
96 static uint i2c_mm_last_addr;
97 static uint i2c_mm_last_alen;
99 /* If only one I2C bus is present, the list of devices to ignore when
100 * the probe command is issued is represented by a 1D array of addresses.
101 * When multiple buses are present, the list is an array of bus-address
102 * pairs. The following macros take care of this */
104 #if defined(CONFIG_SYS_I2C_NOPROBES)
105 #if defined(CONFIG_I2C_MULTI_BUS)
110 } i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
111 #define GET_BUS_NUM i2c_get_bus_num()
112 #define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b))
113 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a))
114 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr
115 #else /* single bus */
116 static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
117 #define GET_BUS_NUM 0
118 #define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */
119 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a))
120 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)]
121 #endif /* CONFIG_MULTI_BUS */
123 #define NUM_ELEMENTS_NOPROBE (sizeof(i2c_no_probes)/sizeof(i2c_no_probes[0]))
126 #if defined(CONFIG_I2C_MUX)
127 static I2C_MUX_DEVICE *i2c_mux_devices = NULL;
128 static int i2c_mux_busid = CONFIG_SYS_MAX_I2C_BUS;
130 DECLARE_GLOBAL_DATA_PTR;
134 #define DISP_LINE_LEN 16
136 /* implement possible board specific board init */
138 void i2c_init_board(void)
143 /* TODO: Implement architecture-specific get/set functions */
145 unsigned int i2c_get_bus_speed(void)
147 return CONFIG_SYS_I2C_SPEED;
151 int i2c_set_bus_speed(unsigned int speed)
153 if (speed != CONFIG_SYS_I2C_SPEED)
160 * get_alen: small parser helper function to get address length
161 * returns the address length
163 static uint get_alen(char *arg)
169 for (j = 0; j < 8; j++) {
171 alen = arg[j+1] - '0';
173 } else if (arg[j] == '\0')
181 * i2c read {i2c_chip} {devaddr}{.0, .1, .2} {len} {memaddr}
184 static int do_i2c_read ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
187 uint devaddr, alen, length;
191 return CMD_RET_USAGE;
196 chip = simple_strtoul(argv[1], NULL, 16);
199 * I2C data address within the chip. This can be 1 or
200 * 2 bytes long. Some day it might be 3 bytes long :-).
202 devaddr = simple_strtoul(argv[2], NULL, 16);
203 alen = get_alen(argv[2]);
205 return CMD_RET_USAGE;
208 * Length is the number of objects, not number of bytes.
210 length = simple_strtoul(argv[3], NULL, 16);
213 * memaddr is the address where to store things in memory
215 memaddr = (u_char *)simple_strtoul(argv[4], NULL, 16);
217 if (i2c_read(chip, devaddr, alen, memaddr, length) != 0) {
218 puts ("Error reading the chip.\n");
224 static int do_i2c_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
227 uint devaddr, alen, length;
231 return cmd_usage(cmdtp);
234 * memaddr is the address where to store things in memory
236 memaddr = (u_char *)simple_strtoul(argv[1], NULL, 16);
241 chip = simple_strtoul(argv[2], NULL, 16);
244 * I2C data address within the chip. This can be 1 or
245 * 2 bytes long. Some day it might be 3 bytes long :-).
247 devaddr = simple_strtoul(argv[3], NULL, 16);
248 alen = get_alen(argv[3]);
250 return cmd_usage(cmdtp);
253 * Length is the number of objects, not number of bytes.
255 length = simple_strtoul(argv[4], NULL, 16);
257 while (length-- > 0) {
258 if (i2c_write(chip, devaddr++, alen, memaddr++, 1) != 0) {
259 puts("Error writing to the chip.\n");
263 * No write delay with FRAM devices.
265 #if !defined(CONFIG_SYS_I2C_FRAM)
274 * i2c md {i2c_chip} {addr}{.0, .1, .2} {len}
276 static int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
279 uint addr, alen, length;
280 int j, nbytes, linebytes;
282 /* We use the last specified parameters, unless new ones are
285 chip = i2c_dp_last_chip;
286 addr = i2c_dp_last_addr;
287 alen = i2c_dp_last_alen;
288 length = i2c_dp_last_length;
291 return CMD_RET_USAGE;
293 if ((flag & CMD_FLAG_REPEAT) == 0) {
295 * New command specified.
301 chip = simple_strtoul(argv[1], NULL, 16);
304 * I2C data address within the chip. This can be 1 or
305 * 2 bytes long. Some day it might be 3 bytes long :-).
307 addr = simple_strtoul(argv[2], NULL, 16);
308 alen = get_alen(argv[2]);
310 return CMD_RET_USAGE;
313 * If another parameter, it is the length to display.
314 * Length is the number of objects, not number of bytes.
317 length = simple_strtoul(argv[3], NULL, 16);
323 * We buffer all read data, so we can make sure data is read only
328 unsigned char linebuf[DISP_LINE_LEN];
331 linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
333 if (i2c_read(chip, addr, alen, linebuf, linebytes) != 0)
334 puts ("Error reading the chip.\n");
336 printf("%04x:", addr);
338 for (j=0; j<linebytes; j++) {
339 printf(" %02x", *cp++);
344 for (j=0; j<linebytes; j++) {
345 if ((*cp < 0x20) || (*cp > 0x7e))
354 } while (nbytes > 0);
356 i2c_dp_last_chip = chip;
357 i2c_dp_last_addr = addr;
358 i2c_dp_last_alen = alen;
359 i2c_dp_last_length = length;
365 /* Write (fill) memory
368 * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
370 static int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
378 if ((argc < 4) || (argc > 5))
379 return CMD_RET_USAGE;
382 * Chip is always specified.
384 chip = simple_strtoul(argv[1], NULL, 16);
387 * Address is always specified.
389 addr = simple_strtoul(argv[2], NULL, 16);
390 alen = get_alen(argv[2]);
392 return CMD_RET_USAGE;
395 * Value to write is always specified.
397 byte = simple_strtoul(argv[3], NULL, 16);
403 count = simple_strtoul(argv[4], NULL, 16);
407 while (count-- > 0) {
408 if (i2c_write(chip, addr++, alen, &byte, 1) != 0)
409 puts ("Error writing the chip.\n");
411 * Wait for the write to complete. The write can take
412 * up to 10mSec (we allow a little more time).
415 * No write delay with FRAM devices.
417 #if !defined(CONFIG_SYS_I2C_FRAM)
425 /* Calculate a CRC on memory
428 * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count}
430 static int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
441 return CMD_RET_USAGE;
444 * Chip is always specified.
446 chip = simple_strtoul(argv[1], NULL, 16);
449 * Address is always specified.
451 addr = simple_strtoul(argv[2], NULL, 16);
452 alen = get_alen(argv[2]);
454 return CMD_RET_USAGE;
457 * Count is always specified
459 count = simple_strtoul(argv[3], NULL, 16);
461 printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1);
463 * CRC a byte at a time. This is going to be slooow, but hey, the
464 * memories are small and slow too so hopefully nobody notices.
468 while (count-- > 0) {
469 if (i2c_read(chip, addr, alen, &byte, 1) != 0)
471 crc = crc32 (crc, &byte, 1);
475 puts ("Error reading the chip,\n");
477 printf ("%08lx\n", crc);
485 * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
486 * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
490 mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[])
500 return CMD_RET_USAGE;
502 #ifdef CONFIG_BOOT_RETRY_TIME
503 reset_cmd_timeout(); /* got a good command to get here */
506 * We use the last specified parameters, unless new ones are
509 chip = i2c_mm_last_chip;
510 addr = i2c_mm_last_addr;
511 alen = i2c_mm_last_alen;
513 if ((flag & CMD_FLAG_REPEAT) == 0) {
515 * New command specified. Check for a size specification.
516 * Defaults to byte if no or incorrect specification.
518 size = cmd_get_data_size(argv[0], 1);
521 * Chip is always specified.
523 chip = simple_strtoul(argv[1], NULL, 16);
526 * Address is always specified.
528 addr = simple_strtoul(argv[2], NULL, 16);
529 alen = get_alen(argv[2]);
531 return CMD_RET_USAGE;
535 * Print the address, followed by value. Then accept input for
536 * the next value. A non-converted value exits.
539 printf("%08lx:", addr);
540 if (i2c_read(chip, addr, alen, (uchar *)&data, size) != 0)
541 puts ("\nError reading the chip,\n");
543 data = cpu_to_be32(data);
545 printf(" %02lx", (data >> 24) & 0x000000FF);
547 printf(" %04lx", (data >> 16) & 0x0000FFFF);
549 printf(" %08lx", data);
552 nbytes = readline (" ? ");
555 * <CR> pressed as only input, don't modify current
556 * location and move to next.
561 #ifdef CONFIG_BOOT_RETRY_TIME
562 reset_cmd_timeout(); /* good enough to not time out */
565 #ifdef CONFIG_BOOT_RETRY_TIME
566 else if (nbytes == -2)
567 break; /* timed out, exit the command */
572 data = simple_strtoul(console_buffer, &endp, 16);
577 data = be32_to_cpu(data);
578 nbytes = endp - console_buffer;
580 #ifdef CONFIG_BOOT_RETRY_TIME
582 * good enough to not time out
586 if (i2c_write(chip, addr, alen, (uchar *)&data, size) != 0)
587 puts ("Error writing the chip.\n");
588 #ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
589 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
597 i2c_mm_last_chip = chip;
598 i2c_mm_last_addr = addr;
599 i2c_mm_last_alen = alen;
608 * Returns zero (success) if one or more I2C devices was found
610 static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
615 #if defined(CONFIG_SYS_I2C_NOPROBES)
617 uchar bus = GET_BUS_NUM;
618 #endif /* NOPROBES */
621 addr = simple_strtol(argv[1], 0, 16);
623 puts ("Valid chip addresses:");
624 for (j = 0; j < 128; j++) {
625 if ((0 <= addr) && (j != addr))
628 #if defined(CONFIG_SYS_I2C_NOPROBES)
630 for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) {
631 if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) {
639 if (i2c_probe(j) == 0) {
646 #if defined(CONFIG_SYS_I2C_NOPROBES)
647 puts ("Excluded chip addresses:");
648 for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) {
649 if (COMPARE_BUS(bus,k))
650 printf(" %02X", NO_PROBE_ADDR(k));
660 * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}]
661 * {length} - Number of bytes to read
662 * {delay} - A DECIMAL number and defaults to 1000 uSec
664 static int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
674 return CMD_RET_USAGE;
677 * Chip is always specified.
679 chip = simple_strtoul(argv[1], NULL, 16);
682 * Address is always specified.
684 addr = simple_strtoul(argv[2], NULL, 16);
685 alen = get_alen(argv[2]);
687 return CMD_RET_USAGE;
690 * Length is the number of objects, not number of bytes.
693 length = simple_strtoul(argv[3], NULL, 16);
694 if (length > sizeof(bytes))
695 length = sizeof(bytes);
698 * The delay time (uSec) is optional.
702 delay = simple_strtoul(argv[4], NULL, 10);
707 if (i2c_read(chip, addr, alen, bytes, length) != 0)
708 puts ("Error reading the chip.\n");
717 * The SDRAM command is separately configured because many
718 * (most?) embedded boards don't use SDRAM DIMMs.
720 #if defined(CONFIG_CMD_SDRAM)
721 static void print_ddr2_tcyc (u_char const b)
723 printf ("%d.", (b >> 4) & 0x0F);
735 printf ("%d ns\n", b & 0x0F);
755 static void decode_bits (u_char const b, char const *str[], int const do_once)
759 for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) {
770 * i2c sdram {i2c_chip}
772 static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
774 enum { unknown, EDO, SDRAM, DDR2 } type;
781 static const char *decode_CAS_DDR2[] = {
782 " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD"
785 static const char *decode_CAS_default[] = {
786 " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1"
789 static const char *decode_CS_WE_default[] = {
790 " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0"
793 static const char *decode_byte21_default[] = {
795 " Redundant row address\n",
796 " Differential clock input\n",
797 " Registerd DQMB inputs\n",
798 " Buffered DQMB inputs\n",
800 " Registered address/control lines\n",
801 " Buffered address/control lines\n"
804 static const char *decode_byte22_DDR2[] = {
810 " Supports partial array self refresh\n",
811 " Supports 50 ohm ODT\n",
812 " Supports weak driver\n"
815 static const char *decode_row_density_DDR2[] = {
816 "512 MiB", "256 MiB", "128 MiB", "16 GiB",
817 "8 GiB", "4 GiB", "2 GiB", "1 GiB"
820 static const char *decode_row_density_default[] = {
821 "512 MiB", "256 MiB", "128 MiB", "64 MiB",
822 "32 MiB", "16 MiB", "8 MiB", "4 MiB"
826 return CMD_RET_USAGE;
829 * Chip is always specified.
831 chip = simple_strtoul (argv[1], NULL, 16);
833 if (i2c_read (chip, 0, 1, data, sizeof (data)) != 0) {
834 puts ("No SDRAM Serial Presence Detect found.\n");
839 for (j = 0; j < 63; j++) {
842 if (cksum != data[63]) {
843 printf ("WARNING: Configuration data checksum failure:\n"
844 " is 0x%02x, calculated 0x%02x\n", data[63], cksum);
846 printf ("SPD data revision %d.%d\n",
847 (data[62] >> 4) & 0x0F, data[62] & 0x0F);
848 printf ("Bytes used 0x%02X\n", data[0]);
849 printf ("Serial memory size 0x%02X\n", 1 << data[1]);
851 puts ("Memory type ");
871 puts ("Row address bits ");
872 if ((data[3] & 0x00F0) == 0)
873 printf ("%d\n", data[3] & 0x0F);
875 printf ("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F);
877 puts ("Column address bits ");
878 if ((data[4] & 0x00F0) == 0)
879 printf ("%d\n", data[4] & 0x0F);
881 printf ("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F);
885 printf ("Number of ranks %d\n",
886 (data[5] & 0x07) + 1);
889 printf ("Module rows %d\n", data[5]);
895 printf ("Module data width %d bits\n", data[6]);
898 printf ("Module data width %d bits\n",
899 (data[7] << 8) | data[6]);
903 puts ("Interface signal levels ");
905 case 0: puts ("TTL 5.0 V\n"); break;
906 case 1: puts ("LVTTL\n"); break;
907 case 2: puts ("HSTL 1.5 V\n"); break;
908 case 3: puts ("SSTL 3.3 V\n"); break;
909 case 4: puts ("SSTL 2.5 V\n"); break;
910 case 5: puts ("SSTL 1.8 V\n"); break;
911 default: puts ("unknown\n"); break;
916 printf ("SDRAM cycle time ");
917 print_ddr2_tcyc (data[9]);
920 printf ("SDRAM cycle time %d.%d ns\n",
921 (data[9] >> 4) & 0x0F, data[9] & 0x0F);
927 printf ("SDRAM access time 0.%d%d ns\n",
928 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
931 printf ("SDRAM access time %d.%d ns\n",
932 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
936 puts ("EDC configuration ");
938 case 0: puts ("None\n"); break;
939 case 1: puts ("Parity\n"); break;
940 case 2: puts ("ECC\n"); break;
941 default: puts ("unknown\n"); break;
944 if ((data[12] & 0x80) == 0)
945 puts ("No self refresh, rate ");
947 puts ("Self refresh, rate ");
949 switch(data[12] & 0x7F) {
950 case 0: puts ("15.625 us\n"); break;
951 case 1: puts ("3.9 us\n"); break;
952 case 2: puts ("7.8 us\n"); break;
953 case 3: puts ("31.3 us\n"); break;
954 case 4: puts ("62.5 us\n"); break;
955 case 5: puts ("125 us\n"); break;
956 default: puts ("unknown\n"); break;
961 printf ("SDRAM width (primary) %d\n", data[13]);
964 printf ("SDRAM width (primary) %d\n", data[13] & 0x7F);
965 if ((data[13] & 0x80) != 0) {
966 printf (" (second bank) %d\n",
967 2 * (data[13] & 0x7F));
975 printf ("EDC width %d\n", data[14]);
979 printf ("EDC width %d\n",
982 if ((data[14] & 0x80) != 0) {
983 printf (" (second bank) %d\n",
984 2 * (data[14] & 0x7F));
991 printf ("Min clock delay, back-to-back random column addresses "
995 puts ("Burst length(s) ");
996 if (data[16] & 0x80) puts (" Page");
997 if (data[16] & 0x08) puts (" 8");
998 if (data[16] & 0x04) puts (" 4");
999 if (data[16] & 0x02) puts (" 2");
1000 if (data[16] & 0x01) puts (" 1");
1002 printf ("Number of banks %d\n", data[17]);
1006 puts ("CAS latency(s) ");
1007 decode_bits (data[18], decode_CAS_DDR2, 0);
1011 puts ("CAS latency(s) ");
1012 decode_bits (data[18], decode_CAS_default, 0);
1018 puts ("CS latency(s) ");
1019 decode_bits (data[19], decode_CS_WE_default, 0);
1024 puts ("WE latency(s) ");
1025 decode_bits (data[20], decode_CS_WE_default, 0);
1031 puts ("Module attributes:\n");
1032 if (data[21] & 0x80)
1033 puts (" TBD (bit 7)\n");
1034 if (data[21] & 0x40)
1035 puts (" Analysis probe installed\n");
1036 if (data[21] & 0x20)
1037 puts (" TBD (bit 5)\n");
1038 if (data[21] & 0x10)
1039 puts (" FET switch external enable\n");
1040 printf (" %d PLLs on DIMM\n", (data[21] >> 2) & 0x03);
1041 if (data[20] & 0x11) {
1042 printf (" %d active registers on DIMM\n",
1043 (data[21] & 0x03) + 1);
1047 puts ("Module attributes:\n");
1051 decode_bits (data[21], decode_byte21_default, 0);
1057 decode_bits (data[22], decode_byte22_DDR2, 0);
1060 puts ("Device attributes:\n");
1061 if (data[22] & 0x80) puts (" TBD (bit 7)\n");
1062 if (data[22] & 0x40) puts (" TBD (bit 6)\n");
1063 if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n");
1064 else puts (" Upper Vcc tolerance 10%\n");
1065 if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n");
1066 else puts (" Lower Vcc tolerance 10%\n");
1067 if (data[22] & 0x08) puts (" Supports write1/read burst\n");
1068 if (data[22] & 0x04) puts (" Supports precharge all\n");
1069 if (data[22] & 0x02) puts (" Supports auto precharge\n");
1070 if (data[22] & 0x01) puts (" Supports early RAS# precharge\n");
1076 printf ("SDRAM cycle time (2nd highest CAS latency) ");
1077 print_ddr2_tcyc (data[23]);
1080 printf ("SDRAM cycle time (2nd highest CAS latency) %d."
1081 "%d ns\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F);
1087 printf ("SDRAM access from clock (2nd highest CAS latency) 0."
1088 "%d%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
1091 printf ("SDRAM access from clock (2nd highest CAS latency) %d."
1092 "%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
1098 printf ("SDRAM cycle time (3rd highest CAS latency) ");
1099 print_ddr2_tcyc (data[25]);
1102 printf ("SDRAM cycle time (3rd highest CAS latency) %d."
1103 "%d ns\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F);
1109 printf ("SDRAM access from clock (3rd highest CAS latency) 0."
1110 "%d%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
1113 printf ("SDRAM access from clock (3rd highest CAS latency) %d."
1114 "%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
1120 printf ("Minimum row precharge %d.%02d ns\n",
1121 (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03));
1124 printf ("Minimum row precharge %d ns\n", data[27]);
1130 printf ("Row active to row active min %d.%02d ns\n",
1131 (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03));
1134 printf ("Row active to row active min %d ns\n", data[28]);
1140 printf ("RAS to CAS delay min %d.%02d ns\n",
1141 (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03));
1144 printf ("RAS to CAS delay min %d ns\n", data[29]);
1148 printf ("Minimum RAS pulse width %d ns\n", data[30]);
1152 puts ("Density of each row ");
1153 decode_bits (data[31], decode_row_density_DDR2, 1);
1157 puts ("Density of each row ");
1158 decode_bits (data[31], decode_row_density_default, 1);
1165 puts ("Command and Address setup ");
1166 if (data[32] >= 0xA0) {
1167 printf ("1.%d%d ns\n",
1168 ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F);
1170 printf ("0.%d%d ns\n",
1171 ((data[32] >> 4) & 0x0F), data[32] & 0x0F);
1175 printf ("Command and Address setup %c%d.%d ns\n",
1176 (data[32] & 0x80) ? '-' : '+',
1177 (data[32] >> 4) & 0x07, data[32] & 0x0F);
1183 puts ("Command and Address hold ");
1184 if (data[33] >= 0xA0) {
1185 printf ("1.%d%d ns\n",
1186 ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F);
1188 printf ("0.%d%d ns\n",
1189 ((data[33] >> 4) & 0x0F), data[33] & 0x0F);
1193 printf ("Command and Address hold %c%d.%d ns\n",
1194 (data[33] & 0x80) ? '-' : '+',
1195 (data[33] >> 4) & 0x07, data[33] & 0x0F);
1201 printf ("Data signal input setup 0.%d%d ns\n",
1202 (data[34] >> 4) & 0x0F, data[34] & 0x0F);
1205 printf ("Data signal input setup %c%d.%d ns\n",
1206 (data[34] & 0x80) ? '-' : '+',
1207 (data[34] >> 4) & 0x07, data[34] & 0x0F);
1213 printf ("Data signal input hold 0.%d%d ns\n",
1214 (data[35] >> 4) & 0x0F, data[35] & 0x0F);
1217 printf ("Data signal input hold %c%d.%d ns\n",
1218 (data[35] & 0x80) ? '-' : '+',
1219 (data[35] >> 4) & 0x07, data[35] & 0x0F);
1223 puts ("Manufacturer's JEDEC ID ");
1224 for (j = 64; j <= 71; j++)
1225 printf ("%02X ", data[j]);
1227 printf ("Manufacturing Location %02X\n", data[72]);
1228 puts ("Manufacturer's Part Number ");
1229 for (j = 73; j <= 90; j++)
1230 printf ("%02X ", data[j]);
1232 printf ("Revision Code %02X %02X\n", data[91], data[92]);
1233 printf ("Manufacturing Date %02X %02X\n", data[93], data[94]);
1234 puts ("Assembly Serial Number ");
1235 for (j = 95; j <= 98; j++)
1236 printf ("%02X ", data[j]);
1240 printf ("Speed rating PC%d\n",
1241 data[126] == 0x66 ? 66 : data[126]);
1247 #if defined(CONFIG_I2C_MUX)
1248 static int do_i2c_add_bus(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
1253 /* show all busses */
1255 I2C_MUX_DEVICE *device = i2c_mux_devices;
1257 printf ("Busses reached over muxes:\n");
1258 while (device != NULL) {
1259 printf ("Bus ID: %x\n", device->busid);
1260 printf (" reached over Mux(es):\n");
1262 while (mux != NULL) {
1263 printf (" %s@%x ch: %x\n", mux->name, mux->chip, mux->channel);
1266 device = device->next;
1269 (void)i2c_mux_ident_muxstring ((uchar *)argv[1]);
1274 #endif /* CONFIG_I2C_MUX */
1276 #if defined(CONFIG_I2C_MULTI_BUS)
1277 static int do_i2c_bus_num(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
1282 /* querying current setting */
1283 printf("Current bus is %d\n", i2c_get_bus_num());
1285 bus_idx = simple_strtoul(argv[1], NULL, 10);
1286 printf("Setting bus to %d\n", bus_idx);
1287 ret = i2c_set_bus_num(bus_idx);
1289 printf("Failure changing bus number (%d)\n", ret);
1293 #endif /* CONFIG_I2C_MULTI_BUS */
1295 static int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
1300 /* querying current speed */
1301 printf("Current bus speed=%d\n", i2c_get_bus_speed());
1303 speed = simple_strtoul(argv[1], NULL, 10);
1304 printf("Setting bus speed to %d Hz\n", speed);
1305 ret = i2c_set_bus_speed(speed);
1307 printf("Failure changing bus speed (%d)\n", ret);
1312 static int do_i2c_mm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
1314 return mod_i2c_mem (cmdtp, 1, flag, argc, argv);
1317 static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
1319 return mod_i2c_mem (cmdtp, 0, flag, argc, argv);
1322 static int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
1324 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
1328 static cmd_tbl_t cmd_i2c_sub[] = {
1329 #if defined(CONFIG_I2C_MUX)
1330 U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_add_bus, "", ""),
1331 #endif /* CONFIG_I2C_MUX */
1332 U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""),
1333 #if defined(CONFIG_I2C_MULTI_BUS)
1334 U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""),
1335 #endif /* CONFIG_I2C_MULTI_BUS */
1336 U_BOOT_CMD_MKENT(loop, 3, 1, do_i2c_loop, "", ""),
1337 U_BOOT_CMD_MKENT(md, 3, 1, do_i2c_md, "", ""),
1338 U_BOOT_CMD_MKENT(mm, 2, 1, do_i2c_mm, "", ""),
1339 U_BOOT_CMD_MKENT(mw, 3, 1, do_i2c_mw, "", ""),
1340 U_BOOT_CMD_MKENT(nm, 2, 1, do_i2c_nm, "", ""),
1341 U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""),
1342 U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""),
1343 U_BOOT_CMD_MKENT(write, 5, 0, do_i2c_write, "", ""),
1344 U_BOOT_CMD_MKENT(reset, 0, 1, do_i2c_reset, "", ""),
1345 #if defined(CONFIG_CMD_SDRAM)
1346 U_BOOT_CMD_MKENT(sdram, 1, 1, do_sdram, "", ""),
1348 U_BOOT_CMD_MKENT(speed, 1, 1, do_i2c_bus_speed, "", ""),
1351 #ifdef CONFIG_NEEDS_MANUAL_RELOC
1352 void i2c_reloc(void) {
1353 fixup_cmdtable(cmd_i2c_sub, ARRAY_SIZE(cmd_i2c_sub));
1357 static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
1362 return CMD_RET_USAGE;
1364 /* Strip off leading 'i2c' command argument */
1368 c = find_cmd_tbl(argv[0], &cmd_i2c_sub[0], ARRAY_SIZE(cmd_i2c_sub));
1371 return c->cmd(cmdtp, flag, argc, argv);
1373 return CMD_RET_USAGE;
1376 /***************************************************/
1377 #ifdef CONFIG_SYS_LONGHELP
1378 static char i2c_help_text[] =
1379 #if defined(CONFIG_I2C_MUX)
1380 "bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes\ni2c "
1381 #endif /* CONFIG_I2C_MUX */
1382 "crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
1383 #if defined(CONFIG_I2C_MULTI_BUS)
1384 "i2c dev [dev] - show or set current I2C bus\n"
1385 #endif /* CONFIG_I2C_MULTI_BUS */
1386 "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n"
1387 "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n"
1388 "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n"
1389 "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n"
1390 "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n"
1391 "i2c probe [address] - test for and show device(s) on the I2C bus\n"
1392 "i2c read chip address[.0, .1, .2] length memaddress - read to memory \n"
1393 "i2c write memaddress chip address[.0, .1, .2] length - write memory to i2c\n"
1394 "i2c reset - re-init the I2C Controller\n"
1395 #if defined(CONFIG_CMD_SDRAM)
1396 "i2c sdram chip - print SDRAM configuration information\n"
1398 "i2c speed [speed] - show or set I2C bus speed";
1407 #if defined(CONFIG_I2C_MUX)
1408 static int i2c_mux_add_device(I2C_MUX_DEVICE *dev)
1410 I2C_MUX_DEVICE *devtmp = i2c_mux_devices;
1412 if (i2c_mux_devices == NULL) {
1413 i2c_mux_devices = dev;
1416 while (devtmp->next != NULL)
1417 devtmp = devtmp->next;
1423 I2C_MUX_DEVICE *i2c_mux_search_device(int id)
1425 I2C_MUX_DEVICE *device = i2c_mux_devices;
1427 while (device != NULL) {
1428 if (device->busid == id)
1430 device = device->next;
1435 /* searches in the buf from *pos the next ':'.
1437 * 0 if found (with *pos = where)
1438 * < 0 if an error occured
1439 * > 0 if the end of buf is reached
1441 static int i2c_mux_search_next (int *pos, uchar *buf, int len)
1443 while ((buf[*pos] != ':') && (*pos < len)) {
1448 if (buf[*pos] != ':')
1453 static int i2c_mux_get_busid (void)
1455 int tmp = i2c_mux_busid;
1461 /* Analyses a Muxstring and immediately sends the
1462 commands to the muxes. Runs from flash.
1464 int i2c_mux_ident_muxstring_f (uchar *buf)
1469 int len = strlen((char *)buf);
1477 ret = i2c_mux_search_next(&pos, buf, len);
1480 /* search address */
1483 ret = i2c_mux_search_next(&pos, buf, len);
1487 chip = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1489 /* search channel */
1492 ret = i2c_mux_search_next(&pos, buf, len);
1496 if (buf[pos] != 0) {
1500 channel = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1503 if (i2c_write(chip, 0, 0, &channel, 1) != 0) {
1504 printf ("Error setting Mux: chip:%x channel: \
1505 %x\n", chip, channel);
1517 /* Analyses a Muxstring and if this String is correct
1518 * adds a new I2C Bus.
1520 I2C_MUX_DEVICE *i2c_mux_ident_muxstring (uchar *buf)
1522 I2C_MUX_DEVICE *device;
1527 int len = strlen((char *)buf);
1530 device = (I2C_MUX_DEVICE *)malloc (sizeof(I2C_MUX_DEVICE));
1532 device->busid = i2c_mux_get_busid ();
1533 device->next = NULL;
1535 mux = (I2C_MUX *)malloc (sizeof(I2C_MUX));
1537 /* search name of mux */
1539 ret = i2c_mux_search_next(&pos, buf, len);
1541 printf ("%s no name.\n", __FUNCTION__);
1542 mux->name = (char *)malloc (pos - oldpos + 1);
1543 memcpy (mux->name, &buf[oldpos], pos - oldpos);
1544 mux->name[pos - oldpos] = 0;
1545 /* search address */
1548 ret = i2c_mux_search_next(&pos, buf, len);
1550 printf ("%s no mux address.\n", __FUNCTION__);
1552 mux->chip = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1554 /* search channel */
1557 ret = i2c_mux_search_next(&pos, buf, len);
1559 printf ("%s no mux channel.\n", __FUNCTION__);
1561 if (buf[pos] != 0) {
1565 mux->channel = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1568 if (device->mux == NULL)
1571 I2C_MUX *muxtmp = device->mux;
1572 while (muxtmp->next != NULL) {
1573 muxtmp = muxtmp->next;
1582 i2c_mux_add_device (device);
1589 int i2x_mux_select_mux(int bus)
1591 I2C_MUX_DEVICE *dev;
1594 if ((gd->flags & GD_FLG_RELOC) != GD_FLG_RELOC) {
1595 /* select Default Mux Bus */
1596 #if defined(CONFIG_SYS_I2C_IVM_BUS)
1597 i2c_mux_ident_muxstring_f ((uchar *)CONFIG_SYS_I2C_IVM_BUS);
1601 buf = (unsigned char *) getenv("EEprom_ivm");
1603 i2c_mux_ident_muxstring_f (buf);
1608 dev = i2c_mux_search_device(bus);
1613 while (mux != NULL) {
1614 /* do deblocking on each level of mux, before mux config */
1616 if (i2c_write(mux->chip, 0, 0, &mux->channel, 1) != 0) {
1617 printf ("Error setting Mux: chip:%x channel: \
1618 %x\n", mux->chip, mux->channel);
1623 /* do deblocking on each level of mux and after mux config */
1627 #endif /* CONFIG_I2C_MUX */