3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 #if (CONFIG_COMMANDS & CFG_CMD_MII)
34 #define CONFIG_TERSE_MII /* XXX necessary here because "miivals.h" is missing */
36 #ifdef CONFIG_TERSE_MII
38 * Display values from last command.
49 * mii read {addr} {reg}
50 * mii write {addr} {reg} {data}
53 int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
56 unsigned char addr, reg;
60 #if defined(CONFIG_8xx) || defined(CONFIG_MCF52x2)
65 * We use the last specified parameters, unless new ones are
73 if ((flag & CMD_FLAG_REPEAT) == 0) {
76 addr = simple_strtoul (argv[2], NULL, 16);
78 reg = simple_strtoul (argv[3], NULL, 16);
80 data = simple_strtoul (argv[4], NULL, 16);
84 * check info/read/write.
87 unsigned char j, start, end;
93 * Look for any and all PHYs. Valid addresses are 0..31.
96 start = addr; end = addr + 1;
101 for (j = start; j < end; j++) {
102 if (miiphy_info (j, &oui, &model, &rev) == 0) {
103 printf ("PHY 0x%02X: "
110 miiphy_duplex (j) == FULL ? "FDX" : "HDX");
113 } else if (op == 'r') {
114 if (miiphy_read (addr, reg, &data) != 0) {
115 puts ("Error reading from the PHY\n");
118 printf ("%04X\n", data & 0x0000FFFF);
119 } else if (op == 'w') {
120 if (miiphy_write (addr, reg, data) != 0) {
121 puts ("Error writing to the PHY\n");
125 printf ("Usage:\n%s\n", cmdtp->usage);
130 * Save the parameters for repeats.
140 /***************************************************/
144 "mii - MII utility commands\n",
145 "info <addr> - display MII PHY info\n"
146 "mii read <addr> <reg> - read MII PHY <addr> register <reg>\n"
147 "mii write <addr> <reg> <data> - write MII PHY <addr> register <reg>\n"
150 #else /* ! CONFIG_TERSE_MII ================================================= */
154 typedef struct _MII_reg_desc_t {
159 MII_reg_desc_t reg_0_5_desc_tbl[] = {
160 { 0, "PHY control register" },
161 { 1, "PHY status register" },
162 { 2, "PHY ID 1 register" },
163 { 3, "PHY ID 2 register" },
164 { 4, "Autonegotiation advertisement register" },
165 { 5, "Autonegotiation partner abilities register" },
168 typedef struct _MII_field_desc_t {
175 MII_field_desc_t reg_0_desc_tbl[] = {
176 { 15, 15, 0x01, "reset" },
177 { 14, 14, 0x01, "loopback" },
178 { 13, 6, 0x81, "speed selection" }, /* special */
179 { 12, 12, 0x01, "A/N enable" },
180 { 11, 11, 0x01, "power-down" },
181 { 10, 10, 0x01, "isolate" },
182 { 9, 9, 0x01, "restart A/N" },
183 { 8, 8, 0x01, "duplex" }, /* special */
184 { 7, 7, 0x01, "collision test enable" },
185 { 5, 0, 0x3f, "(reserved)" }
188 MII_field_desc_t reg_1_desc_tbl[] = {
189 { 15, 15, 0x01, "100BASE-T4 able" },
190 { 14, 14, 0x01, "100BASE-X full duplex able" },
191 { 13, 13, 0x01, "100BASE-X half duplex able" },
192 { 12, 12, 0x01, "10 Mbps full duplex able" },
193 { 11, 11, 0x01, "10 Mbps half duplex able" },
194 { 10, 10, 0x01, "100BASE-T2 full duplex able" },
195 { 9, 9, 0x01, "100BASE-T2 half duplex able" },
196 { 8, 8, 0x01, "extended status" },
197 { 7, 7, 0x01, "(reserved)" },
198 { 6, 6, 0x01, "MF preamble suppression" },
199 { 5, 5, 0x01, "A/N complete" },
200 { 4, 4, 0x01, "remote fault" },
201 { 3, 3, 0x01, "A/N able" },
202 { 2, 2, 0x01, "link status" },
203 { 1, 1, 0x01, "jabber detect" },
204 { 0, 0, 0x01, "extended capabilities" },
207 MII_field_desc_t reg_2_desc_tbl[] = {
208 { 15, 0, 0xffff, "OUI portion" },
211 MII_field_desc_t reg_3_desc_tbl[] = {
212 { 15, 10, 0x3f, "OUI portion" },
213 { 9, 4, 0x3f, "manufacturer part number" },
214 { 3, 0, 0x0f, "manufacturer rev. number" },
217 MII_field_desc_t reg_4_desc_tbl[] = {
218 { 15, 15, 0x01, "next page able" },
219 { 14, 14, 0x01, "reserved" },
220 { 13, 13, 0x01, "remote fault" },
221 { 12, 12, 0x01, "reserved" },
222 { 11, 11, 0x01, "asymmetric pause" },
223 { 10, 10, 0x01, "pause enable" },
224 { 9, 9, 0x01, "100BASE-T4 able" },
225 { 8, 8, 0x01, "100BASE-TX full duplex able" },
226 { 7, 7, 0x01, "100BASE-TX able" },
227 { 6, 6, 0x01, "10BASE-T full duplex able" },
228 { 5, 5, 0x01, "10BASE-T able" },
229 { 4, 0, 0x1f, "xxx to do" },
232 MII_field_desc_t reg_5_desc_tbl[] = {
233 { 15, 15, 0x01, "next page able" },
234 { 14, 14, 0x01, "acknowledge" },
235 { 13, 13, 0x01, "remote fault" },
236 { 12, 12, 0x01, "(reserved)" },
237 { 11, 11, 0x01, "asymmetric pause able" },
238 { 10, 10, 0x01, "pause able" },
239 { 9, 9, 0x01, "100BASE-T4 able" },
240 { 8, 8, 0x01, "100BASE-X full duplex able" },
241 { 7, 7, 0x01, "100BASE-TX able" },
242 { 6, 6, 0x01, "10BASE-T full duplex able" },
243 { 5, 5, 0x01, "10BASE-T able" },
244 { 4, 0, 0x1f, "xxx to do" },
247 #define DESC0LEN (sizeof(reg_0_desc_tbl)/sizeof(reg_0_desc_tbl[0]))
248 #define DESC1LEN (sizeof(reg_1_desc_tbl)/sizeof(reg_1_desc_tbl[0]))
249 #define DESC2LEN (sizeof(reg_2_desc_tbl)/sizeof(reg_2_desc_tbl[0]))
250 #define DESC3LEN (sizeof(reg_3_desc_tbl)/sizeof(reg_3_desc_tbl[0]))
251 #define DESC4LEN (sizeof(reg_4_desc_tbl)/sizeof(reg_4_desc_tbl[0]))
252 #define DESC5LEN (sizeof(reg_5_desc_tbl)/sizeof(reg_5_desc_tbl[0]))
254 typedef struct _MII_field_desc_and_len_t {
255 MII_field_desc_t * pdesc;
257 } MII_field_desc_and_len_t;
259 MII_field_desc_and_len_t desc_and_len_tbl[] = {
260 { reg_0_desc_tbl, DESC0LEN },
261 { reg_1_desc_tbl, DESC1LEN },
262 { reg_2_desc_tbl, DESC2LEN },
263 { reg_3_desc_tbl, DESC3LEN },
264 { reg_4_desc_tbl, DESC4LEN },
265 { reg_5_desc_tbl, DESC5LEN },
268 static void dump_reg(
270 MII_reg_desc_t * prd,
271 MII_field_desc_and_len_t * pdl);
273 static int special_field(
275 MII_field_desc_t * pdesc,
278 void MII_dump_0_to_5(
285 for (i = 0; i < 6; i++) {
286 if ((reglo <= i) && (i <= reghi))
287 dump_reg(regvals[i], ®_0_5_desc_tbl[i],
288 &desc_and_len_tbl[i]);
292 static void dump_reg(
294 MII_reg_desc_t * prd,
295 MII_field_desc_and_len_t * pdl)
298 ushort mask_in_place;
299 MII_field_desc_t * pdesc;
301 printf("%u. (%04hx) -- %s --\n",
302 prd->regno, regval, prd->name);
304 for (i = 0; i < pdl->len; i++) {
305 pdesc = &pdl->pdesc[i];
307 mask_in_place = pdesc->mask << pdesc->lo;
309 printf(" (%04hx:%04hx) %u.",
311 regval & mask_in_place,
314 if (special_field(prd->regno, pdesc, regval)) {
317 if (pdesc->hi == pdesc->lo)
318 printf("%2u ", pdesc->lo);
320 printf("%2u-%2u", pdesc->hi, pdesc->lo);
322 (regval & mask_in_place) >> pdesc->lo,
340 static int special_field(
342 MII_field_desc_t * pdesc,
345 if ((regno == 0) && (pdesc->lo == 6)) {
346 ushort speed_bits = regval & MII_CTL_SPEED_MASK;
347 printf("%2u,%2u = b%u%u speed selection = %s Mbps",
351 speed_bits == MII_CTL_SPEED_1000_MBPS ? "1000" :
352 speed_bits == MII_CTL_SPEED_100_MBPS ? "100" :
353 speed_bits == MII_CTL_SPEED_10_MBPS ? "10" :
358 else if ((regno == 0) && (pdesc->lo == 8)) {
359 printf("%2u = %5u duplex = %s",
361 (regval >> pdesc->lo) & 1,
362 ((regval >> pdesc->lo) & 1) ? "full" : "half");
366 else if ((regno == 4) && (pdesc->lo == 0)) {
367 ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask;
368 printf("%2u-%2u = %5u selector = %s",
369 pdesc->hi, pdesc->lo, sel_bits,
370 sel_bits == MII_AN_ADV_IEEE_802_3 ?
372 sel_bits == MII_AN_ADV_IEEE_802_9_ISLAN_16T ?
373 "IEEE 802.9 ISLAN-16T" :
378 else if ((regno == 5) && (pdesc->lo == 0)) {
379 ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask;
380 printf("%2u-%2u = %u selector = %s",
381 pdesc->hi, pdesc->lo, sel_bits,
382 sel_bits == MII_AN_PARTNER_IEEE_802_3 ?
384 sel_bits == MII_AN_PARTNER_IEEE_802_9_ISLAN_16T ?
385 "IEEE 802.9 ISLAN-16T" :
400 static void extract_range(
406 *plo = simple_strtoul(input, &end, 16);
409 *phi = simple_strtoul(end, NULL, 16);
416 /* ---------------------------------------------------------------- */
417 int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
420 unsigned char addrlo, addrhi, reglo, reghi;
421 unsigned char addr, reg;
430 * We use the last specified parameters, unless new ones are
434 addrlo = last_addr_lo;
435 addrhi = last_addr_hi;
440 if ((flag & CMD_FLAG_REPEAT) == 0) {
443 extract_range(argv[2], &addrlo, &addrhi);
445 extract_range(argv[3], ®lo, ®hi);
447 data = simple_strtoul (argv[4], NULL, 16);
451 * check info/read/write.
454 unsigned char j, start, end;
460 * Look for any and all PHYs. Valid addresses are 0..31.
463 start = addr; end = addr + 1;
468 for (j = start; j < end; j++) {
469 if (miiphy_info (j, &oui, &model, &rev) == 0) {
470 printf("PHY 0x%02X: "
477 miiphy_duplex (j) == FULL ? "FDX" : "HDX");
480 } else if (op == 'r') {
481 for (addr = addrlo; addr <= addrhi; addr++) {
482 for (reg = reglo; reg <= reghi; reg++) {
484 if (miiphy_read (addr, reg, &data) != 0) {
486 "Error reading from the PHY addr=%02x reg=%02x\n",
491 if ((addrlo != addrhi) || (reglo != reghi))
492 printf("addr=%02x reg=%02x data=",
493 (uint)addr, (uint)reg);
494 printf("%04X\n", data & 0x0000FFFF);
497 if ((addrlo != addrhi) && (reglo != reghi))
500 } else if (op == 'w') {
501 for (addr = addrlo; addr <= addrhi; addr++) {
502 for (reg = reglo; reg <= reghi; reg++) {
503 if (miiphy_write (addr, reg, data) != 0) {
504 printf("Error writing to the PHY addr=%02x reg=%02x\n",
510 } else if (op == 'd') {
513 if ((reglo > 5) || (reghi > 5)) {
515 "The MII dump command only formats the "
516 "standard MII registers, 0-5.\n");
519 for (addr = addrlo; addr <= addrhi; addr++) {
520 for (reg = 0; reg < 6; reg++) {
521 if (miiphy_read(addr, reg, ®s[reg]) != 0) {
524 "Error reading from the PHY addr=%02x reg=%02x\n",
530 MII_dump_0_to_5(regs, reglo, reghi);
534 printf("Usage:\n%s\n", cmdtp->usage);
539 * Save the parameters for repeats.
542 last_addr_lo = addrlo;
543 last_addr_hi = addrhi;
551 /***************************************************/
555 "mii - MII utility commands\n",
556 "info <addr> - display MII PHY info\n"
557 "mii read <addr> <reg> - read MII PHY <addr> register <reg>\n"
558 "mii write <addr> <reg> <data> - write MII PHY <addr> register <reg>\n"
559 "mii dump <addr> <reg> - pretty-print <addr> <reg> (0-5 only)\n"
560 "Addr and/or reg may be ranges, e.g. 2-7.\n"
563 #endif /* CONFIG_TERSE_MII */
565 #endif /* CFG_CMD_MII */