3 * Texas Instruments <www.ti.com>
6 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
7 * Marius Groeger <mgroeger@sysgo.de>
10 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
11 * Alex Zuepke <azu@sysgo.de>
13 * (C) Copyright 2002-2004
14 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
17 * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
19 * See file CREDITS for list of people who contributed to this
22 * This program is free software; you can redistribute it and/or
23 * modify it under the terms of the GNU General Public License as
24 * published by the Free Software Foundation; either version 2 of
25 * the License, or (at your option) any later version.
27 * This program is distributed in the hope that it will be useful,
28 * but WITHOUT ANY WARRANTY; without even the implied warranty of
29 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
30 * GNU General Public License for more details.
32 * You should have received a copy of the GNU General Public License
33 * along with this program; if not, write to the Free Software
34 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
41 #include <asm/proc-armv/ptrace.h>
43 #define TIMER_LOAD_VAL 0xffffffff
45 /* macro to read the 32 bit timer */
47 #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+8))
49 #ifdef CONFIG_INTEGRATOR
50 #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
52 #ifdef CONFIG_VERSATILE
53 #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
57 /* enable IRQ interrupts */
58 void enable_interrupts (void)
61 __asm__ __volatile__("mrs %0, cpsr\n"
71 * disable IRQ/FIQ interrupts
72 * returns true if interrupts had been enabled before we disabled them
74 int disable_interrupts (void)
76 unsigned long old,temp;
77 __asm__ __volatile__("mrs %0, cpsr\n"
80 : "=r" (old), "=r" (temp)
83 return (old & 0x80) == 0;
86 void enable_interrupts (void)
90 int disable_interrupts (void)
99 panic ("Resetting CPU ...\n");
103 void show_regs (struct pt_regs *regs)
106 const char *processor_modes[] = {
107 "USER_26", "FIQ_26", "IRQ_26", "SVC_26",
108 "UK4_26", "UK5_26", "UK6_26", "UK7_26",
109 "UK8_26", "UK9_26", "UK10_26", "UK11_26",
110 "UK12_26", "UK13_26", "UK14_26", "UK15_26",
111 "USER_32", "FIQ_32", "IRQ_32", "SVC_32",
112 "UK4_32", "UK5_32", "UK6_32", "ABT_32",
113 "UK8_32", "UK9_32", "UK10_32", "UND_32",
114 "UK12_32", "UK13_32", "UK14_32", "SYS_32",
117 flags = condition_codes (regs);
119 printf ("pc : [<%08lx>] lr : [<%08lx>]\n"
120 "sp : %08lx ip : %08lx fp : %08lx\n",
121 instruction_pointer (regs),
122 regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
123 printf ("r10: %08lx r9 : %08lx r8 : %08lx\n",
124 regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
125 printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
126 regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
127 printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
128 regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
129 printf ("Flags: %c%c%c%c",
130 flags & CC_N_BIT ? 'N' : 'n',
131 flags & CC_Z_BIT ? 'Z' : 'z',
132 flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
133 printf (" IRQs %s FIQs %s Mode %s%s\n",
134 interrupts_enabled (regs) ? "on" : "off",
135 fast_interrupts_enabled (regs) ? "on" : "off",
136 processor_modes[processor_mode (regs)],
137 thumb_mode (regs) ? " (T)" : "");
140 void do_undefined_instruction (struct pt_regs *pt_regs)
142 printf ("undefined instruction\n");
147 void do_software_interrupt (struct pt_regs *pt_regs)
149 printf ("software interrupt\n");
154 void do_prefetch_abort (struct pt_regs *pt_regs)
156 printf ("prefetch abort\n");
161 void do_data_abort (struct pt_regs *pt_regs)
163 printf ("data abort\n");
168 void do_not_used (struct pt_regs *pt_regs)
170 printf ("not used\n");
175 void do_fiq (struct pt_regs *pt_regs)
177 printf ("fast interrupt request\n");
182 void do_irq (struct pt_regs *pt_regs)
184 printf ("interrupt request\n");
189 static ulong timestamp;
190 static ulong lastdec;
192 /* nothing really to do with interrupts, just starts up a counter. */
193 int interrupt_init (void)
198 /* Start the decrementer ticking down from 0xffffffff */
199 *((int32_t *) (CFG_TIMERBASE + LOAD_TIM)) = TIMER_LOAD_VAL;
200 val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | (CFG_PVT << MPUTIM_PTV_BIT);
201 *((int32_t *) (CFG_TIMERBASE + CNTL_TIMER)) = val;
202 #endif /* CONFIG_OMAP */
203 #ifdef CONFIG_INTEGRATOR
204 /* Load timer with initial value */
205 *(volatile ulong *)(CFG_TIMERBASE + 0) = TIMER_LOAD_VAL;
206 /* Set timer to be enabled, free-running, no interrupts, 256 divider */
207 *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x8C;
208 #endif /* CONFIG_INTEGRATOR */
209 #ifdef CONFIG_VERSATILE
210 *(volatile ulong *)(CFG_TIMERBASE + 0) = CFG_TIMER_RELOAD; /* TimerLoad */
211 *(volatile ulong *)(CFG_TIMERBASE + 4) = CFG_TIMER_RELOAD; /* TimerValue */
212 *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x8C;
213 #endif /* CONFIG_VERSATILE */
215 /* init the timestamp and lastdec value */
216 reset_timer_masked();
222 * timer without interrupts
225 void reset_timer (void)
227 reset_timer_masked ();
230 ulong get_timer (ulong base)
232 return get_timer_masked () - base;
235 void set_timer (ulong t)
240 /* delay x useconds AND perserve advance timstamp value */
241 void udelay (unsigned long usec)
245 if(usec >= 1000){ /* if "big" number, spread normalization to seconds */
246 tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
247 tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */
248 tmo /= 1000; /* finish normalize. */
249 }else{ /* else small number, don't kill it prior to HZ multiply */
254 tmp = get_timer (0); /* get current timestamp */
255 if( (tmo + tmp + 1) < tmp ) /* if setting this fordward will roll time stamp */
256 reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastdec value */
258 tmo += tmp; /* else, set advancing stamp wake up time */
260 while (get_timer_masked () < tmo)/* loop till event */
264 void reset_timer_masked (void)
267 lastdec = READ_TIMER; /* capure current decrementer value time */
268 timestamp = 0; /* start "advancing" time stamp from 0 */
271 ulong get_timer_masked (void)
273 ulong now = READ_TIMER; /* current tick value */
275 if (lastdec >= now) { /* normal mode (non roll) */
277 timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */
278 } else { /* we have overflow of the count down timer */
279 /* nts = ts + ld + (TLV - now)
280 * ts=old stamp, ld=time that passed before passing through -1
281 * (TLV-now) amount of time after passing though -1
282 * nts = new "advancing time stamp"...it could also roll and cause problems.
284 timestamp += lastdec + TIMER_LOAD_VAL - now;
291 /* waits specified delay value and resets timestamp */
292 void udelay_masked (unsigned long usec)
296 if(usec >= 1000){ /* if "big" number, spread normalization to seconds */
297 tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
298 tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */
299 tmo /= 1000; /* finish normalize. */
300 }else{ /* else small number, don't kill it prior to HZ multiply */
305 reset_timer_masked (); /* set "advancing" timestamp to 0, set lastdec vaule */
307 while (get_timer_masked () < tmo) /* wait for time stamp to overtake tick number.*/
312 * This function is derived from PowerPC code (read timebase as long long).
313 * On ARM it just returns the timer value.
315 unsigned long long get_ticks(void)
321 * This function is derived from PowerPC code (timebase clock frequency).
322 * On ARM it returns the number of timer ticks per second.
324 ulong get_tbclk (void)