2 * armboot - Startup Code for ARM926EJS CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1610 from ARM925t code ------
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <gj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
38 #if defined(CONFIG_OMAP1610)
39 #include <./configs/omap1510.h>
43 *************************************************************************
45 * Jump vector table as in table 3.1 in [1]
47 *************************************************************************
54 ldr pc, _undefined_instruction
55 ldr pc, _software_interrupt
56 ldr pc, _prefetch_abort
62 _undefined_instruction:
63 .word undefined_instruction
65 .word software_interrupt
77 .balignl 16,0xdeadbeef
81 *************************************************************************
83 * Startup Code (reset vector)
85 * do important init only if we don't start from memory!
86 * setup Memory and board specific bits prior to relocation.
87 * relocate armboot to ram
90 *************************************************************************
94 * CFG_MEM_END is in the board dependent config-file (configs/config_BOARD.h)
104 * Note: _armboot_end_data and _armboot_end are defined
105 * by the (board-dependent) linker script.
106 * _armboot_end_data is the first usable FLASH address after armboot
108 .globl _armboot_end_data
110 .word armboot_end_data
116 * _armboot_real_end is the first usable RAM address behind armboot
117 * and the various stacks
119 .globl _armboot_real_end
123 #ifdef CONFIG_USE_IRQ
124 /* IRQ stack memory (calculated at run-time) */
125 .globl IRQ_STACK_START
129 /* IRQ stack memory (calculated at run-time) */
130 .globl FIQ_STACK_START
137 * the actual reset code
142 * set the cpu to SVC32 mode
151 * turn off the watchdog, unlock/diable sequence
164 * mask all IRQs by setting all bits in the INTMR - default
168 ldr r0, =REG_IHL1_MIR
170 ldr r0, =REG_IHL2_MIR
176 * relocate armboot to RAM
178 adr r0, _start /* r0 <- current position of code */
179 ldr r2, _armboot_start
181 sub r2, r3, r2 /* r2 <- size of armboot */
182 ldr r1, _TEXT_BASE /* r1 <- destination address */
183 add r2, r0, r2 /* r2 <- source end address */
186 * r0 = source address
187 * r1 = target address
188 * r2 = source end address
196 /* set up the stack */
198 add r0, r0, #CONFIG_STACKSIZE
199 sub sp, r0, #12 /* leave 3 words for abort-stack */
201 ldr pc, _start_armboot
208 *************************************************************************
210 * CPU_init_critical registers
212 * setup important registers
213 * setup memory timing
215 *************************************************************************
221 * flush v4 I/D caches
224 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
225 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
228 * disable MMU stuff and caches
230 mrc p15, 0, r0, c1, c0, 0
231 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
232 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
233 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
234 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
235 mcr p15, 0, r0, c1, c0, 0
238 * Go setup Memory and board specific bits prior to relocation.
240 mov ip, lr /* perserve link reg across call */
241 bl platformsetup /* go setup pll,mux,memory */
242 mov lr, ip /* restore link */
243 mov pc, lr /* back to my caller */
245 *************************************************************************
249 *************************************************************************
255 #define S_FRAME_SIZE 72
277 #define MODE_SVC 0x13
281 * use bad_save_user_regs for abort/prefetch/undef/swi ...
282 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
285 .macro bad_save_user_regs
286 @ carve out a frame on current user stack
287 sub sp, sp, #S_FRAME_SIZE
288 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
289 ldr r2, _armboot_end @ find top of stack
290 add r2, r2, #CONFIG_STACKSIZE @ find base of normal stack
291 sub r2, r2, #8 @ set base 2 words into abort stack
292 @ get values for "aborted" pc and cpsr (into parm regs)
294 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
297 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
298 mov r0, sp @ save current stack into r0 (param register)
301 .macro irq_save_user_regs
302 sub sp, sp, #S_FRAME_SIZE
303 stmia sp, {r0 - r12} @ Calling r0-r12
304 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
306 stmdb r8, {sp, lr}^ @ Calling SP, LR
307 str lr, [r8, #0] @ Save calling PC
309 str r6, [r8, #4] @ Save CPSR
310 str r0, [r8, #8] @ Save OLD_R0
314 .macro irq_restore_user_regs
315 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
317 ldr lr, [sp, #S_PC] @ Get PC
318 add sp, sp, #S_FRAME_SIZE
319 subs pc, lr, #4 @ return & move spsr_svc into cpsr
323 @ get bottom of stack (into sp by by user stack pointer).
324 ldr r13, _armboot_end
325 @ head to reserved words at the top of the stack
326 add r13, r13, #CONFIG_STACKSIZE
327 sub r13, r13, #8 @ reserved a couple spots in abort stack
329 str lr, [r13] @ save caller lr in position 0 of saved stack
330 mrs lr, spsr @ get the spsr
331 str lr, [r13, #4] @ save spsr in position 1 of saved stack
332 mov r13, #MODE_SVC @ prepare SVC-Mode
334 msr spsr, r13 @ switch modes, make sure moves will execute
335 mov lr, pc @ capture return pc
336 movs pc, lr @ jump to next instruction & switch modes.
339 .macro get_irq_stack @ setup IRQ stack
340 ldr sp, IRQ_STACK_START
343 .macro get_fiq_stack @ setup FIQ stack
344 ldr sp, FIQ_STACK_START
351 undefined_instruction:
354 bl do_undefined_instruction
360 bl do_software_interrupt
380 #ifdef CONFIG_USE_IRQ
387 irq_restore_user_regs
392 /* someone ought to write a more effiction fiq_save_user_regs */
395 irq_restore_user_regs
416 ldr r1, rstctl1 /* get clkm1 reset ctl */
418 strh r3, [r1] /* clear it */
420 strh r3, [r1] /* force dsp+arm reset */