2 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
3 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #ifndef CONFIG_IDENT_STRING
28 #define CONFIG_IDENT_STRING ""
31 /* last three long word reserved for cache status */
32 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END- 4)
33 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END- 8)
34 #define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-12)
40 move.w #0x2700,%sr; /* disable intrs */ \
41 subl #60,%sp; /* space for 15 regs */ \
42 moveml %d0-%d7/%a0-%a6,%sp@;
45 moveml %sp@,%d0-%d7/%a0-%a6; \
46 addl #60,%sp; /* space for 15 regs */ \
49 #if defined(CONFIG_CF_SBF)
50 #define ASM_DRAMINIT (asm_dram_init - TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR)
51 #define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR)
56 * Vector table. This is used for initial platform startup.
57 * These vectors are to catch any un-intended traps.
61 #if defined(CONFIG_CF_SBF)
62 INITSP: .long 0 /* Initial SP */
63 INITPC: .long ASM_DRAMINIT /* Initial PC */
65 INITSP: .long 0 /* Initial SP */
66 INITPC: .long _START /* Initial PC */
69 vector02: .long _FAULT /* Access Error */
70 vector03: .long _FAULT /* Address Error */
71 vector04: .long _FAULT /* Illegal Instruction */
72 vector05: .long _FAULT /* Reserved */
73 vector06: .long _FAULT /* Reserved */
74 vector07: .long _FAULT /* Reserved */
75 vector08: .long _FAULT /* Privilege Violation */
76 vector09: .long _FAULT /* Trace */
77 vector0A: .long _FAULT /* Unimplemented A-Line */
78 vector0B: .long _FAULT /* Unimplemented F-Line */
79 vector0C: .long _FAULT /* Debug Interrupt */
80 vector0D: .long _FAULT /* Reserved */
81 vector0E: .long _FAULT /* Format Error */
82 vector0F: .long _FAULT /* Unitialized Int. */
86 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
88 vector18: .long _FAULT /* Spurious Interrupt */
89 vector19: .long _FAULT /* Autovector Level 1 */
90 vector1A: .long _FAULT /* Autovector Level 2 */
91 vector1B: .long _FAULT /* Autovector Level 3 */
92 vector1C: .long _FAULT /* Autovector Level 4 */
93 vector1D: .long _FAULT /* Autovector Level 5 */
94 vector1E: .long _FAULT /* Autovector Level 6 */
95 vector1F: .long _FAULT /* Autovector Level 7 */
97 #if !defined(CONFIG_CF_SBF)
100 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
101 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
105 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
106 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
109 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
110 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
111 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
112 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
113 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
114 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
115 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
116 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
119 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
120 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
121 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
122 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
123 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
124 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
125 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
126 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
129 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
130 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
131 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
132 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
133 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
134 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
135 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
136 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
139 #if defined(CONFIG_CF_SBF)
140 /* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
142 .long 0x00000000 /* checksum, not yet implemented */
143 .long 0x00020000 /* image length */
144 .long TEXT_BASE /* image to be relocated at */
147 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
148 movec %d0, %RAMBAR1 /* init Rambar */
149 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
152 /* Must disable global address */
153 move.l #0xFC008000, %a1
154 move.l #(CONFIG_SYS_CS0_BASE), (%a1)
155 move.l #0xFC008008, %a1
156 move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
157 move.l #0xFC008004, %a1
158 move.l #(CONFIG_SYS_CS0_MASK), (%a1)
161 * Dram Initialization
165 move.l #0xFC0A4074, %a1
166 move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
169 /* SDRAM Chip 0 and 1 */
170 move.l #0xFC0B8110, %a1
171 move.l #0xFC0B8114, %a2
173 /* calculate the size */
175 move.l #(CONFIG_SYS_SDRAM_SIZE), %d2
176 #ifdef CONFIG_SYS_SDRAM_BASE1
186 /* SDRAM Chip 0 and 1 */
187 move.l #(CONFIG_SYS_SDRAM_BASE), (%a1)
189 #ifdef CONFIG_SYS_SDRAM_BASE1
190 move.l #(CONFIG_SYS_SDRAM_BASE1), (%a2)
195 /* dram cfg1 and cfg2 */
196 move.l #0xFC0B8008, %a1
197 move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1)
199 move.l #0xFC0B800C, %a2
200 move.l #(CONFIG_SYS_SDRAM_CFG2), (%a2)
203 move.l #0xFC0B8000, %a1 /* Mode */
204 move.l #0xFC0B8004, %a2 /* Ctrl */
207 move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
211 move.l #(CONFIG_SYS_SDRAM_MODE), (%a1)
213 move.l #(CONFIG_SYS_SDRAM_EMOD), (%a1)
223 move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
226 /* Perform two refresh cycles */
227 move.l #(CONFIG_SYS_SDRAM_CTRL + 4), %d0
233 move.l #(CONFIG_SYS_SDRAM_CTRL), %d0
234 and.l #0x7FFFFFFF, %d0
235 or.l #0x10000c00, %d0
240 * DSPI Initialization
241 * a0 - general, sram - 0x80008000 - 32, see M52277EVB.h
248 /* Enable pins for DSPI mode - chip-selects are enabled later */
249 move.l #0xFC0A4036, %a0
254 #ifdef CONFIG_SYS_DSPI_CS0
259 #ifdef CONFIG_SYS_DSPI_CS2
260 move.l #0xFC0A4037, %a0
267 /* Configure DSPI module */
268 move.l #0xFC05C000, %a0
269 move.l #0x80FF0C00, (%a0) /* Master, clear TX/RX FIFO */
271 move.l #0xFC05C00C, %a0
272 move.l #0x3E000011, (%a0)
274 move.l #0xFC05C034, %a2 /* dtfr */
275 move.l #0xFC05C03B, %a3 /* drfr */
277 move.l #(ASM_SBF_IMG_HDR + 4), %a1
281 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_SBFHDR_DATA_OFFSET), %a0
282 move.l #(CONFIG_SYS_SBFHDR_SIZE), %d4
284 move.l #0xFC05C02C, %a1 /* dspi status */
286 /* Issue commands and address */
287 move.l #0x8004000B, %d2 /* Fast Read Cmd */
288 jsr asm_dspi_wr_status
289 jsr asm_dspi_rd_status
291 move.l #0x80040000, %d2 /* Address byte 2 */
292 jsr asm_dspi_wr_status
293 jsr asm_dspi_rd_status
295 move.l #0x80040000, %d2 /* Address byte 1 */
296 jsr asm_dspi_wr_status
297 jsr asm_dspi_rd_status
299 move.l #0x80040000, %d2 /* Address byte 0 */
300 jsr asm_dspi_wr_status
301 jsr asm_dspi_rd_status
303 move.l #0x80040000, %d2 /* Dummy Wr and Rd */
304 jsr asm_dspi_wr_status
305 jsr asm_dspi_rd_status
307 /* Transfer serial boot header to sram */
309 move.l #0x80040000, %d2
310 jsr asm_dspi_wr_status
311 jsr asm_dspi_rd_status
313 move.b %d1, (%a0) /* read, copy to dst */
315 add.l #1, %a0 /* inc dst by 1 */
316 sub.l #1, %d4 /* dec cnt by 1 */
317 bne asm_dspi_rd_loop1
319 /* Transfer u-boot from serial flash to memory */
321 move.l #0x80040000, %d2
322 jsr asm_dspi_wr_status
323 jsr asm_dspi_rd_status
325 move.b %d1, (%a4) /* read, copy to dst */
327 add.l #1, %a4 /* inc dst by 1 */
328 sub.l #1, %d5 /* dec cnt by 1 */
329 bne asm_dspi_rd_loop2
331 move.l #0x00040000, %d2 /* Terminate */
332 jsr asm_dspi_wr_status
333 jsr asm_dspi_rd_status
335 /* jump to memory and execute */
336 move.l #(TEXT_BASE + 0x400), %a0
341 move.l (%a1), %d0 /* status */
342 and.l #0x0000F000, %d0
343 cmp.l #0x00003000, %d0
344 bgt asm_dspi_wr_status
350 move.l (%a1), %d0 /* status */
351 and.l #0x000000F0, %d0
354 beq asm_dspi_rd_status
358 #endif /* CONFIG_CF_SBF */
366 move.w #0x2700,%sr /* Mask off Interrupt */
368 /* Set vector base register at the beginning of the Flash */
369 #if defined(CONFIG_CF_SBF)
370 move.l #TEXT_BASE, %d0
373 move.l #CONFIG_SYS_FLASH_BASE, %d0
376 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
380 /* initialize general use internal ram */
382 move.l #(ICACHE_STATUS), %a1 /* icache */
383 move.l #(DCACHE_STATUS), %a2 /* icache */
384 move.l #(CACR_STATUS), %a3 /* CACR */
389 /* invalidate and disable cache */
390 move.l #0x01000000, %d0 /* Invalidate cache cmd */
391 movec %d0, %CACR /* Invalidate cache */
396 /* set stackpointer to end of internal ram to get some stackspace for
398 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
401 move.l #__got_start, %a5 /* put relocation table address to a5 */
403 bsr cpu_init_f /* run low-level CPU init code (from flash) */
404 bsr board_init_f /* run low-level board init code (from flash) */
406 /* board_init_f() does not return */
408 /*------------------------------------------------------------------------------*/
411 * void relocate_code (addr_sp, gd, addr_moni)
413 * This "function" does not return, instead it continues in RAM
414 * after relocating the monitor code.
418 * r5 = length in bytes
424 move.l 8(%a6), %sp /* set new stack pointer */
426 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
427 move.l 16(%a6), %a0 /* Save copy of Destination Address */
429 move.l #CONFIG_SYS_MONITOR_BASE, %a1
430 move.l #__init_end, %a2
433 /* copy the code to RAM */
435 move.l (%a1)+, (%a3)+
440 * We are done. Do not return, instead branch to second part of board
441 * initialization, now running from RAM.
444 add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
451 * Now clear BSS segment
454 add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
456 add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
463 * fix got table in RAM
466 add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
467 move.l %a1,%a5 /* * fix got pointer register a5 */
470 add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
480 /* calculate relative jump to board_init_r in ram */
482 add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
484 /* set parameters for board_init_r */
485 move.l %a0,-(%sp) /* dest_addr */
486 move.l %d0,-(%sp) /* gd */
489 /*------------------------------------------------------------------------------*/
511 /*------------------------------------------------------------------------------*/
512 /* cache functions */
515 move.l #0x01200000, %d0 /* Invalid cache */
518 move.l #(CONFIG_SYS_SDRAM_BASE + 0x1c000), %d0
521 move.l #0x81600610, %d0 /* Enable cache */
524 move.l #(ICACHE_STATUS), %a1
529 .globl icache_disable
531 move.l #0x01F00000, %d0 /* Setup cache mask */
532 movec %d0, %CACR /* Invalidate icache */
537 move.l #(ICACHE_STATUS), %a1
544 move.l #(ICACHE_STATUS), %a1
548 .globl icache_invalid
550 move.l #0x80600610, %d0 /* Invalidate icache */
551 movec %d0, %CACR /* Enable and invalidate cache */
556 move.l #0x01200000, %d0 /* Invalid cache */
559 move.l #0x81300610, %d0
562 move.l #(DCACHE_STATUS), %a1
567 .globl dcache_disable
569 move.l #0x81600610, %d0 /* Setup cache mask */
570 movec %d0, %CACR /* Invalidate icache */
572 move.l #(DCACHE_STATUS), %a1
577 .globl dcache_invalid
579 move.l #0x81100610, %d0 /* Setup cache mask */
580 movec %d0, %CACR /* Enable and invalidate cache */
585 move.l #(DCACHE_STATUS), %a1
589 /*------------------------------------------------------------------------------*/
591 .globl version_string
593 .ascii U_BOOT_VERSION
594 .ascii " (", __DATE__, " - ", __TIME__, ")"
595 .ascii CONFIG_IDENT_STRING, "\0"