3 * Josef Baumgartner <josef.baumgartner@telex.de>
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include <asm/m5272.h>
29 #include <asm/immap_5272.h>
33 #include <asm/m5282.h>
34 #include <asm/immap_5282.h>
39 * Breath some life into the CPU...
41 * Set up the memory map,
42 * initialize a bunch of registers,
43 * initialize the UPM's
45 void cpu_init_f (void)
47 /* if we come from RAM we assume the CPU is
48 * already initialized.
50 #ifndef CONFIG_MONITOR_IS_IN_RAM
51 volatile immap_t *regp = (immap_t *)CFG_MBAR;
53 volatile unsigned char *mbar;
54 mbar = (volatile unsigned char *) CFG_MBAR;
56 regp->sysctrl_reg.sc_scr = CFG_SCR;
57 regp->sysctrl_reg.sc_spr = CFG_SPR;
60 regp->gpio_reg.gpio_pacnt = CFG_PACNT;
61 regp->gpio_reg.gpio_paddr = CFG_PADDR;
62 regp->gpio_reg.gpio_padat = CFG_PADAT;
63 regp->gpio_reg.gpio_pbcnt = CFG_PBCNT;
64 regp->gpio_reg.gpio_pbddr = CFG_PBDDR;
65 regp->gpio_reg.gpio_pbdat = CFG_PBDAT;
66 regp->gpio_reg.gpio_pdcnt = CFG_PDCNT;
68 /* Memory Controller: */
69 regp->csctrl_reg.cs_br0 = CFG_BR0_PRELIM;
70 regp->csctrl_reg.cs_or0 = CFG_OR0_PRELIM;
72 #if (defined(CFG_OR1_PRELIM) && defined(CFG_BR1_PRELIM))
73 regp->csctrl_reg.cs_br1 = CFG_BR1_PRELIM;
74 regp->csctrl_reg.cs_or1 = CFG_OR1_PRELIM;
77 #if defined(CFG_OR2_PRELIM) && defined(CFG_BR2_PRELIM)
78 regp->csctrl_reg.cs_br2 = CFG_BR2_PRELIM;
79 regp->csctrl_reg.cs_or2 = CFG_OR2_PRELIM;
82 #if defined(CFG_OR3_PRELIM) && defined(CFG_BR3_PRELIM)
83 regp->csctrl_reg.cs_br3 = CFG_BR3_PRELIM;
84 regp->csctrl_reg.cs_or3 = CFG_OR3_PRELIM;
87 #if defined(CFG_OR4_PRELIM) && defined(CFG_BR4_PRELIM)
88 regp->csctrl_reg.cs_br4 = CFG_BR4_PRELIM;
89 regp->csctrl_reg.cs_or4 = CFG_OR4_PRELIM;
92 #if defined(CFG_OR5_PRELIM) && defined(CFG_BR5_PRELIM)
93 regp->csctrl_reg.cs_br5 = CFG_BR5_PRELIM;
94 regp->csctrl_reg.cs_or5 = CFG_OR5_PRELIM;
97 #if defined(CFG_OR6_PRELIM) && defined(CFG_BR6_PRELIM)
98 regp->csctrl_reg.cs_br6 = CFG_BR6_PRELIM;
99 regp->csctrl_reg.cs_or6 = CFG_OR6_PRELIM;
102 #if defined(CFG_OR7_PRELIM) && defined(CFG_BR7_PRELIM)
103 regp->csctrl_reg.cs_br7 = CFG_BR7_PRELIM;
104 regp->csctrl_reg.cs_or7 = CFG_OR7_PRELIM;
107 #endif /* #ifndef CONFIG_MONITOR_IS_IN_RAM */
109 /* enable instruction cache now */
115 * initialize higher level parts of CPU like timers
117 int cpu_init_r (void)
121 #endif /* #ifdef CONFIG_M5272 */
126 * Breath some life into the CPU...
128 * Set up the memory map,
129 * initialize a bunch of registers,
130 * initialize the UPM's
132 void cpu_init_f (void)
138 * initialize higher level parts of CPU like timers
140 int cpu_init_r (void)