2 * Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
3 * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
4 * Copyright (C) 2000,2001,2002 Wolfgang Denk <wd@denx.de>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 /* U-Boot - Startup Code for PowerPC based Embedded Boards
28 * The processor starts at 0x00000100 and the code is executed
29 * from flash. The code is organized to be at an other address
30 * in memory, but as long we don't jump around before relocating.
31 * board_init lies at a quite high address and when the cpu has
32 * jumped there, everything is ok.
33 * This works because the cpu gives the FLASH (CS0) the whole
34 * address space at startup, and board_init lies as a echo of
35 * the flash somewhere up there in the memorymap.
37 * board_init will change CS0 to be positioned at the correct
38 * address and (s)dram will be positioned at address 0
44 #define CONFIG_8xx 1 /* needed for Linux kernel header files */
45 #define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
47 #include <ppc_asm.tmpl>
50 #include <asm/cache.h>
53 #ifndef CONFIG_IDENT_STRING
54 #define CONFIG_IDENT_STRING ""
57 /* We don't want the MMU yet.
60 #define MSR_KERNEL ( MSR_ME | MSR_RI ) /* Machine Check and Recoverable Interr. */
63 * Set up GOT: Global Offset Table
65 * Use r14 to access the GOT
68 GOT_ENTRY(_GOT2_TABLE_)
69 GOT_ENTRY(_FIXUP_TABLE_)
72 GOT_ENTRY(_start_of_vectors)
73 GOT_ENTRY(_end_of_vectors)
74 GOT_ENTRY(transfer_to_handler)
78 #if defined(CONFIG_FADS) || defined(CONFIG_ICU862)
79 GOT_ENTRY(environment)
84 * r3 - 1st arg to board_init(): IMMP pointer
85 * r4 - 2nd arg to board_init(): boot flag
88 .long 0x27051956 /* U-Boot Magic Number */
92 .ascii " (", __DATE__, " - ", __TIME__, ")"
93 .ascii CONFIG_IDENT_STRING, "\0"
98 lis r3, CFG_IMMR@h /* position IMMR */
100 li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */
103 . = EXC_OFF_SYS_RESET + 0x10
107 li r21, BOOTFLAG_WARM /* Software reboot */
113 /* Initialize machine status; enable machine check interrupt */
114 /*----------------------------------------------------------------------*/
115 li r3, MSR_KERNEL /* Set ME, RI flags */
117 mtspr SRR1, r3 /* Make SRR1 match MSR */
119 mfspr r3, ICR /* clear Interrupt Cause Register */
121 /* Initialize debug port registers */
122 /*----------------------------------------------------------------------*/
123 xor r0, r0, r0 /* Clear R0 */
124 mtspr LCTRL1, r0 /* Initialize debug port regs */
129 /* Reset the caches */
130 /*----------------------------------------------------------------------*/
132 mfspr r3, IC_CST /* Clear error bits */
135 lis r3, IDC_UNALL@h /* Unlock all */
139 lis r3, IDC_INVALL@h /* Invalidate all */
143 lis r3, IDC_DISABLE@h /* Disable data cache */
146 #if !(defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || defined (CONFIG_FLAGADM))
147 /* On IP860 and PCU E,
148 * we cannot enable IC yet
150 lis r3, IDC_ENABLE@h /* Enable instruction cache */
154 /* invalidate all tlb's */
155 /*----------------------------------------------------------------------*/
161 * Calculate absolute address in FLASH and jump there
162 *----------------------------------------------------------------------*/
164 lis r3, CFG_MONITOR_BASE@h
165 ori r3, r3, CFG_MONITOR_BASE@l
166 addi r3, r3, in_flash - _start + EXC_OFF_SYS_RESET
172 /* initialize some SPRs that are hard to access from C */
173 /*----------------------------------------------------------------------*/
175 lis r3, CFG_IMMR@h /* pass IMMR as arg1 to C routine */
176 ori r1, r3, CFG_INIT_SP_OFFSET /* set up the stack in internal DPRAM */
177 /* Note: R0 is still 0 here */
178 stwu r0, -4(r1) /* clear final stack frame so that */
179 stwu r0, -4(r1) /* stack backtraces terminate cleanly */
182 * Disable serialized ifetch and show cycles
183 * (i.e. set processor to normal mode).
184 * This is also a silicon bug workaround, see errata
190 /* Set up debug mode entry */
193 ori r2, r2, CFG_DER@l
196 /* let the C-code set up the rest */
198 /* Be careful to keep code relocatable ! */
199 /*----------------------------------------------------------------------*/
201 GET_GOT /* initialize GOT access */
204 bl cpu_init_f /* run low-level CPU init code (from Flash) */
208 bl board_init_f /* run 1st part of board init code (from Flash) */
212 .globl _start_of_vectors
216 STD_EXCEPTION(0x200, MachineCheck, MachineCheckException)
218 /* Data Storage exception. "Never" generated on the 860. */
219 STD_EXCEPTION(0x300, DataStorage, UnknownException)
221 /* Instruction Storage exception. "Never" generated on the 860. */
222 STD_EXCEPTION(0x400, InstStorage, UnknownException)
224 /* External Interrupt exception. */
225 STD_EXCEPTION(0x500, ExtInterrupt, external_interrupt)
227 /* Alignment exception. */
235 addi r3,r1,STACK_FRAME_OVERHEAD
237 rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
238 lwz r6,GOT(transfer_to_handler)
242 .long AlignmentException - _start + EXC_OFF_SYS_RESET
243 .long int_return - _start + EXC_OFF_SYS_RESET
245 /* Program check exception */
249 addi r3,r1,STACK_FRAME_OVERHEAD
251 rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
252 lwz r6,GOT(transfer_to_handler)
256 .long ProgramCheckException - _start + EXC_OFF_SYS_RESET
257 .long int_return - _start + EXC_OFF_SYS_RESET
259 /* No FPU on MPC8xx. This exception is not supposed to happen.
261 STD_EXCEPTION(0x800, FPUnavailable, UnknownException)
263 /* I guess we could implement decrementer, and may have
264 * to someday for timekeeping.
266 STD_EXCEPTION(0x900, Decrementer, timer_interrupt)
267 STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
268 STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
272 * r0 - SYSCALL number
276 addis r11,r0,0 /* get functions table addr */
277 ori r11,r11,0 /* Note: this code is patched in trap_init */
278 addis r12,r0,0 /* get number of functions */
284 rlwinm r0,r0,2,0,31 /* fn_addr = fn_tbl[r0] */
288 li r20,0xd00-4 /* Get stack pointer */
290 subi r12,r12,12 /* Adjust stack pointer */
291 li r0,0xc00+_end_back-SystemCall
292 cmplw 0, r0, r12 /* Check stack overflow */
303 li r12,0xc00+_back-SystemCall
312 mfmsr r11 /* Disable interrupts */
316 SYNC /* Some chip revs need this... */
320 li r12,0xd00-4 /* restore regs */
330 addi r12,r12,12 /* Adjust stack pointer */
338 STD_EXCEPTION(0xd00, SingleStep, UnknownException)
340 STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
341 STD_EXCEPTION(0xf00, Trap_0f, UnknownException)
343 /* On the MPC8xx, this is a software emulation interrupt. It occurs
344 * for all unimplemented and illegal instructions.
346 STD_EXCEPTION(0x1000, SoftEmu, SoftEmuException)
348 STD_EXCEPTION(0x1100, InstructionTLBMiss, UnknownException)
349 STD_EXCEPTION(0x1200, DataTLBMiss, UnknownException)
350 STD_EXCEPTION(0x1300, InstructionTLBError, UnknownException)
351 STD_EXCEPTION(0x1400, DataTLBError, UnknownException)
353 STD_EXCEPTION(0x1500, Reserved5, UnknownException)
354 STD_EXCEPTION(0x1600, Reserved6, UnknownException)
355 STD_EXCEPTION(0x1700, Reserved7, UnknownException)
356 STD_EXCEPTION(0x1800, Reserved8, UnknownException)
357 STD_EXCEPTION(0x1900, Reserved9, UnknownException)
358 STD_EXCEPTION(0x1a00, ReservedA, UnknownException)
359 STD_EXCEPTION(0x1b00, ReservedB, UnknownException)
361 STD_EXCEPTION(0x1c00, DataBreakpoint, UnknownException)
362 STD_EXCEPTION(0x1d00, InstructionBreakpoint, DebugException)
363 STD_EXCEPTION(0x1e00, PeripheralBreakpoint, UnknownException)
364 STD_EXCEPTION(0x1f00, DevPortBreakpoint, UnknownException)
367 .globl _end_of_vectors
374 * This code finishes saving the registers to the exception frame
375 * and jumps to the appropriate handler for the exception.
376 * Register r21 is pointer into trap frame, r1 has new stack pointer.
378 .globl transfer_to_handler
389 andi. r24,r23,0x3f00 /* get vector offset */
393 mtspr SPRG2,r22 /* r1 is now kernel sp */
394 lwz r24,0(r23) /* virtual address of handler */
395 lwz r23,4(r23) /* where to go when done */
400 rfi /* jump to handler, enable MMU */
403 mfmsr r28 /* Disable interrupts */
407 SYNC /* Some chip revs need this... */
422 lwz r2,_NIP(r1) /* Restore environment */
443 .globl icache_disable
446 lis r3, IDC_DISABLE@h
453 srwi r3, r3, 31 /* >>31 => select bit 0 */
462 lis r3, 0x0400 /* Set cache mode with MMU off */
476 .globl dcache_disable
479 lis r3, IDC_DISABLE@h
488 srwi r3, r3, 31 /* >>31 => select bit 0 */
498 * unsigned int get_immr (unsigned int mask)
500 * return (mask ? (IMMR & mask) : IMMR);
504 mr r4,r3 /* save mask */
505 mfspr r3, IMMR /* IMMR */
506 cmpwi 0,r4,0 /* mask != 0 ? */
508 and r3,r3,r4 /* IMMR & mask */
549 /*------------------------------------------------------------------------------*/
552 * void relocate_code (addr_sp, gd, addr_moni)
554 * This "function" does not return, instead it continues in RAM
555 * after relocating the monitor code.
559 * r5 = length in bytes
564 mr r1, r3 /* Set new stack pointer */
565 mr r9, r4 /* Save copy of Global Data pointer */
566 mr r10, r5 /* Save copy of Destination Address */
568 mr r3, r5 /* Destination Address */
569 lis r4, CFG_MONITOR_BASE@h /* Source Address */
570 ori r4, r4, CFG_MONITOR_BASE@l
571 lis r5, CFG_MONITOR_LEN@h /* Length in Bytes */
572 ori r5, r5, CFG_MONITOR_LEN@l
573 li r6, CFG_CACHELINE_SIZE /* Cache Line Size */
578 * New GOT-PTR = (old GOT-PTR - CFG_MONITOR_BASE) + Destination Address
584 /* First our own GOT */
586 /* the the one used by the C code */
596 beq cr1,4f /* In place copy is not necessary */
597 beq 7f /* Protect against 0 count */
616 * Now flush the cache: note that we must start from a cache aligned
617 * address. Otherwise we might miss one cache line.
621 beq 7f /* Always flush prefetch queue in any case */
629 sync /* Wait for all dcbst to complete on bus */
635 7: sync /* Wait for all icbi to complete on bus */
639 * We are done. Do not return, instead branch to second part of board
640 * initialization, now running from RAM.
643 addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
650 * Relocation Function, r14 point to got2+0x8000
652 * Adjust got2 pointers, no need to check for 0, this code
653 * already puts a few entries in the table.
655 li r0,__got2_entries@sectoff@l
656 la r3,GOT(_GOT2_TABLE_)
657 lwz r11,GOT(_GOT2_TABLE_)
667 * Now adjust the fixups and the pointers to the fixups
668 * in case we need to move ourselves again.
670 2: li r0,__fixup_entries@sectoff@l
671 lwz r3,GOT(_FIXUP_TABLE_)
685 * Now clear BSS segment
688 #if defined(CONFIG_FADS) || defined(CONFIG_ICU862)
690 * For the FADS - the environment is the very last item in flash.
691 * The real .bss stops just before environment starts, so only
692 * clear up to that point.
694 lwz r4,GOT(environment)
710 mr r3, r9 /* Global Data pointer */
711 mr r4, r10 /* Destination Address */
714 /* Problems accessing "end" in C, so do it here */
721 * Copy exception vector code to low memory
724 * r7: source address, r8: end address, r9: target address
729 lwz r8, GOT(_end_of_vectors)
731 rlwinm r9, r7, 0, 22, 31 /* _start & 0x3FF */
734 bgelr /* return if r7>=r8 - just in case */
736 mflr r4 /* save link register */
746 * relocate `hdlr' and `int_return' entries
748 li r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
749 li r8, Alignment - _start + EXC_OFF_SYS_RESET
752 addi r7, r7, 0x100 /* next exception vector */
756 li r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
759 li r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
762 li r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
763 li r8, SystemCall - _start + EXC_OFF_SYS_RESET
766 addi r7, r7, 0x100 /* next exception vector */
770 li r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
771 li r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
774 addi r7, r7, 0x100 /* next exception vector */
778 mtlr r4 /* restore link register */
782 * Function: relocate entries for one exception vector
785 lwz r0, 0(r7) /* hdlr ... */
786 add r0, r0, r3 /* ... += dest_addr */
789 lwz r0, 4(r7) /* int_return ... */
790 add r0, r0, r3 /* ... += dest_addr */