git.sur5r.net Git - u-boot/blob - cpu/ppc4xx/fdt.c

   1 /*
   2  * (C) Copyright 2007-2008
   3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <watchdog.h>
  26 #include <command.h>
  27 #include <asm/cache.h>
  28 #include <ppc4xx.h>
  29
  30 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
  31 #include <libfdt.h>
  32 #include <libfdt_env.h>
  33 #include <fdt_support.h>
  34 #include <asm/4xx_pcie.h>
  35
  36 DECLARE_GLOBAL_DATA_PTR;
  37
  38 void __ft_board_setup(void *blob, bd_t *bd)
  39 {
  40         u32 val[4];
  41         int rc;
  42
  43         ft_cpu_setup(blob, bd);
  44
  45         /* Fixup NOR mapping */
  46         val[0] = 0;                             /* chip select number */
  47         val[1] = 0;                             /* always 0 */
  48         val[2] = gd->bd->bi_flashstart;
  49         val[3] = gd->bd->bi_flashsize;
  50         if (fdt_path_offset(blob, "/plb/opb/ebc") >= 0) {
  51                 rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
  52                                           val, sizeof(val), 1);
  53         } else {
  54                 /*
  55                  * Some 405 PPC's have EBC as direct PLB child in the dts
  56                  */
  57                 rc = fdt_find_and_setprop(blob, "/plb/ebc", "ranges",
  58                                           val, sizeof(val), 1);
  59         }
  60         if (rc)
  61                 printf("Unable to update property NOR mapping, err=%s\n",
  62                        fdt_strerror(rc));
  63 }
  64 void ft_board_setup(void *blob, bd_t *bd) __attribute__((weak, alias("__ft_board_setup")));
  65
  66 /*
  67  * Fixup all PCIe nodes by setting the device_type property
  68  * to "pci-endpoint" instead is "pci" for endpoint ports.
  69  * This property will get checked later by the Linux driver
  70  * to properly configure the PCIe port in Linux (again).
  71  */
  72 void fdt_pcie_setup(void *blob)
  73 {
  74         const char *compat = "ibm,plb-pciex";
  75         const char *prop = "device_type";
  76         const char *prop_val = "pci-endpoint";
  77         const u32 *port;
  78         int no;
  79         int rc;
  80
  81         /* Search first PCIe node */
  82         no = fdt_node_offset_by_compatible(blob, -1, compat);
  83         while (no != -FDT_ERR_NOTFOUND) {
  84                 port = fdt_getprop(blob, no, "port", NULL);
  85                 if (port == NULL) {
  86                         printf("WARNING: could not find port property\n");
  87                 } else {
  88                         if (is_end_point(*port)) {
  89                                 rc = fdt_setprop(blob, no, prop, prop_val,
  90                                                  strlen(prop_val) + 1);
  91                                 if (rc < 0)
  92                                         printf("WARNING: could not set %s for %s: %s.\n",
  93                                                prop, compat, fdt_strerror(rc));
  94                         }
  95                 }
  96
  97                 /* Jump to next PCIe node */
  98                 no = fdt_node_offset_by_compatible(blob, no, compat);
  99         }
 100 }
 101
 102 void ft_cpu_setup(void *blob, bd_t *bd)
 103 {
 104         sys_info_t sys_info;
 105
 106         get_sys_info(&sys_info);
 107
 108         do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, "timebase-frequency",
 109                              bd->bi_intfreq, 1);
 110         do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, "clock-frequency",
 111                              bd->bi_intfreq, 1);
 112         do_fixup_by_path_u32(blob, "/plb", "clock-frequency", sys_info.freqPLB, 1);
 113         do_fixup_by_path_u32(blob, "/plb/opb", "clock-frequency", sys_info.freqOPB, 1);
 114
 115         if (fdt_path_offset(blob, "/plb/opb/ebc") >= 0)
 116                 do_fixup_by_path_u32(blob, "/plb/opb/ebc", "clock-frequency",
 117                         sys_info.freqEBC, 1);
 118         else
 119                 do_fixup_by_path_u32(blob, "/plb/ebc", "clock-frequency",
 120                         sys_info.freqEBC, 1);
 121
 122         fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
 123
 124         /*
 125          * Setup all baudrates for the UARTs
 126          */
 127         do_fixup_by_compat_u32(blob, "ns16550", "clock-frequency", gd->uart_clk, 1);
 128
 129         /*
 130          * Fixup all ethernet nodes
 131          * Note: aliases in the dts are required for this
 132          */
 133         fdt_fixup_ethernet(blob, bd);
 134
 135         /*
 136          * Fixup all available PCIe nodes by setting the device_type property
 137          */
 138         fdt_pcie_setup(blob);
 139 }
 140 #endif /* CONFIG_OF_LIBFDT && CONFIG_OF_BOARD_SETUP */