2 * Copyright (C) Freescale Semiconductor, Inc. 2006.
3 * Author: Jason Jin<Jason.jin@freescale.com>
4 * Zhang Wei<wei.zhang@freescale.com>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * with the reference on libata and ahci drvier in kernel
31 #include <asm/processor.h>
32 #include <asm/errno.h>
37 #include <linux/ctype.h>
40 struct ahci_probe_ent *probe_ent = NULL;
41 hd_driveid_t *ataid[AHCI_MAX_PORTS];
43 #define writel_with_flush(a,b) do { writel(a,b); readl(b); } while (0)
46 * Some controllers limit number of blocks they can read at once. Contemporary
47 * SSD devices work much faster if the read size is aligned to a power of 2.
48 * Let's set default to 128 and allowing to be overwritten if needed.
50 #ifndef MAX_SATA_BLOCKS_READ
51 #define MAX_SATA_BLOCKS_READ 0x80
54 static inline u32 ahci_port_base(u32 base, u32 port)
56 return base + 0x100 + (port * 0x80);
60 static void ahci_setup_port(struct ahci_ioports *port, unsigned long base,
61 unsigned int port_idx)
63 base = ahci_port_base(base, port_idx);
65 port->cmd_addr = base;
66 port->scr_addr = base + PORT_SCR;
70 #define msleep(a) udelay(a * 1000)
71 #define ssleep(a) msleep(a * 1000)
73 static int waiting_for_cmd_completed(volatile u8 *offset,
80 for (i = 0; ((status = readl(offset)) & sign) && i < timeout_msec; i++)
83 return (i < timeout_msec) ? 0 : -1;
87 static int ahci_host_init(struct ahci_probe_ent *probe_ent)
89 #ifndef CONFIG_SCSI_AHCI_PLAT
90 pci_dev_t pdev = probe_ent->dev;
92 unsigned short vendor;
94 volatile u8 *mmio = (volatile u8 *)probe_ent->mmio_base;
97 volatile u8 *port_mmio;
99 debug("ahci_host_init: start\n");
101 cap_save = readl(mmio + HOST_CAP);
102 cap_save &= ((1 << 28) | (1 << 17));
103 cap_save |= (1 << 27);
105 /* global controller reset */
106 tmp = readl(mmio + HOST_CTL);
107 if ((tmp & HOST_RESET) == 0)
108 writel_with_flush(tmp | HOST_RESET, mmio + HOST_CTL);
110 /* reset must complete within 1 second, or
111 * the hardware should be considered fried.
115 tmp = readl(mmio + HOST_CTL);
116 if (tmp & HOST_RESET) {
117 debug("controller reset failed (0x%x)\n", tmp);
121 writel_with_flush(HOST_AHCI_EN, mmio + HOST_CTL);
122 writel(cap_save, mmio + HOST_CAP);
123 writel_with_flush(0xf, mmio + HOST_PORTS_IMPL);
125 #ifndef CONFIG_SCSI_AHCI_PLAT
126 pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor);
128 if (vendor == PCI_VENDOR_ID_INTEL) {
130 pci_read_config_word(pdev, 0x92, &tmp16);
132 pci_write_config_word(pdev, 0x92, tmp16);
135 probe_ent->cap = readl(mmio + HOST_CAP);
136 probe_ent->port_map = readl(mmio + HOST_PORTS_IMPL);
137 probe_ent->n_ports = (probe_ent->cap & 0x1f) + 1;
139 debug("cap 0x%x port_map 0x%x n_ports %d\n",
140 probe_ent->cap, probe_ent->port_map, probe_ent->n_ports);
142 if (probe_ent->n_ports > CONFIG_SYS_SCSI_MAX_SCSI_ID)
143 probe_ent->n_ports = CONFIG_SYS_SCSI_MAX_SCSI_ID;
145 for (i = 0; i < probe_ent->n_ports; i++) {
146 probe_ent->port[i].port_mmio = ahci_port_base((u32) mmio, i);
147 port_mmio = (u8 *) probe_ent->port[i].port_mmio;
148 ahci_setup_port(&probe_ent->port[i], (unsigned long)mmio, i);
150 /* make sure port is not active */
151 tmp = readl(port_mmio + PORT_CMD);
152 if (tmp & (PORT_CMD_LIST_ON | PORT_CMD_FIS_ON |
153 PORT_CMD_FIS_RX | PORT_CMD_START)) {
154 tmp &= ~(PORT_CMD_LIST_ON | PORT_CMD_FIS_ON |
155 PORT_CMD_FIS_RX | PORT_CMD_START);
156 writel_with_flush(tmp, port_mmio + PORT_CMD);
158 /* spec says 500 msecs for each bit, so
159 * this is slightly incorrect.
164 writel(PORT_CMD_SPIN_UP, port_mmio + PORT_CMD);
169 tmp = readl(port_mmio + PORT_SCR_STAT);
170 if ((tmp & 0xf) == 0x3)
175 tmp = readl(port_mmio + PORT_SCR_ERR);
176 debug("PORT_SCR_ERR 0x%x\n", tmp);
177 writel(tmp, port_mmio + PORT_SCR_ERR);
179 /* ack any pending irq events for this port */
180 tmp = readl(port_mmio + PORT_IRQ_STAT);
181 debug("PORT_IRQ_STAT 0x%x\n", tmp);
183 writel(tmp, port_mmio + PORT_IRQ_STAT);
185 writel(1 << i, mmio + HOST_IRQ_STAT);
187 /* set irq mask (enables interrupts) */
188 writel(DEF_PORT_IRQ, port_mmio + PORT_IRQ_MASK);
190 /*register linkup ports */
191 tmp = readl(port_mmio + PORT_SCR_STAT);
192 debug("Port %d status: 0x%x\n", i, tmp);
193 if ((tmp & 0xf) == 0x03)
194 probe_ent->link_port_map |= (0x01 << i);
197 tmp = readl(mmio + HOST_CTL);
198 debug("HOST_CTL 0x%x\n", tmp);
199 writel(tmp | HOST_IRQ_EN, mmio + HOST_CTL);
200 tmp = readl(mmio + HOST_CTL);
201 debug("HOST_CTL 0x%x\n", tmp);
202 #ifndef CONFIG_SCSI_AHCI_PLAT
203 pci_read_config_word(pdev, PCI_COMMAND, &tmp16);
204 tmp |= PCI_COMMAND_MASTER;
205 pci_write_config_word(pdev, PCI_COMMAND, tmp16);
211 static void ahci_print_info(struct ahci_probe_ent *probe_ent)
213 #ifndef CONFIG_SCSI_AHCI_PLAT
214 pci_dev_t pdev = probe_ent->dev;
217 volatile u8 *mmio = (volatile u8 *)probe_ent->mmio_base;
218 u32 vers, cap, impl, speed;
222 vers = readl(mmio + HOST_VERSION);
223 cap = probe_ent->cap;
224 impl = probe_ent->port_map;
226 speed = (cap >> 20) & 0xf;
234 #ifdef CONFIG_SCSI_AHCI_PLAT
237 pci_read_config_word(pdev, 0x0a, &cc);
240 else if (cc == 0x0106)
242 else if (cc == 0x0104)
247 printf("AHCI %02x%02x.%02x%02x "
248 "%u slots %u ports %s Gbps 0x%x impl %s mode\n",
253 ((cap >> 8) & 0x1f) + 1, (cap & 0x1f) + 1, speed_s, impl, scc_s);
258 cap & (1 << 31) ? "64bit " : "",
259 cap & (1 << 30) ? "ncq " : "",
260 cap & (1 << 28) ? "ilck " : "",
261 cap & (1 << 27) ? "stag " : "",
262 cap & (1 << 26) ? "pm " : "",
263 cap & (1 << 25) ? "led " : "",
264 cap & (1 << 24) ? "clo " : "",
265 cap & (1 << 19) ? "nz " : "",
266 cap & (1 << 18) ? "only " : "",
267 cap & (1 << 17) ? "pmp " : "",
268 cap & (1 << 15) ? "pio " : "",
269 cap & (1 << 14) ? "slum " : "",
270 cap & (1 << 13) ? "part " : "");
273 #ifndef CONFIG_SCSI_AHCI_PLAT
274 static int ahci_init_one(pci_dev_t pdev)
279 memset((void *)ataid, 0, sizeof(hd_driveid_t *) * AHCI_MAX_PORTS);
281 probe_ent = malloc(sizeof(struct ahci_probe_ent));
282 memset(probe_ent, 0, sizeof(struct ahci_probe_ent));
283 probe_ent->dev = pdev;
285 probe_ent->host_flags = ATA_FLAG_SATA
290 probe_ent->pio_mask = 0x1f;
291 probe_ent->udma_mask = 0x7f; /*Fixme,assume to support UDMA6 */
293 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_5, &probe_ent->mmio_base);
294 debug("ahci mmio_base=0x%08x\n", probe_ent->mmio_base);
297 * JMicron-specific fixup:
298 * make sure we're in AHCI mode
300 pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor);
301 if (vendor == 0x197b)
302 pci_write_config_byte(pdev, 0x41, 0xa1);
304 /* initialize adapter */
305 rc = ahci_host_init(probe_ent);
309 ahci_print_info(probe_ent);
318 #define MAX_DATA_BYTE_COUNT (4*1024*1024)
320 static int ahci_fill_sg(u8 port, unsigned char *buf, int buf_len)
322 struct ahci_ioports *pp = &(probe_ent->port[port]);
323 struct ahci_sg *ahci_sg = pp->cmd_tbl_sg;
327 sg_count = ((buf_len - 1) / MAX_DATA_BYTE_COUNT) + 1;
328 if (sg_count > AHCI_MAX_SG) {
329 printf("Error:Too much sg!\n");
333 for (i = 0; i < sg_count; i++) {
335 cpu_to_le32((u32) buf + i * MAX_DATA_BYTE_COUNT);
336 ahci_sg->addr_hi = 0;
337 ahci_sg->flags_size = cpu_to_le32(0x3fffff &
338 (buf_len < MAX_DATA_BYTE_COUNT
340 : (MAX_DATA_BYTE_COUNT - 1)));
342 buf_len -= MAX_DATA_BYTE_COUNT;
349 static void ahci_fill_cmd_slot(struct ahci_ioports *pp, u32 opts)
351 pp->cmd_slot->opts = cpu_to_le32(opts);
352 pp->cmd_slot->status = 0;
353 pp->cmd_slot->tbl_addr = cpu_to_le32(pp->cmd_tbl & 0xffffffff);
354 pp->cmd_slot->tbl_addr_hi = 0;
358 static void ahci_set_feature(u8 port)
360 struct ahci_ioports *pp = &(probe_ent->port[port]);
361 volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
362 u32 cmd_fis_len = 5; /* five dwords */
369 fis[2] = ATA_CMD_SETF;
370 fis[3] = SETFEATURES_XFER;
371 fis[12] = __ilog2(probe_ent->udma_mask + 1) + 0x40 - 0x01;
373 memcpy((unsigned char *)pp->cmd_tbl, fis, 20);
374 ahci_fill_cmd_slot(pp, cmd_fis_len);
375 writel(1, port_mmio + PORT_CMD_ISSUE);
376 readl(port_mmio + PORT_CMD_ISSUE);
378 if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, 150, 0x1)) {
379 printf("set feature error!\n");
384 static int ahci_port_start(u8 port)
386 struct ahci_ioports *pp = &(probe_ent->port[port]);
387 volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
391 debug("Enter start port: %d\n", port);
392 port_status = readl(port_mmio + PORT_SCR_STAT);
393 debug("Port %d status: %x\n", port, port_status);
394 if ((port_status & 0xf) != 0x03) {
395 printf("No Link on this port!\n");
399 mem = (u32) malloc(AHCI_PORT_PRIV_DMA_SZ + 2048);
402 printf("No mem for table!\n");
406 mem = (mem + 0x800) & (~0x7ff); /* Aligned to 2048-bytes */
407 memset((u8 *) mem, 0, AHCI_PORT_PRIV_DMA_SZ);
410 * First item in chunk of DMA memory: 32-slot command table,
411 * 32 bytes each in size
413 pp->cmd_slot = (struct ahci_cmd_hdr *)mem;
414 debug("cmd_slot = 0x%x\n", (unsigned)pp->cmd_slot);
415 mem += (AHCI_CMD_SLOT_SZ + 224);
418 * Second item: Received-FIS area
421 mem += AHCI_RX_FIS_SZ;
424 * Third item: data area for storing a single command
425 * and its scatter-gather table
428 debug("cmd_tbl_dma = 0x%x\n", pp->cmd_tbl);
430 mem += AHCI_CMD_TBL_HDR;
431 pp->cmd_tbl_sg = (struct ahci_sg *)mem;
433 writel_with_flush((u32) pp->cmd_slot, port_mmio + PORT_LST_ADDR);
435 writel_with_flush(pp->rx_fis, port_mmio + PORT_FIS_ADDR);
437 writel_with_flush(PORT_CMD_ICC_ACTIVE | PORT_CMD_FIS_RX |
438 PORT_CMD_POWER_ON | PORT_CMD_SPIN_UP |
439 PORT_CMD_START, port_mmio + PORT_CMD);
441 debug("Exit start port %d\n", port);
447 static int get_ahci_device_data(u8 port, u8 *fis, int fis_len, u8 *buf,
451 struct ahci_ioports *pp = &(probe_ent->port[port]);
452 volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
457 debug("Enter get_ahci_device_data: for port %d\n", port);
459 if (port > probe_ent->n_ports) {
460 printf("Invaild port number %d\n", port);
464 port_status = readl(port_mmio + PORT_SCR_STAT);
465 if ((port_status & 0xf) != 0x03) {
466 debug("No Link on port %d!\n", port);
470 memcpy((unsigned char *)pp->cmd_tbl, fis, fis_len);
472 sg_count = ahci_fill_sg(port, buf, buf_len);
473 opts = (fis_len >> 2) | (sg_count << 16);
474 ahci_fill_cmd_slot(pp, opts);
476 writel_with_flush(1, port_mmio + PORT_CMD_ISSUE);
478 if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, 150, 0x1)) {
479 printf("timeout exit!\n");
482 debug("get_ahci_device_data: %d byte transferred.\n",
483 pp->cmd_slot->status);
489 static char *ata_id_strcpy(u16 *target, u16 *src, int len)
492 for (i = 0; i < len / 2; i++)
493 target[i] = swab16(src[i]);
494 return (char *)target;
498 static void dump_ataid(hd_driveid_t *ataid)
500 debug("(49)ataid->capability = 0x%x\n", ataid->capability);
501 debug("(53)ataid->field_valid =0x%x\n", ataid->field_valid);
502 debug("(63)ataid->dma_mword = 0x%x\n", ataid->dma_mword);
503 debug("(64)ataid->eide_pio_modes = 0x%x\n", ataid->eide_pio_modes);
504 debug("(75)ataid->queue_depth = 0x%x\n", ataid->queue_depth);
505 debug("(80)ataid->major_rev_num = 0x%x\n", ataid->major_rev_num);
506 debug("(81)ataid->minor_rev_num = 0x%x\n", ataid->minor_rev_num);
507 debug("(82)ataid->command_set_1 = 0x%x\n", ataid->command_set_1);
508 debug("(83)ataid->command_set_2 = 0x%x\n", ataid->command_set_2);
509 debug("(84)ataid->cfsse = 0x%x\n", ataid->cfsse);
510 debug("(85)ataid->cfs_enable_1 = 0x%x\n", ataid->cfs_enable_1);
511 debug("(86)ataid->cfs_enable_2 = 0x%x\n", ataid->cfs_enable_2);
512 debug("(87)ataid->csf_default = 0x%x\n", ataid->csf_default);
513 debug("(88)ataid->dma_ultra = 0x%x\n", ataid->dma_ultra);
514 debug("(93)ataid->hw_config = 0x%x\n", ataid->hw_config);
519 * SCSI INQUIRY command operation.
521 static int ata_scsiop_inquiry(ccb *pccb)
526 0x5, /* claim SPC-3 version compatibility */
534 /* Clean ccb data buffer */
535 memset(pccb->pdata, 0, pccb->datalen);
537 memcpy(pccb->pdata, hdr, sizeof(hdr));
539 if (pccb->datalen <= 35)
543 /* Construct the FIS */
544 fis[0] = 0x27; /* Host to device FIS. */
545 fis[1] = 1 << 7; /* Command FIS. */
546 fis[2] = ATA_CMD_IDENT; /* Command byte. */
548 /* Read id from sata */
550 if (!(tmpid = malloc(sizeof(hd_driveid_t))))
553 if (get_ahci_device_data(port, (u8 *) & fis, 20,
554 tmpid, sizeof(hd_driveid_t))) {
555 debug("scsi_ahci: SCSI inquiry command failure.\n");
561 ataid[port] = (hd_driveid_t *) tmpid;
563 memcpy(&pccb->pdata[8], "ATA ", 8);
564 ata_id_strcpy((u16 *) &pccb->pdata[16], (u16 *)ataid[port]->model, 16);
565 ata_id_strcpy((u16 *) &pccb->pdata[32], (u16 *)ataid[port]->fw_rev, 4);
567 dump_ataid(ataid[port]);
573 * SCSI READ10 command operation.
575 static int ata_scsiop_read10(ccb * pccb)
580 u8 *user_buffer = pccb->pdata;
581 u32 user_buffer_size = pccb->datalen;
583 /* Retrieve the base LBA number from the ccb structure. */
584 memcpy(&lba, pccb->cmd + 2, sizeof(lba));
585 lba = be32_to_cpu(lba);
588 * And the number of blocks.
590 * For 10-byte and 16-byte SCSI R/W commands, transfer
591 * length 0 means transfer 0 block of data.
592 * However, for ATA R/W commands, sector count 0 means
593 * 256 or 65536 sectors, not 0 sectors as in SCSI.
595 * WARNING: one or two older ATA drives treat 0 as 0...
597 blocks = (((u16)pccb->cmd[7]) << 8) | ((u16) pccb->cmd[8]);
599 debug("scsi_ahci: read %d blocks starting from lba 0x%x\n",
600 (unsigned)lba, blocks);
604 fis[0] = 0x27; /* Host to device FIS. */
605 fis[1] = 1 << 7; /* Command FIS. */
606 fis[2] = ATA_CMD_RD_DMA; /* Command byte. */
609 u16 now_blocks; /* number of blocks per iteration */
610 u32 transfer_size; /* number of bytes per iteration */
612 now_blocks = min(MAX_SATA_BLOCKS_READ, blocks);
614 transfer_size = ATA_BLOCKSIZE * now_blocks;
615 if (transfer_size > user_buffer_size) {
616 printf("scsi_ahci: Error: buffer too small.\n");
620 /* LBA address, only support LBA28 in this driver */
621 fis[4] = (lba >> 0) & 0xff;
622 fis[5] = (lba >> 8) & 0xff;
623 fis[6] = (lba >> 16) & 0xff;
624 fis[7] = ((lba >> 24) & 0xf) | 0xe0;
626 /* Block (sector) count */
627 fis[12] = (now_blocks >> 0) & 0xff;
628 fis[13] = (now_blocks >> 8) & 0xff;
631 if (get_ahci_device_data(pccb->target, (u8 *) &fis, sizeof(fis),
632 user_buffer, user_buffer_size)) {
633 debug("scsi_ahci: SCSI READ10 command failure.\n");
636 user_buffer += transfer_size;
637 user_buffer_size -= transfer_size;
638 blocks -= now_blocks;
647 * SCSI READ CAPACITY10 command operation.
649 static int ata_scsiop_read_capacity10(ccb *pccb)
653 if (!ataid[pccb->target]) {
654 printf("scsi_ahci: SCSI READ CAPACITY10 command failure. "
656 "\tPlease run SCSI commmand INQUIRY firstly!\n");
660 cap = be32_to_cpu(ataid[pccb->target]->lba_capacity);
661 memcpy(pccb->pdata, &cap, sizeof(cap));
663 pccb->pdata[4] = pccb->pdata[5] = 0;
664 pccb->pdata[6] = 512 >> 8;
665 pccb->pdata[7] = 512 & 0xff;
672 * SCSI TEST UNIT READY command operation.
674 static int ata_scsiop_test_unit_ready(ccb *pccb)
676 return (ataid[pccb->target]) ? 0 : -EPERM;
680 int scsi_exec(ccb *pccb)
684 switch (pccb->cmd[0]) {
686 ret = ata_scsiop_read10(pccb);
689 ret = ata_scsiop_read_capacity10(pccb);
692 ret = ata_scsiop_test_unit_ready(pccb);
695 ret = ata_scsiop_inquiry(pccb);
698 printf("Unsupport SCSI command 0x%02x\n", pccb->cmd[0]);
703 debug("SCSI command 0x%02x ret errno %d\n", pccb->cmd[0], ret);
711 void scsi_low_level_init(int busdevfunc)
716 #ifndef CONFIG_SCSI_AHCI_PLAT
717 ahci_init_one(busdevfunc);
720 linkmap = probe_ent->link_port_map;
722 for (i = 0; i < CONFIG_SYS_SCSI_MAX_SCSI_ID; i++) {
723 if (((linkmap >> i) & 0x01)) {
724 if (ahci_port_start((u8) i)) {
725 printf("Can not start port %d\n", i);
728 ahci_set_feature((u8) i);
733 #ifdef CONFIG_SCSI_AHCI_PLAT
734 int ahci_init(u32 base)
739 memset(ataid, 0, sizeof(ataid));
741 probe_ent = malloc(sizeof(struct ahci_probe_ent));
742 memset(probe_ent, 0, sizeof(struct ahci_probe_ent));
744 probe_ent->host_flags = ATA_FLAG_SATA
749 probe_ent->pio_mask = 0x1f;
750 probe_ent->udma_mask = 0x7f; /*Fixme,assume to support UDMA6 */
752 probe_ent->mmio_base = base;
754 /* initialize adapter */
755 rc = ahci_host_init(probe_ent);
759 ahci_print_info(probe_ent);
761 linkmap = probe_ent->link_port_map;
763 for (i = 0; i < CONFIG_SYS_SCSI_MAX_SCSI_ID; i++) {
764 if (((linkmap >> i) & 0x01)) {
765 if (ahci_port_start((u8) i)) {
766 printf("Can not start port %d\n", i);
769 ahci_set_feature((u8) i);
777 void scsi_bus_reset(void)
783 void scsi_print_error(ccb * pccb)
785 /*The ahci error info can be read in the ahci driver*/