2 * (C) Copyright 2000-2011
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
16 # define EIEIO __asm__ volatile ("eieio")
17 # define SYNC __asm__ volatile ("sync")
19 # define EIEIO /* nothing */
20 # define SYNC /* nothing */
23 /* Current offset for IDE0 / IDE1 bus access */
24 ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
25 #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
26 CONFIG_SYS_ATA_IDE0_OFFSET,
28 #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
29 CONFIG_SYS_ATA_IDE1_OFFSET,
33 static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
35 struct blk_desc ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
37 #define IDE_TIME_OUT 2000 /* 2 sec timeout */
39 #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
41 #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
43 #ifndef CONFIG_SYS_ATA_PORT_ADDR
44 #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
47 #ifdef CONFIG_IDE_RESET
48 extern void ide_set_reset(int idereset);
50 static void ide_reset(void)
54 for (i = 0; i < CONFIG_SYS_IDE_MAXBUS; ++i)
56 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i)
57 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
59 ide_set_reset(1); /* assert reset */
61 /* the reset signal shall be asserted for et least 25 us */
66 /* de-assert RESET signal */
70 for (i = 0; i < 250; ++i)
74 #define ide_reset() /* dummy */
75 #endif /* CONFIG_IDE_RESET */
78 * Wait until Busy bit is off, or timeout (in ms)
81 static uchar ide_wait(int dev, ulong t)
83 ulong delay = 10 * t; /* poll every 100 us */
86 while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
95 * copy src to dest, skipping leading and trailing blanks and null
96 * terminate the string
97 * "len" is the size of available memory including the terminating '\0'
99 static void ident_cpy(unsigned char *dst, unsigned char *src,
102 unsigned char *end, *last;
107 /* reserve space for '\0' */
111 /* skip leading white space */
112 while ((*src) && (src < end) && (*src == ' '))
115 /* copy string, omitting trailing white space */
116 while ((*src) && (src < end)) {
126 /****************************************************************************
130 #if defined(CONFIG_IDE_SWAP_IO)
131 /* since ATAPI may use commands with not 4 bytes alligned length
132 * we have our own transfer functions, 2 bytes alligned */
133 __weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
136 volatile ushort *pbuf;
138 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
139 dbuf = (ushort *)sect_buf;
141 debug("in output data shorts base for read is %lx\n",
142 (unsigned long) pbuf);
150 __weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
153 volatile ushort *pbuf;
155 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
156 dbuf = (ushort *)sect_buf;
158 debug("in input data shorts base for read is %lx\n",
159 (unsigned long) pbuf);
167 #else /* ! CONFIG_IDE_SWAP_IO */
168 __weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
170 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
173 __weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
175 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
178 #endif /* CONFIG_IDE_SWAP_IO */
181 * Wait until (Status & mask) == res, or timeout (in ms)
183 * This is used since some ATAPI CD ROMs clears their Busy Bit first
184 * and then they set their DRQ Bit
186 static uchar atapi_wait_mask(int dev, ulong t, uchar mask, uchar res)
188 ulong delay = 10 * t; /* poll every 100 us */
191 /* prevents to read the status before valid */
192 c = ide_inb(dev, ATA_DEV_CTL);
194 while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
195 /* break if error occurs (doesn't make sense to wait more) */
196 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR)
206 * issue an atapi command
208 unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen,
209 unsigned char *buffer, int buflen)
211 unsigned char c, err, mask, res;
216 mask = ATA_STAT_BUSY | ATA_STAT_DRQ;
218 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
219 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
220 if ((c & mask) != res) {
221 printf("ATAPI_ISSUE: device %d not ready status %X\n", device,
227 ide_outb(device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
228 ide_outb(device, ATA_SECT_CNT, 0);
229 ide_outb(device, ATA_SECT_NUM, 0);
230 ide_outb(device, ATA_CYL_LOW, (unsigned char) (buflen & 0xFF));
231 ide_outb(device, ATA_CYL_HIGH,
232 (unsigned char) ((buflen >> 8) & 0xFF));
233 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
235 ide_outb(device, ATA_COMMAND, ATAPI_CMD_PACKET);
238 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
240 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
242 if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
243 printf("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",
249 /* write command block */
250 ide_output_data_shorts(device, (unsigned short *)ccb, ccblen / 2);
252 /* ATAPI Command written wait for completition */
253 udelay(5000); /* device must set bsy */
255 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
257 * if no data wait for DRQ = 0 BSY = 0
258 * if data wait for DRQ = 1 BSY = 0
263 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
264 if ((c & mask) != res) {
265 if (c & ATA_STAT_ERR) {
266 err = (ide_inb(device, ATA_ERROR_REG)) >> 4;
267 debug("atapi_issue 1 returned sense key %X status %02X\n",
270 printf("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n",
276 n = ide_inb(device, ATA_CYL_HIGH);
278 n += ide_inb(device, ATA_CYL_LOW);
280 printf("ERROR, transfer bytes %d requested only %d\n", n,
285 if ((n == 0) && (buflen < 0)) {
286 printf("ERROR, transfer bytes %d requested %d\n", n, buflen);
291 debug("WARNING, transfer bytes %d not equal with requested %d\n",
294 if (n != 0) { /* data transfer */
295 debug("ATAPI_ISSUE: %d Bytes to transfer\n", n);
296 /* we transfer shorts */
298 /* ok now decide if it is an in or output */
299 if ((ide_inb(device, ATA_SECT_CNT) & 0x02) == 0) {
300 debug("Write to device\n");
301 ide_output_data_shorts(device, (unsigned short *)buffer,
304 debug("Read from device @ %p shorts %d\n", buffer, n);
305 ide_input_data_shorts(device, (unsigned short *)buffer,
309 udelay(5000); /* seems that some CD ROMs need this... */
310 mask = ATA_STAT_BUSY | ATA_STAT_ERR;
312 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
313 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
314 err = (ide_inb(device, ATA_ERROR_REG) >> 4);
315 debug("atapi_issue 2 returned sense key %X status %X\n", err,
325 * sending the command to atapi_issue. If an status other than good
326 * returns, an request_sense will be issued
329 #define ATAPI_DRIVE_NOT_READY 100
330 #define ATAPI_UNIT_ATTN 10
332 unsigned char atapi_issue_autoreq(int device,
335 unsigned char *buffer, int buflen)
337 unsigned char sense_data[18], sense_ccb[12];
338 unsigned char res, key, asc, ascq;
339 int notready, unitattn;
341 unitattn = ATAPI_UNIT_ATTN;
342 notready = ATAPI_DRIVE_NOT_READY;
345 res = atapi_issue(device, ccb, ccblen, buffer, buflen);
350 return 0xFF; /* error */
352 debug("(auto_req)atapi_issue returned sense key %X\n", res);
354 memset(sense_ccb, 0, sizeof(sense_ccb));
355 memset(sense_data, 0, sizeof(sense_data));
356 sense_ccb[0] = ATAPI_CMD_REQ_SENSE;
357 sense_ccb[4] = 18; /* allocation Length */
359 res = atapi_issue(device, sense_ccb, 12, sense_data, 18);
360 key = (sense_data[2] & 0xF);
361 asc = (sense_data[12]);
362 ascq = (sense_data[13]);
364 debug("ATAPI_CMD_REQ_SENSE returned %x\n", res);
365 debug(" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
366 sense_data[0], key, asc, ascq);
369 return 0; /* ok device ready */
371 if ((key == 6) || (asc == 0x29) || (asc == 0x28)) { /* Unit Attention */
372 if (unitattn-- > 0) {
376 printf("Unit Attention, tried %d\n", ATAPI_UNIT_ATTN);
379 if ((asc == 0x4) && (ascq == 0x1)) {
380 /* not ready, but will be ready soon */
381 if (notready-- > 0) {
385 printf("Drive not ready, tried %d times\n",
386 ATAPI_DRIVE_NOT_READY);
390 debug("Media not present\n");
394 printf("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n", key, asc,
397 debug("ERROR Sense key %02X ASC %02X ASCQ %02X\n", key, asc, ascq);
403 * we transfer only one block per command, since the multiple DRQ per
404 * command is not yet implemented
406 #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
407 #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
408 #define ATAPI_READ_MAX_BLOCK (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
410 ulong atapi_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
413 int device = block_dev->devnum;
415 unsigned char ccb[12]; /* Command descriptor block */
418 debug("atapi_read dev %d start " LBAF " blocks " LBAF
419 " buffer at %lX\n", device, blknr, blkcnt, (ulong) buffer);
422 if (blkcnt > ATAPI_READ_MAX_BLOCK)
423 cnt = ATAPI_READ_MAX_BLOCK;
427 ccb[0] = ATAPI_CMD_READ_12;
428 ccb[1] = 0; /* reserved */
429 ccb[2] = (unsigned char) (blknr >> 24) & 0xFF; /* MSB Block */
430 ccb[3] = (unsigned char) (blknr >> 16) & 0xFF; /* */
431 ccb[4] = (unsigned char) (blknr >> 8) & 0xFF;
432 ccb[5] = (unsigned char) blknr & 0xFF; /* LSB Block */
433 ccb[6] = (unsigned char) (cnt >> 24) & 0xFF; /* MSB Block cnt */
434 ccb[7] = (unsigned char) (cnt >> 16) & 0xFF;
435 ccb[8] = (unsigned char) (cnt >> 8) & 0xFF;
436 ccb[9] = (unsigned char) cnt & 0xFF; /* LSB Block */
437 ccb[10] = 0; /* reserved */
438 ccb[11] = 0; /* reserved */
440 if (atapi_issue_autoreq(device, ccb, 12,
441 (unsigned char *)buffer,
442 cnt * ATAPI_READ_BLOCK_SIZE)
449 buffer += (cnt * ATAPI_READ_BLOCK_SIZE);
450 } while (blkcnt > 0);
454 static void atapi_inquiry(struct blk_desc *dev_desc)
456 unsigned char ccb[12]; /* Command descriptor block */
457 unsigned char iobuf[64]; /* temp buf */
461 device = dev_desc->devnum;
462 dev_desc->type = DEV_TYPE_UNKNOWN; /* not yet valid */
464 dev_desc->block_read = atapi_read;
467 memset(ccb, 0, sizeof(ccb));
468 memset(iobuf, 0, sizeof(iobuf));
470 ccb[0] = ATAPI_CMD_INQUIRY;
471 ccb[4] = 40; /* allocation Legnth */
472 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 40);
474 debug("ATAPI_CMD_INQUIRY returned %x\n", c);
478 /* copy device ident strings */
479 ident_cpy((unsigned char *)dev_desc->vendor, &iobuf[8], 8);
480 ident_cpy((unsigned char *)dev_desc->product, &iobuf[16], 16);
481 ident_cpy((unsigned char *)dev_desc->revision, &iobuf[32], 5);
486 dev_desc->log2blksz = LOG2_INVALID(typeof(dev_desc->log2blksz));
487 dev_desc->type = iobuf[0] & 0x1f;
489 if ((iobuf[1] & 0x80) == 0x80)
490 dev_desc->removable = 1;
492 dev_desc->removable = 0;
494 memset(ccb, 0, sizeof(ccb));
495 memset(iobuf, 0, sizeof(iobuf));
496 ccb[0] = ATAPI_CMD_START_STOP;
497 ccb[4] = 0x03; /* start */
499 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0);
501 debug("ATAPI_CMD_START_STOP returned %x\n", c);
505 memset(ccb, 0, sizeof(ccb));
506 memset(iobuf, 0, sizeof(iobuf));
507 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0);
509 debug("ATAPI_CMD_UNIT_TEST_READY returned %x\n", c);
513 memset(ccb, 0, sizeof(ccb));
514 memset(iobuf, 0, sizeof(iobuf));
515 ccb[0] = ATAPI_CMD_READ_CAP;
516 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 8);
517 debug("ATAPI_CMD_READ_CAP returned %x\n", c);
521 debug("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
522 iobuf[0], iobuf[1], iobuf[2], iobuf[3],
523 iobuf[4], iobuf[5], iobuf[6], iobuf[7]);
525 dev_desc->lba = ((unsigned long) iobuf[0] << 24) +
526 ((unsigned long) iobuf[1] << 16) +
527 ((unsigned long) iobuf[2] << 8) + ((unsigned long) iobuf[3]);
528 dev_desc->blksz = ((unsigned long) iobuf[4] << 24) +
529 ((unsigned long) iobuf[5] << 16) +
530 ((unsigned long) iobuf[6] << 8) + ((unsigned long) iobuf[7]);
531 dev_desc->log2blksz = LOG2(dev_desc->blksz);
533 /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
539 #endif /* CONFIG_ATAPI */
541 static void ide_ident(struct blk_desc *dev_desc)
551 device = dev_desc->devnum;
552 printf(" Device %d: ", device);
556 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
557 dev_desc->if_type = IF_TYPE_IDE;
562 /* Warning: This will be tricky to read */
563 while (retries <= 1) {
564 /* check signature */
565 if ((ide_inb(device, ATA_SECT_CNT) == 0x01) &&
566 (ide_inb(device, ATA_SECT_NUM) == 0x01) &&
567 (ide_inb(device, ATA_CYL_LOW) == 0x14) &&
568 (ide_inb(device, ATA_CYL_HIGH) == 0xEB)) {
569 /* ATAPI Signature found */
570 dev_desc->if_type = IF_TYPE_ATAPI;
572 * Start Ident Command
574 ide_outb(device, ATA_COMMAND, ATAPI_CMD_IDENT);
576 * Wait for completion - ATAPI devices need more time
579 c = ide_wait(device, ATAPI_TIME_OUT);
584 * Start Ident Command
586 ide_outb(device, ATA_COMMAND, ATA_CMD_IDENT);
589 * Wait for completion
591 c = ide_wait(device, IDE_TIME_OUT);
594 if (((c & ATA_STAT_DRQ) == 0) ||
595 ((c & (ATA_STAT_FAULT | ATA_STAT_ERR)) != 0)) {
599 * Need to soft reset the device
600 * in case it's an ATAPI...
602 debug("Retrying...\n");
603 ide_outb(device, ATA_DEV_HD,
604 ATA_LBA | ATA_DEVICE(device));
606 ide_outb(device, ATA_COMMAND, 0x08);
607 udelay(500000); /* 500 ms */
612 ide_outb(device, ATA_DEV_HD,
613 ATA_LBA | ATA_DEVICE(device));
622 } /* see above - ugly to read */
624 if (retries == 2) /* Not found */
628 ide_input_swap_data(device, (ulong *)&iop, ATA_SECTORWORDS);
630 ident_cpy((unsigned char *)dev_desc->revision, iop.fw_rev,
631 sizeof(dev_desc->revision));
632 ident_cpy((unsigned char *)dev_desc->vendor, iop.model,
633 sizeof(dev_desc->vendor));
634 ident_cpy((unsigned char *)dev_desc->product, iop.serial_no,
635 sizeof(dev_desc->product));
636 #ifdef __LITTLE_ENDIAN
638 * firmware revision, model, and serial number have Big Endian Byte
639 * order in Word. Convert all three to little endian.
641 * See CF+ and CompactFlash Specification Revision 2.0:
642 * 6.2.1.6: Identify Drive, Table 39 for more details
645 strswab(dev_desc->revision);
646 strswab(dev_desc->vendor);
647 strswab(dev_desc->product);
648 #endif /* __LITTLE_ENDIAN */
650 if ((iop.config & 0x0080) == 0x0080)
651 dev_desc->removable = 1;
653 dev_desc->removable = 0;
656 if (dev_desc->if_type == IF_TYPE_ATAPI) {
657 atapi_inquiry(dev_desc);
660 #endif /* CONFIG_ATAPI */
664 dev_desc->lba = (iop.lba_capacity << 16) | (iop.lba_capacity >> 16);
665 #else /* ! __BIG_ENDIAN */
667 * do not swap shorts on little endian
669 * See CF+ and CompactFlash Specification Revision 2.0:
670 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
672 dev_desc->lba = iop.lba_capacity;
673 #endif /* __BIG_ENDIAN */
676 if (iop.command_set_2 & 0x0400) { /* LBA 48 support */
678 dev_desc->lba = (unsigned long long) iop.lba48_capacity[0] |
679 ((unsigned long long) iop.lba48_capacity[1] << 16) |
680 ((unsigned long long) iop.lba48_capacity[2] << 32) |
681 ((unsigned long long) iop.lba48_capacity[3] << 48);
685 #endif /* CONFIG_LBA48 */
687 dev_desc->type = DEV_TYPE_HARDDISK;
688 dev_desc->blksz = ATA_BLOCKSIZE;
689 dev_desc->log2blksz = LOG2(dev_desc->blksz);
690 dev_desc->lun = 0; /* just to fill something in... */
692 #if 0 /* only used to test the powersaving mode,
693 * if enabled, the drive goes after 5 sec
695 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
696 c = ide_wait(device, IDE_TIME_OUT);
697 ide_outb(device, ATA_SECT_CNT, 1);
698 ide_outb(device, ATA_LBA_LOW, 0);
699 ide_outb(device, ATA_LBA_MID, 0);
700 ide_outb(device, ATA_LBA_HIGH, 0);
701 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
702 ide_outb(device, ATA_COMMAND, 0xe3);
704 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
708 __weak void ide_outb(int dev, int port, unsigned char val)
710 debug("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
712 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
714 #if defined(CONFIG_IDE_AHB)
717 ide_write_register(dev, port, val);
720 outb(val, (ATA_CURR_BASE(dev)));
723 outb(val, (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
727 __weak unsigned char ide_inb(int dev, int port)
731 #if defined(CONFIG_IDE_AHB)
732 val = ide_read_register(dev, port);
734 val = inb((ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
737 debug("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
739 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)), val);
748 #ifdef CONFIG_IDE_PREINIT
752 puts("ide_preinit failed\n");
755 #endif /* CONFIG_IDE_PREINIT */
759 /* ATAPI Drives seems to need a proper IDE Reset */
763 * Wait for IDE to get ready.
764 * According to spec, this can take up to 31 seconds!
766 for (bus = 0; bus < CONFIG_SYS_IDE_MAXBUS; ++bus) {
768 bus * (CONFIG_SYS_IDE_MAXDEVICE /
769 CONFIG_SYS_IDE_MAXBUS);
771 printf("Bus %d: ", bus);
777 udelay(100000); /* 100 ms */
778 ide_outb(dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
779 udelay(100000); /* 100 ms */
782 udelay(10000); /* 10 ms */
784 c = ide_inb(dev, ATA_STATUS);
786 if (i > (ATA_RESET_TIME * 100)) {
787 puts("** Timeout **\n");
790 if ((i >= 100) && ((i % 100) == 0))
793 } while (c & ATA_STAT_BUSY);
795 if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
796 puts("not available ");
797 debug("Status = 0x%02X ", c);
798 #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
799 } else if ((c & ATA_STAT_READY) == 0) {
800 puts("not available ");
801 debug("Status = 0x%02X ", c);
812 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
813 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
814 ide_dev_desc[i].if_type = IF_TYPE_IDE;
815 ide_dev_desc[i].devnum = i;
816 ide_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
817 ide_dev_desc[i].blksz = 0;
818 ide_dev_desc[i].log2blksz =
819 LOG2_INVALID(typeof(ide_dev_desc[i].log2blksz));
820 ide_dev_desc[i].lba = 0;
822 ide_dev_desc[i].block_read = ide_read;
823 ide_dev_desc[i].block_write = ide_write;
825 if (!ide_bus_ok[IDE_BUS(i)])
827 ide_ident(&ide_dev_desc[i]);
828 dev_print(&ide_dev_desc[i]);
831 if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
832 /* initialize partition type */
833 part_init(&ide_dev_desc[i]);
842 uclass_first_device(UCLASS_IDE, &dev);
846 /* We only need to swap data if we are running on a big endian cpu. */
847 #if defined(__LITTLE_ENDIAN)
848 __weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
850 ide_input_data(dev, sect_buf, words);
853 __weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
855 volatile ushort *pbuf =
856 (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
857 ushort *dbuf = (ushort *)sect_buf;
859 debug("in input swap data base for read is %lx\n",
860 (unsigned long) pbuf);
864 *dbuf++ = swab16p((u16 *)pbuf);
865 *dbuf++ = swab16p((u16 *)pbuf);
867 *dbuf++ = ld_le16(pbuf);
868 *dbuf++ = ld_le16(pbuf);
872 #endif /* __LITTLE_ENDIAN */
875 #if defined(CONFIG_IDE_SWAP_IO)
876 __weak void ide_output_data(int dev, const ulong *sect_buf, int words)
879 volatile ushort *pbuf;
881 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
882 dbuf = (ushort *)sect_buf;
890 #else /* ! CONFIG_IDE_SWAP_IO */
891 __weak void ide_output_data(int dev, const ulong *sect_buf, int words)
893 #if defined(CONFIG_IDE_AHB)
894 ide_write_data(dev, sect_buf, words);
896 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
899 #endif /* CONFIG_IDE_SWAP_IO */
901 #if defined(CONFIG_IDE_SWAP_IO)
902 __weak void ide_input_data(int dev, ulong *sect_buf, int words)
905 volatile ushort *pbuf;
907 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
908 dbuf = (ushort *)sect_buf;
910 debug("in input data base for read is %lx\n", (unsigned long) pbuf);
919 #else /* ! CONFIG_IDE_SWAP_IO */
920 __weak void ide_input_data(int dev, ulong *sect_buf, int words)
922 #if defined(CONFIG_IDE_AHB)
923 ide_read_data(dev, sect_buf, words);
925 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
929 #endif /* CONFIG_IDE_SWAP_IO */
932 ulong ide_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
935 ulong ide_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
940 struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
942 int device = block_dev->devnum;
945 unsigned char pwrsave = 0; /* power save */
948 unsigned char lba48 = 0;
950 if (blknr & 0x0000fffff0000000ULL) {
951 /* more than 28 bits used, use 48bit mode */
955 debug("ide_read dev %d start " LBAF ", blocks " LBAF " buffer at %lX\n",
956 device, blknr, blkcnt, (ulong) buffer);
960 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
961 c = ide_wait(device, IDE_TIME_OUT);
963 if (c & ATA_STAT_BUSY) {
964 printf("IDE read: device %d not ready\n", device);
968 /* first check if the drive is in Powersaving mode, if yes,
969 * increase the timeout value */
970 ide_outb(device, ATA_COMMAND, ATA_CMD_CHK_PWR);
973 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
975 if (c & ATA_STAT_BUSY) {
976 printf("IDE read: device %d not ready\n", device);
979 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
980 printf("No Powersaving mode %X\n", c);
982 c = ide_inb(device, ATA_SECT_CNT);
983 debug("Powersaving %02X\n", c);
989 while (blkcnt-- > 0) {
990 c = ide_wait(device, IDE_TIME_OUT);
992 if (c & ATA_STAT_BUSY) {
993 printf("IDE read: device %d not ready\n", device);
998 /* write high bits */
999 ide_outb(device, ATA_SECT_CNT, 0);
1000 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1001 #ifdef CONFIG_SYS_64BIT_LBA
1002 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1003 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1005 ide_outb(device, ATA_LBA_MID, 0);
1006 ide_outb(device, ATA_LBA_HIGH, 0);
1010 ide_outb(device, ATA_SECT_CNT, 1);
1011 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1012 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1013 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1017 ide_outb(device, ATA_DEV_HD,
1018 ATA_LBA | ATA_DEVICE(device));
1019 ide_outb(device, ATA_COMMAND, ATA_CMD_READ_EXT);
1024 ide_outb(device, ATA_DEV_HD, ATA_LBA |
1025 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
1026 ide_outb(device, ATA_COMMAND, ATA_CMD_READ);
1032 /* may take up to 4 sec */
1033 c = ide_wait(device, IDE_SPIN_UP_TIME_OUT);
1036 /* can't take over 500 ms */
1037 c = ide_wait(device, IDE_TIME_OUT);
1040 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
1042 printf("Error (no IRQ) dev %d blk " LBAF
1043 ": status %#02x\n", device, blknr, c);
1047 ide_input_data(device, buffer, ATA_SECTORWORDS);
1048 (void) ide_inb(device, ATA_STATUS); /* clear IRQ */
1052 buffer += ATA_BLOCKSIZE;
1059 ulong ide_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
1062 ulong ide_write(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
1067 struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
1069 int device = block_dev->devnum;
1074 unsigned char lba48 = 0;
1076 if (blknr & 0x0000fffff0000000ULL) {
1077 /* more than 28 bits used, use 48bit mode */
1084 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1086 while (blkcnt-- > 0) {
1087 c = ide_wait(device, IDE_TIME_OUT);
1089 if (c & ATA_STAT_BUSY) {
1090 printf("IDE read: device %d not ready\n", device);
1095 /* write high bits */
1096 ide_outb(device, ATA_SECT_CNT, 0);
1097 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1098 #ifdef CONFIG_SYS_64BIT_LBA
1099 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1100 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1102 ide_outb(device, ATA_LBA_MID, 0);
1103 ide_outb(device, ATA_LBA_HIGH, 0);
1107 ide_outb(device, ATA_SECT_CNT, 1);
1108 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1109 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1110 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1114 ide_outb(device, ATA_DEV_HD,
1115 ATA_LBA | ATA_DEVICE(device));
1116 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
1121 ide_outb(device, ATA_DEV_HD, ATA_LBA |
1122 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
1123 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE);
1128 /* can't take over 500 ms */
1129 c = ide_wait(device, IDE_TIME_OUT);
1131 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
1133 printf("Error (no IRQ) dev %d blk " LBAF
1134 ": status %#02x\n", device, blknr, c);
1138 ide_output_data(device, buffer, ATA_SECTORWORDS);
1139 c = ide_inb(device, ATA_STATUS); /* clear IRQ */
1142 buffer += ATA_BLOCKSIZE;
1148 #if defined(CONFIG_OF_IDE_FIXUP)
1149 int ide_device_present(int dev)
1151 if (dev >= CONFIG_SYS_IDE_MAXBUS)
1153 return ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1;
1158 static int ide_blk_probe(struct udevice *udev)
1160 struct blk_desc *desc = dev_get_uclass_platdata(udev);
1162 /* fill in device vendor/product/rev strings */
1163 strncpy(desc->vendor, ide_dev_desc[desc->devnum].vendor,
1165 desc->vendor[BLK_VEN_SIZE] = '\0';
1166 strncpy(desc->product, ide_dev_desc[desc->devnum].product,
1168 desc->product[BLK_PRD_SIZE] = '\0';
1169 strncpy(desc->revision, ide_dev_desc[desc->devnum].revision,
1171 desc->revision[BLK_REV_SIZE] = '\0';
1178 static const struct blk_ops ide_blk_ops = {
1183 U_BOOT_DRIVER(ide_blk) = {
1186 .ops = &ide_blk_ops,
1187 .probe = ide_blk_probe,
1190 static int ide_probe(struct udevice *udev)
1192 struct udevice *blk_dev;
1199 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; i++) {
1200 if (ide_dev_desc[i].type != DEV_TYPE_UNKNOWN) {
1201 sprintf(name, "blk#%d", i);
1203 blksz = ide_dev_desc[i].blksz;
1204 size = blksz * ide_dev_desc[i].lba;
1207 * With CDROM, if there is no CD inserted, blksz will
1208 * be zero, don't bother to create IDE block device.
1212 ret = blk_create_devicef(udev, "ide_blk", name,
1214 blksz, size, &blk_dev);
1223 U_BOOT_DRIVER(ide) = {
1229 struct pci_device_id ide_supported[] = {
1230 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_IDE << 8, 0xffff00) },
1234 U_BOOT_PCI_DEVICE(ide, ide_supported);
1236 UCLASS_DRIVER(ide) = {
1241 U_BOOT_LEGACY_BLK(ide) = {
1242 .if_typename = "ide",
1243 .if_type = IF_TYPE_IDE,
1244 .max_devs = CONFIG_SYS_IDE_MAXDEVICE,
1245 .desc = ide_dev_desc,