git.sur5r.net Git - u-boot/blob - drivers/cfi_flash.c

   1 /*
   2  * (C) Copyright 2002-2004
   3  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
   4  *
   5  * Copyright (C) 2003 Arabella Software Ltd.
   6  * Yuli Barcohen <yuli@arabellasw.com>
   7  * Modified to work with AMD flashes
   8  *
   9  * Copyright (C) 2004
  10  * Ed Okerson
  11  * Modified to work with little-endian systems.
  12  *
  13  * See file CREDITS for list of people who contributed to this
  14  * project.
  15  *
  16  * This program is free software; you can redistribute it and/or
  17  * modify it under the terms of the GNU General Public License as
  18  * published by the Free Software Foundation; either version 2 of
  19  * the License, or (at your option) any later version.
  20  *
  21  * This program is distributed in the hope that it will be useful,
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  * GNU General Public License for more details.
  25  *
  26  * You should have received a copy of the GNU General Public License
  27  * along with this program; if not, write to the Free Software
  28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29  * MA 02111-1307 USA
  30  *
  31  * History
  32  * 01/20/2004 - combined variants of original driver.
  33  * 01/22/2004 - Write performance enhancements for parallel chips (Tolunay)
  34  * 01/23/2004 - Support for x8/x16 chips (Rune Raknerud)
  35  * 01/27/2004 - Little endian support Ed Okerson
  36  *
  37  * Tested Architectures
  38  * Port Width  Chip Width    # of banks    Flash Chip  Board
  39  * 32          16            1             28F128J3    seranoa/eagle
  40  * 64          16            1             28F128J3    seranoa/falcon
  41  *
  42  */
  43
  44 /* The DEBUG define must be before common to enable debugging */
  45 /* #define DEBUG        */
  46
  47 #include <common.h>
  48 #include <asm/processor.h>
  49 #include <asm/byteorder.h>
  50 #include <environment.h>
  51 #ifdef  CFG_FLASH_CFI_DRIVER
  52
  53 /*
  54  * This file implements a Common Flash Interface (CFI) driver for U-Boot.
  55  * The width of the port and the width of the chips are determined at initialization.
  56  * These widths are used to calculate the address for access CFI data structures.
  57  * It has been tested on an Intel Strataflash implementation and AMD 29F016D.
  58  *
  59  * References
  60  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  61  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  62  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  63  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  64  *
  65  * TODO
  66  *
  67  * Use Primary Extended Query table (PRI) and Alternate Algorithm Query
  68  * Table (ALT) to determine if protection is available
  69  *
  70  * Add support for other command sets Use the PRI and ALT to determine command set
  71  * Verify erase and program timeouts.
  72  */
  73
  74 #ifndef CFG_FLASH_BANKS_LIST
  75 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
  76 #endif
  77
  78 #define FLASH_CMD_CFI                   0x98
  79 #define FLASH_CMD_READ_ID               0x90
  80 #define FLASH_CMD_RESET                 0xff
  81 #define FLASH_CMD_BLOCK_ERASE           0x20
  82 #define FLASH_CMD_ERASE_CONFIRM         0xD0
  83 #define FLASH_CMD_WRITE                 0x40
  84 #define FLASH_CMD_PROTECT               0x60
  85 #define FLASH_CMD_PROTECT_SET           0x01
  86 #define FLASH_CMD_PROTECT_CLEAR         0xD0
  87 #define FLASH_CMD_CLEAR_STATUS          0x50
  88 #define FLASH_CMD_WRITE_TO_BUFFER       0xE8
  89 #define FLASH_CMD_WRITE_BUFFER_CONFIRM  0xD0
  90
  91 #define FLASH_STATUS_DONE               0x80
  92 #define FLASH_STATUS_ESS                0x40
  93 #define FLASH_STATUS_ECLBS              0x20
  94 #define FLASH_STATUS_PSLBS              0x10
  95 #define FLASH_STATUS_VPENS              0x08
  96 #define FLASH_STATUS_PSS                0x04
  97 #define FLASH_STATUS_DPS                0x02
  98 #define FLASH_STATUS_R                  0x01
  99 #define FLASH_STATUS_PROTECT            0x01
 100
 101 #define AMD_CMD_RESET                   0xF0
 102 #define AMD_CMD_WRITE                   0xA0
 103 #define AMD_CMD_ERASE_START             0x80
 104 #define AMD_CMD_ERASE_SECTOR            0x30
 105 #define AMD_CMD_UNLOCK_START            0xAA
 106 #define AMD_CMD_UNLOCK_ACK              0x55
 107
 108 #define AMD_STATUS_TOGGLE               0x40
 109 #define AMD_STATUS_ERROR                0x20
 110 #define AMD_ADDR_ERASE_START            0x555
 111 #define AMD_ADDR_START                  0x555
 112 #define AMD_ADDR_ACK                    0x2AA
 113
 114 #define FLASH_OFFSET_CFI                0x55
 115 #define FLASH_OFFSET_CFI_RESP           0x10
 116 #define FLASH_OFFSET_PRIMARY_VENDOR     0x13
 117 #define FLASH_OFFSET_WTOUT              0x1F
 118 #define FLASH_OFFSET_WBTOUT             0x20
 119 #define FLASH_OFFSET_ETOUT              0x21
 120 #define FLASH_OFFSET_CETOUT             0x22
 121 #define FLASH_OFFSET_WMAX_TOUT          0x23
 122 #define FLASH_OFFSET_WBMAX_TOUT         0x24
 123 #define FLASH_OFFSET_EMAX_TOUT          0x25
 124 #define FLASH_OFFSET_CEMAX_TOUT         0x26
 125 #define FLASH_OFFSET_SIZE               0x27
 126 #define FLASH_OFFSET_INTERFACE          0x28
 127 #define FLASH_OFFSET_BUFFER_SIZE        0x2A
 128 #define FLASH_OFFSET_NUM_ERASE_REGIONS  0x2C
 129 #define FLASH_OFFSET_ERASE_REGIONS      0x2D
 130 #define FLASH_OFFSET_PROTECT            0x02
 131 #define FLASH_OFFSET_USER_PROTECTION    0x85
 132 #define FLASH_OFFSET_INTEL_PROTECTION   0x81
 133
 134
 135 #define FLASH_MAN_CFI                   0x01000000
 136
 137 #define CFI_CMDSET_NONE             0
 138 #define CFI_CMDSET_INTEL_EXTENDED   1
 139 #define CFI_CMDSET_AMD_STANDARD     2
 140 #define CFI_CMDSET_INTEL_STANDARD   3
 141 #define CFI_CMDSET_AMD_EXTENDED     4
 142 #define CFI_CMDSET_MITSU_STANDARD   256
 143 #define CFI_CMDSET_MITSU_EXTENDED   257
 144 #define CFI_CMDSET_SST              258
 145
 146
 147 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
 148 # undef  FLASH_CMD_RESET
 149 # define FLASH_CMD_RESET                AMD_CMD_RESET /* use AMD-Reset instead */
 150 #endif
 151
 152
 153 typedef union {
 154         unsigned char c;
 155         unsigned short w;
 156         unsigned long l;
 157         unsigned long long ll;
 158 } cfiword_t;
 159
 160 typedef union {
 161         volatile unsigned char *cp;
 162         volatile unsigned short *wp;
 163         volatile unsigned long *lp;
 164         volatile unsigned long long *llp;
 165 } cfiptr_t;
 166
 167 #define NUM_ERASE_REGIONS 4
 168
 169 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
 170 #ifdef CFG_MAX_FLASH_BANKS_DETECT
 171 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
 172 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT];    /* FLASH chips info */
 173 #else
 174 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
 175 flash_info_t flash_info[CFG_MAX_FLASH_BANKS];           /* FLASH chips info */
 176 #endif
 177
 178
 179 /*-----------------------------------------------------------------------
 180  * Functions
 181  */
 182
 183 typedef unsigned long flash_sect_t;
 184
 185 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
 186 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
 187 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 188 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
 189 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 190 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 191 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 192 static int flash_detect_cfi (flash_info_t * info);
 193 ulong flash_get_size (ulong base, int banknum);
 194 static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
 195 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 196                                     ulong tout, char *prompt);
 197 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 198 static flash_info_t *flash_get_info(ulong base);
 199 #endif
 200 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 201 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);
 202 #endif
 203
 204 /*-----------------------------------------------------------------------
 205  * create an address based on the offset and the port width
 206  */
 207 inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
 208 {
 209         return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
 210 }
 211
 212 #ifdef DEBUG
 213 /*-----------------------------------------------------------------------
 214  * Debug support
 215  */
 216 void print_longlong (char *str, unsigned long long data)
 217 {
 218         int i;
 219         char *cp;
 220
 221         cp = (unsigned char *) &data;
 222         for (i = 0; i < 8; i++)
 223                 sprintf (&str[i * 2], "%2.2x", *cp++);
 224 }
 225 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
 226 {
 227         cfiptr_t cptr;
 228         int x, y;
 229
 230         for (x = 0; x < 0x40; x += 16U / info->portwidth) {
 231                 cptr.cp =
 232                         flash_make_addr (info, sect,
 233                                          x + FLASH_OFFSET_CFI_RESP);
 234                 debug ("%p : ", cptr.cp);
 235                 for (y = 0; y < 16; y++) {
 236                         debug ("%2.2x ", cptr.cp[y]);
 237                 }
 238                 debug (" ");
 239                 for (y = 0; y < 16; y++) {
 240                         if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
 241                                 debug ("%c", cptr.cp[y]);
 242                         } else {
 243                                 debug (".");
 244                         }
 245                 }
 246                 debug ("\n");
 247         }
 248 }
 249 #endif
 250
 251
 252 /*-----------------------------------------------------------------------
 253  * read a character at a port width address
 254  */
 255 inline uchar flash_read_uchar (flash_info_t * info, uint offset)
 256 {
 257         uchar *cp;
 258
 259         cp = flash_make_addr (info, 0, offset);
 260 #if defined(__LITTLE_ENDIAN)
 261         return (cp[0]);
 262 #else
 263         return (cp[info->portwidth - 1]);
 264 #endif
 265 }
 266
 267 /*-----------------------------------------------------------------------
 268  * read a short word by swapping for ppc format.
 269  */
 270 ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
 271 {
 272         uchar *addr;
 273         ushort retval;
 274
 275 #ifdef DEBUG
 276         int x;
 277 #endif
 278         addr = flash_make_addr (info, sect, offset);
 279
 280 #ifdef DEBUG
 281         debug ("ushort addr is at %p info->portwidth = %d\n", addr,
 282                info->portwidth);
 283         for (x = 0; x < 2 * info->portwidth; x++) {
 284                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 285         }
 286 #endif
 287 #if defined(__LITTLE_ENDIAN)
 288         retval = ((addr[(info->portwidth)] << 8) | addr[0]);
 289 #else
 290         retval = ((addr[(2 * info->portwidth) - 1] << 8) |
 291                   addr[info->portwidth - 1]);
 292 #endif
 293
 294         debug ("retval = 0x%x\n", retval);
 295         return retval;
 296 }
 297
 298 /*-----------------------------------------------------------------------
 299  * read a long word by picking the least significant byte of each maiximum
 300  * port size word. Swap for ppc format.
 301  */
 302 ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
 303 {
 304         uchar *addr;
 305         ulong retval;
 306
 307 #ifdef DEBUG
 308         int x;
 309 #endif
 310         addr = flash_make_addr (info, sect, offset);
 311
 312 #ifdef DEBUG
 313         debug ("long addr is at %p info->portwidth = %d\n", addr,
 314                info->portwidth);
 315         for (x = 0; x < 4 * info->portwidth; x++) {
 316                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 317         }
 318 #endif
 319 #if defined(__LITTLE_ENDIAN)
 320         retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
 321                 (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
 322 #else
 323         retval = (addr[(2 * info->portwidth) - 1] << 24) |
 324                 (addr[(info->portwidth) - 1] << 16) |
 325                 (addr[(4 * info->portwidth) - 1] << 8) |
 326                 addr[(3 * info->portwidth) - 1];
 327 #endif
 328         return retval;
 329 }
 330
 331 /*-----------------------------------------------------------------------
 332  */
 333 unsigned long flash_init (void)
 334 {
 335         unsigned long size = 0;
 336         int i;
 337
 338         /* Init: no FLASHes known */
 339         for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
 340                 flash_info[i].flash_id = FLASH_UNKNOWN;
 341                 size += flash_info[i].size = flash_get_size (bank_base[i], i);
 342                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
 343 #ifndef CFG_FLASH_QUIET_TEST
 344                         printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
 345                                 i, flash_info[i].size, flash_info[i].size << 20);
 346 #endif /* CFG_FLASH_QUIET_TEST */
 347                 }
 348         }
 349
 350         /* Monitor protection ON by default */
 351 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 352         flash_protect (FLAG_PROTECT_SET,
 353                        CFG_MONITOR_BASE,
 354                        CFG_MONITOR_BASE + monitor_flash_len  - 1,
 355                        flash_get_info(CFG_MONITOR_BASE));
 356 #endif
 357
 358         /* Environment protection ON by default */
 359 #ifdef CFG_ENV_IS_IN_FLASH
 360         flash_protect (FLAG_PROTECT_SET,
 361                        CFG_ENV_ADDR,
 362                        CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
 363                        flash_get_info(CFG_ENV_ADDR));
 364 #endif
 365
 366         /* Redundant environment protection ON by default */
 367 #ifdef CFG_ENV_ADDR_REDUND
 368         flash_protect (FLAG_PROTECT_SET,
 369                        CFG_ENV_ADDR_REDUND,
 370                        CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
 371                        flash_get_info(CFG_ENV_ADDR_REDUND));
 372 #endif
 373         return (size);
 374 }
 375
 376 /*-----------------------------------------------------------------------
 377  */
 378 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 379 static flash_info_t *flash_get_info(ulong base)
 380 {
 381         int i;
 382         flash_info_t * info = 0;
 383
 384         for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
 385                 info = & flash_info[i];
 386                 if (info->size && info->start[0] <= base &&
 387                     base <= info->start[0] + info->size - 1)
 388                         break;
 389         }
 390
 391         return i == CFG_MAX_FLASH_BANKS ? 0 : info;
 392 }
 393 #endif
 394
 395 /*-----------------------------------------------------------------------
 396  */
 397 int flash_erase (flash_info_t * info, int s_first, int s_last)
 398 {
 399         int rcode = 0;
 400         int prot;
 401         flash_sect_t sect;
 402
 403         if (info->flash_id != FLASH_MAN_CFI) {
 404                 puts ("Can't erase unknown flash type - aborted\n");
 405                 return 1;
 406         }
 407         if ((s_first < 0) || (s_first > s_last)) {
 408                 puts ("- no sectors to erase\n");
 409                 return 1;
 410         }
 411
 412         prot = 0;
 413         for (sect = s_first; sect <= s_last; ++sect) {
 414                 if (info->protect[sect]) {
 415                         prot++;
 416                 }
 417         }
 418         if (prot) {
 419                 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
 420         } else {
 421                 putc ('\n');
 422         }
 423
 424
 425         for (sect = s_first; sect <= s_last; sect++) {
 426                 if (info->protect[sect] == 0) { /* not protected */
 427                         switch (info->vendor) {
 428                         case CFI_CMDSET_INTEL_STANDARD:
 429                         case CFI_CMDSET_INTEL_EXTENDED:
 430                                 flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
 431                                 flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
 432                                 flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
 433                                 break;
 434                         case CFI_CMDSET_AMD_STANDARD:
 435                         case CFI_CMDSET_AMD_EXTENDED:
 436                                 flash_unlock_seq (info, sect);
 437                                 flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
 438                                                         AMD_CMD_ERASE_START);
 439                                 flash_unlock_seq (info, sect);
 440                                 flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
 441                                 break;
 442                         default:
 443                                 debug ("Unkown flash vendor %d\n",
 444                                        info->vendor);
 445                                 break;
 446                         }
 447
 448                         if (flash_full_status_check
 449                             (info, sect, info->erase_blk_tout, "erase")) {
 450                                 rcode = 1;
 451                         } else
 452                                 putc ('.');
 453                 }
 454         }
 455         puts (" done\n");
 456         return rcode;
 457 }
 458
 459 /*-----------------------------------------------------------------------
 460  */
 461 void flash_print_info (flash_info_t * info)
 462 {
 463         int i;
 464
 465         if (info->flash_id != FLASH_MAN_CFI) {
 466                 puts ("missing or unknown FLASH type\n");
 467                 return;
 468         }
 469
 470         printf ("CFI conformant FLASH (%d x %d)",
 471                 (info->portwidth << 3), (info->chipwidth << 3));
 472         printf ("  Size: %ld MB in %d Sectors\n",
 473                 info->size >> 20, info->sector_count);
 474         printf (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
 475                 info->erase_blk_tout,
 476                 info->write_tout,
 477                 info->buffer_write_tout,
 478                 info->buffer_size);
 479
 480         puts ("  Sector Start Addresses:");
 481         for (i = 0; i < info->sector_count; ++i) {
 482 #ifdef CFG_FLASH_EMPTY_INFO
 483                 int k;
 484                 int size;
 485                 int erased;
 486                 volatile unsigned long *flash;
 487
 488                 /*
 489                  * Check if whole sector is erased
 490                  */
 491                 if (i != (info->sector_count - 1))
 492                         size = info->start[i + 1] - info->start[i];
 493                 else
 494                         size = info->start[0] + info->size - info->start[i];
 495                 erased = 1;
 496                 flash = (volatile unsigned long *) info->start[i];
 497                 size = size >> 2;       /* divide by 4 for longword access */
 498                 for (k = 0; k < size; k++) {
 499                         if (*flash++ != 0xffffffff) {
 500                                 erased = 0;
 501                                 break;
 502                         }
 503                 }
 504
 505                 if ((i % 5) == 0)
 506                         printf ("\n");
 507                 /* print empty and read-only info */
 508                 printf (" %08lX%s%s",
 509                         info->start[i],
 510                         erased ? " E" : "  ",
 511                         info->protect[i] ? "RO " : "   ");
 512 #else   /* ! CFG_FLASH_EMPTY_INFO */
 513                 if ((i % 5) == 0)
 514                         printf ("\n   ");
 515                 printf (" %08lX%s",
 516                         info->start[i], info->protect[i] ? " (RO)" : "     ");
 517 #endif
 518         }
 519         putc ('\n');
 520         return;
 521 }
 522
 523 /*-----------------------------------------------------------------------
 524  * Copy memory to flash, returns:
 525  * 0 - OK
 526  * 1 - write timeout
 527  * 2 - Flash not erased
 528  */
 529 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 530 {
 531         ulong wp;
 532         ulong cp;
 533         int aln;
 534         cfiword_t cword;
 535         int i, rc;
 536
 537 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 538         int buffered_size;
 539 #endif
 540         /* get lower aligned address */
 541         /* get lower aligned address */
 542         wp = (addr & ~(info->portwidth - 1));
 543
 544         /* handle unaligned start */
 545         if ((aln = addr - wp) != 0) {
 546                 cword.l = 0;
 547                 cp = wp;
 548                 for (i = 0; i < aln; ++i, ++cp)
 549                         flash_add_byte (info, &cword, (*(uchar *) cp));
 550
 551                 for (; (i < info->portwidth) && (cnt > 0); i++) {
 552                         flash_add_byte (info, &cword, *src++);
 553                         cnt--;
 554                         cp++;
 555                 }
 556                 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
 557                         flash_add_byte (info, &cword, (*(uchar *) cp));
 558                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 559                         return rc;
 560                 wp = cp;
 561         }
 562
 563         /* handle the aligned part */
 564 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 565         buffered_size = (info->portwidth / info->chipwidth);
 566         buffered_size *= info->buffer_size;
 567         while (cnt >= info->portwidth) {
 568                 i = buffered_size > cnt ? cnt : buffered_size;
 569                 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
 570                         return rc;
 571                 i -= i & (info->portwidth - 1);
 572                 wp += i;
 573                 src += i;
 574                 cnt -= i;
 575         }
 576 #else
 577         while (cnt >= info->portwidth) {
 578                 cword.l = 0;
 579                 for (i = 0; i < info->portwidth; i++) {
 580                         flash_add_byte (info, &cword, *src++);
 581                 }
 582                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 583                         return rc;
 584                 wp += info->portwidth;
 585                 cnt -= info->portwidth;
 586         }
 587 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
 588         if (cnt == 0) {
 589                 return (0);
 590         }
 591
 592         /*
 593          * handle unaligned tail bytes
 594          */
 595         cword.l = 0;
 596         for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
 597                 flash_add_byte (info, &cword, *src++);
 598                 --cnt;
 599         }
 600         for (; i < info->portwidth; ++i, ++cp) {
 601                 flash_add_byte (info, &cword, (*(uchar *) cp));
 602         }
 603
 604         return flash_write_cfiword (info, wp, cword);
 605 }
 606
 607 /*-----------------------------------------------------------------------
 608  */
 609 #ifdef CFG_FLASH_PROTECTION
 610
 611 int flash_real_protect (flash_info_t * info, long sector, int prot)
 612 {
 613         int retcode = 0;
 614
 615         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 616         flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
 617         if (prot)
 618                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
 619         else
 620                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
 621
 622         if ((retcode =
 623              flash_full_status_check (info, sector, info->erase_blk_tout,
 624                                       prot ? "protect" : "unprotect")) == 0) {
 625
 626                 info->protect[sector] = prot;
 627                 /* Intel's unprotect unprotects all locking */
 628                 if (prot == 0) {
 629                         flash_sect_t i;
 630
 631                         for (i = 0; i < info->sector_count; i++) {
 632                                 if (info->protect[i])
 633                                         flash_real_protect (info, i, 1);
 634                         }
 635                 }
 636         }
 637         return retcode;
 638 }
 639
 640 /*-----------------------------------------------------------------------
 641  * flash_read_user_serial - read the OneTimeProgramming cells
 642  */
 643 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
 644                              int len)
 645 {
 646         uchar *src;
 647         uchar *dst;
 648
 649         dst = buffer;
 650         src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
 651         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 652         memcpy (dst, src + offset, len);
 653         flash_write_cmd (info, 0, 0, info->cmd_reset);
 654 }
 655
 656 /*
 657  * flash_read_factory_serial - read the device Id from the protection area
 658  */
 659 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
 660                                 int len)
 661 {
 662         uchar *src;
 663
 664         src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
 665         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 666         memcpy (buffer, src + offset, len);
 667         flash_write_cmd (info, 0, 0, info->cmd_reset);
 668 }
 669
 670 #endif /* CFG_FLASH_PROTECTION */
 671
 672 /*
 673  * flash_is_busy - check to see if the flash is busy
 674  * This routine checks the status of the chip and returns true if the chip is busy
 675  */
 676 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
 677 {
 678         int retval;
 679
 680         switch (info->vendor) {
 681         case CFI_CMDSET_INTEL_STANDARD:
 682         case CFI_CMDSET_INTEL_EXTENDED:
 683                 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
 684                 break;
 685         case CFI_CMDSET_AMD_STANDARD:
 686         case CFI_CMDSET_AMD_EXTENDED:
 687                 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
 688                 break;
 689         default:
 690                 retval = 0;
 691         }
 692         debug ("flash_is_busy: %d\n", retval);
 693         return retval;
 694 }
 695
 696 /*-----------------------------------------------------------------------
 697  *  wait for XSR.7 to be set. Time out with an error if it does not.
 698  *  This routine does not set the flash to read-array mode.
 699  */
 700 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
 701                                ulong tout, char *prompt)
 702 {
 703         ulong start;
 704
 705         /* Wait for command completion */
 706         start = get_timer (0);
 707         while (flash_is_busy (info, sector)) {
 708                 if (get_timer (start) > info->erase_blk_tout * CFG_HZ) {
 709                         printf ("Flash %s timeout at address %lx data %lx\n",
 710                                 prompt, info->start[sector],
 711                                 flash_read_long (info, sector, 0));
 712                         flash_write_cmd (info, sector, 0, info->cmd_reset);
 713                         return ERR_TIMOUT;
 714                 }
 715         }
 716         return ERR_OK;
 717 }
 718
 719 /*-----------------------------------------------------------------------
 720  * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
 721  * This routine sets the flash to read-array mode.
 722  */
 723 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 724                                     ulong tout, char *prompt)
 725 {
 726         int retcode;
 727
 728         retcode = flash_status_check (info, sector, tout, prompt);
 729         switch (info->vendor) {
 730         case CFI_CMDSET_INTEL_EXTENDED:
 731         case CFI_CMDSET_INTEL_STANDARD:
 732                 if ((retcode != ERR_OK)
 733                     && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
 734                         retcode = ERR_INVAL;
 735                         printf ("Flash %s error at address %lx\n", prompt,
 736                                 info->start[sector]);
 737                         if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
 738                                 puts ("Command Sequence Error.\n");
 739                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
 740                                 puts ("Block Erase Error.\n");
 741                                 retcode = ERR_NOT_ERASED;
 742                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
 743                                 puts ("Locking Error\n");
 744                         }
 745                         if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
 746                                 puts ("Block locked.\n");
 747                                 retcode = ERR_PROTECTED;
 748                         }
 749                         if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
 750                                 puts ("Vpp Low Error.\n");
 751                 }
 752                 flash_write_cmd (info, sector, 0, info->cmd_reset);
 753                 break;
 754         default:
 755                 break;
 756         }
 757         return retcode;
 758 }
 759
 760 /*-----------------------------------------------------------------------
 761  */
 762 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
 763 {
 764 #if defined(__LITTLE_ENDIAN)
 765         unsigned short  w;
 766         unsigned int    l;
 767         unsigned long long ll;
 768 #endif
 769
 770         switch (info->portwidth) {
 771         case FLASH_CFI_8BIT:
 772                 cword->c = c;
 773                 break;
 774         case FLASH_CFI_16BIT:
 775 #if defined(__LITTLE_ENDIAN)
 776                 w = c;
 777                 w <<= 8;
 778                 cword->w = (cword->w >> 8) | w;
 779 #else
 780                 cword->w = (cword->w << 8) | c;
 781 #endif
 782                 break;
 783         case FLASH_CFI_32BIT:
 784 #if defined(__LITTLE_ENDIAN)
 785                 l = c;
 786                 l <<= 24;
 787                 cword->l = (cword->l >> 8) | l;
 788 #else
 789                 cword->l = (cword->l << 8) | c;
 790 #endif
 791                 break;
 792         case FLASH_CFI_64BIT:
 793 #if defined(__LITTLE_ENDIAN)
 794                 ll = c;
 795                 ll <<= 56;
 796                 cword->ll = (cword->ll >> 8) | ll;
 797 #else
 798                 cword->ll = (cword->ll << 8) | c;
 799 #endif
 800                 break;
 801         }
 802 }
 803
 804
 805 /*-----------------------------------------------------------------------
 806  * make a proper sized command based on the port and chip widths
 807  */
 808 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
 809 {
 810         int i;
 811         uchar *cp = (uchar *) cmdbuf;
 812
 813 #if defined(__LITTLE_ENDIAN)
 814         for (i = info->portwidth; i > 0; i--)
 815 #else
 816         for (i = 1; i <= info->portwidth; i++)
 817 #endif
 818                 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
 819 }
 820
 821 /*
 822  * Write a proper sized command to the correct address
 823  */
 824 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 825 {
 826
 827         volatile cfiptr_t addr;
 828         cfiword_t cword;
 829
 830         addr.cp = flash_make_addr (info, sect, offset);
 831         flash_make_cmd (info, cmd, &cword);
 832         switch (info->portwidth) {
 833         case FLASH_CFI_8BIT:
 834                 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
 835                        cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 836                 *addr.cp = cword.c;
 837                 break;
 838         case FLASH_CFI_16BIT:
 839                 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
 840                        cmd, cword.w,
 841                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 842                 *addr.wp = cword.w;
 843                 break;
 844         case FLASH_CFI_32BIT:
 845                 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
 846                        cmd, cword.l,
 847                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 848                 *addr.lp = cword.l;
 849                 break;
 850         case FLASH_CFI_64BIT:
 851 #ifdef DEBUG
 852                 {
 853                         char str[20];
 854
 855                         print_longlong (str, cword.ll);
 856
 857                         debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
 858                                addr.llp, cmd, str,
 859                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 860                 }
 861 #endif
 862                 *addr.llp = cword.ll;
 863                 break;
 864         }
 865 }
 866
 867 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
 868 {
 869         flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
 870         flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
 871 }
 872
 873 /*-----------------------------------------------------------------------
 874  */
 875 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 876 {
 877         cfiptr_t cptr;
 878         cfiword_t cword;
 879         int retval;
 880
 881         cptr.cp = flash_make_addr (info, sect, offset);
 882         flash_make_cmd (info, cmd, &cword);
 883
 884         debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
 885         switch (info->portwidth) {
 886         case FLASH_CFI_8BIT:
 887                 debug ("is= %x %x\n", cptr.cp[0], cword.c);
 888                 retval = (cptr.cp[0] == cword.c);
 889                 break;
 890         case FLASH_CFI_16BIT:
 891                 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
 892                 retval = (cptr.wp[0] == cword.w);
 893                 break;
 894         case FLASH_CFI_32BIT:
 895                 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
 896                 retval = (cptr.lp[0] == cword.l);
 897                 break;
 898         case FLASH_CFI_64BIT:
 899 #ifdef DEBUG
 900                 {
 901                         char str1[20];
 902                         char str2[20];
 903
 904                         print_longlong (str1, cptr.llp[0]);
 905                         print_longlong (str2, cword.ll);
 906                         debug ("is= %s %s\n", str1, str2);
 907                 }
 908 #endif
 909                 retval = (cptr.llp[0] == cword.ll);
 910                 break;
 911         default:
 912                 retval = 0;
 913                 break;
 914         }
 915         return retval;
 916 }
 917
 918 /*-----------------------------------------------------------------------
 919  */
 920 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 921 {
 922         cfiptr_t cptr;
 923         cfiword_t cword;
 924         int retval;
 925
 926         cptr.cp = flash_make_addr (info, sect, offset);
 927         flash_make_cmd (info, cmd, &cword);
 928         switch (info->portwidth) {
 929         case FLASH_CFI_8BIT:
 930                 retval = ((cptr.cp[0] & cword.c) == cword.c);
 931                 break;
 932         case FLASH_CFI_16BIT:
 933                 retval = ((cptr.wp[0] & cword.w) == cword.w);
 934                 break;
 935         case FLASH_CFI_32BIT:
 936                 retval = ((cptr.lp[0] & cword.l) == cword.l);
 937                 break;
 938         case FLASH_CFI_64BIT:
 939                 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
 940                 break;
 941         default:
 942                 retval = 0;
 943                 break;
 944         }
 945         return retval;
 946 }
 947
 948 /*-----------------------------------------------------------------------
 949  */
 950 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 951 {
 952         cfiptr_t cptr;
 953         cfiword_t cword;
 954         int retval;
 955
 956         cptr.cp = flash_make_addr (info, sect, offset);
 957         flash_make_cmd (info, cmd, &cword);
 958         switch (info->portwidth) {
 959         case FLASH_CFI_8BIT:
 960                 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
 961                 break;
 962         case FLASH_CFI_16BIT:
 963                 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
 964                 break;
 965         case FLASH_CFI_32BIT:
 966                 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
 967                 break;
 968         case FLASH_CFI_64BIT:
 969                 retval = ((cptr.llp[0] & cword.ll) !=
 970                           (cptr.llp[0] & cword.ll));
 971                 break;
 972         default:
 973                 retval = 0;
 974                 break;
 975         }
 976         return retval;
 977 }
 978
 979 /*-----------------------------------------------------------------------
 980  * detect if flash is compatible with the Common Flash Interface (CFI)
 981  * http://www.jedec.org/download/search/jesd68.pdf
 982  *
 983 */
 984 static int flash_detect_cfi (flash_info_t * info)
 985 {
 986         debug ("flash detect cfi\n");
 987
 988         for (info->portwidth = FLASH_CFI_8BIT;
 989              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
 990                 for (info->chipwidth = FLASH_CFI_BY8;
 991                      info->chipwidth <= info->portwidth;
 992                      info->chipwidth <<= 1) {
 993                         flash_write_cmd (info, 0, 0, info->cmd_reset);
 994                         flash_write_cmd (info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
 995                         if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
 996                             && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
 997                             && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
 998                                 info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
 999                                 debug ("device interface is %d\n",
1000                                        info->interface);
1001                                 debug ("found port %d chip %d ",
1002                                        info->portwidth, info->chipwidth);
1003                                 debug ("port %d bits chip %d bits\n",
1004                                        info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1005                                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1006                                 return 1;
1007                         }
1008                 }
1009         }
1010         debug ("not found\n");
1011         return 0;
1012 }
1013
1014 /*
1015  * The following code cannot be run from FLASH!
1016  *
1017  */
1018 ulong flash_get_size (ulong base, int banknum)
1019 {
1020         flash_info_t *info = &flash_info[banknum];
1021         int i, j;
1022         flash_sect_t sect_cnt;
1023         unsigned long sector;
1024         unsigned long tmp;
1025         int size_ratio;
1026         uchar num_erase_regions;
1027         int erase_region_size;
1028         int erase_region_count;
1029
1030         info->start[0] = base;
1031
1032         if (flash_detect_cfi (info)) {
1033                 info->vendor = flash_read_ushort (info, 0, FLASH_OFFSET_PRIMARY_VENDOR);
1034 #ifdef DEBUG
1035                 flash_printqry (info, 0);
1036 #endif
1037                 switch (info->vendor) {
1038                 case CFI_CMDSET_INTEL_STANDARD:
1039                 case CFI_CMDSET_INTEL_EXTENDED:
1040                 default:
1041                         info->cmd_reset = FLASH_CMD_RESET;
1042                         break;
1043                 case CFI_CMDSET_AMD_STANDARD:
1044                 case CFI_CMDSET_AMD_EXTENDED:
1045                         info->cmd_reset = AMD_CMD_RESET;
1046                         break;
1047                 }
1048
1049                 debug ("manufacturer is %d\n", info->vendor);
1050                 size_ratio = info->portwidth / info->chipwidth;
1051                 /* if the chip is x8/x16 reduce the ratio by half */
1052                 if ((info->interface == FLASH_CFI_X8X16)
1053                     && (info->chipwidth == FLASH_CFI_BY8)) {
1054                         size_ratio >>= 1;
1055                 }
1056                 num_erase_regions = flash_read_uchar (info, FLASH_OFFSET_NUM_ERASE_REGIONS);
1057                 debug ("size_ratio %d port %d bits chip %d bits\n",
1058                        size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1059                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1060                 debug ("found %d erase regions\n", num_erase_regions);
1061                 sect_cnt = 0;
1062                 sector = base;
1063                 for (i = 0; i < num_erase_regions; i++) {
1064                         if (i > NUM_ERASE_REGIONS) {
1065                                 printf ("%d erase regions found, only %d used\n",
1066                                         num_erase_regions, NUM_ERASE_REGIONS);
1067                                 break;
1068                         }
1069                         tmp = flash_read_long (info, 0,
1070                                                FLASH_OFFSET_ERASE_REGIONS +
1071                                                i * 4);
1072                         erase_region_size =
1073                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1074                         tmp >>= 16;
1075                         erase_region_count = (tmp & 0xffff) + 1;
1076                         debug ("erase_region_count = %d erase_region_size = %d\n",
1077                                 erase_region_count, erase_region_size);
1078                         for (j = 0; j < erase_region_count; j++) {
1079                                 info->start[sect_cnt] = sector;
1080                                 sector += (erase_region_size * size_ratio);
1081
1082                                 /*
1083                                  * Only read protection status from supported devices (intel...)
1084                                  */
1085                                 switch (info->vendor) {
1086                                 case CFI_CMDSET_INTEL_EXTENDED:
1087                                 case CFI_CMDSET_INTEL_STANDARD:
1088                                         info->protect[sect_cnt] =
1089                                                 flash_isset (info, sect_cnt,
1090                                                              FLASH_OFFSET_PROTECT,
1091                                                              FLASH_STATUS_PROTECT);
1092                                         break;
1093                                 default:
1094                                         info->protect[sect_cnt] = 0; /* default: not protected */
1095                                 }
1096
1097                                 sect_cnt++;
1098                         }
1099                 }
1100
1101                 info->sector_count = sect_cnt;
1102                 /* multiply the size by the number of chips */
1103                 info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio;
1104                 info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
1105                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1106                 info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
1107                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT);
1108                 info->buffer_write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT)));
1109                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT);
1110                 info->write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT))) / 1000;
1111                 info->flash_id = FLASH_MAN_CFI;
1112                 if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) {
1113                         info->portwidth >>= 1;  /* XXX - Need to test on x8/x16 in parallel. */
1114                 }
1115         }
1116
1117         flash_write_cmd (info, 0, 0, info->cmd_reset);
1118         return (info->size);
1119 }
1120
1121
1122 /*-----------------------------------------------------------------------
1123  */
1124 static int flash_write_cfiword (flash_info_t * info, ulong dest,
1125                                 cfiword_t cword)
1126 {
1127
1128         cfiptr_t ctladdr;
1129         cfiptr_t cptr;
1130         int flag;
1131
1132         ctladdr.cp = flash_make_addr (info, 0, 0);
1133         cptr.cp = (uchar *) dest;
1134
1135
1136         /* Check if Flash is (sufficiently) erased */
1137         switch (info->portwidth) {
1138         case FLASH_CFI_8BIT:
1139                 flag = ((cptr.cp[0] & cword.c) == cword.c);
1140                 break;
1141         case FLASH_CFI_16BIT:
1142                 flag = ((cptr.wp[0] & cword.w) == cword.w);
1143                 break;
1144         case FLASH_CFI_32BIT:
1145                 flag = ((cptr.lp[0] & cword.l) == cword.l);
1146                 break;
1147         case FLASH_CFI_64BIT:
1148                 flag = ((cptr.llp[0] & cword.ll) == cword.ll);
1149                 break;
1150         default:
1151                 return 2;
1152         }
1153         if (!flag)
1154                 return 2;
1155
1156         /* Disable interrupts which might cause a timeout here */
1157         flag = disable_interrupts ();
1158
1159         switch (info->vendor) {
1160         case CFI_CMDSET_INTEL_EXTENDED:
1161         case CFI_CMDSET_INTEL_STANDARD:
1162                 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1163                 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
1164                 break;
1165         case CFI_CMDSET_AMD_EXTENDED:
1166         case CFI_CMDSET_AMD_STANDARD:
1167                 flash_unlock_seq (info, 0);
1168                 flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
1169                 break;
1170         }
1171
1172         switch (info->portwidth) {
1173         case FLASH_CFI_8BIT:
1174                 cptr.cp[0] = cword.c;
1175                 break;
1176         case FLASH_CFI_16BIT:
1177                 cptr.wp[0] = cword.w;
1178                 break;
1179         case FLASH_CFI_32BIT:
1180                 cptr.lp[0] = cword.l;
1181                 break;
1182         case FLASH_CFI_64BIT:
1183                 cptr.llp[0] = cword.ll;
1184                 break;
1185         }
1186
1187         /* re-enable interrupts if necessary */
1188         if (flag)
1189                 enable_interrupts ();
1190
1191         return flash_full_status_check (info, 0, info->write_tout, "write");
1192 }
1193
1194 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1195
1196 /* loop through the sectors from the highest address
1197  * when the passed address is greater or equal to the sector address
1198  * we have a match
1199  */
1200 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
1201 {
1202         flash_sect_t sector;
1203
1204         for (sector = info->sector_count - 1; sector >= 0; sector--) {
1205                 if (addr >= info->start[sector])
1206                         break;
1207         }
1208         return sector;
1209 }
1210
1211 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1212                                   int len)
1213 {
1214         flash_sect_t sector;
1215         int cnt;
1216         int retcode;
1217         volatile cfiptr_t src;
1218         volatile cfiptr_t dst;
1219         /* buffered writes in the AMD chip set is not supported yet */
1220         if((info->vendor ==  CFI_CMDSET_AMD_STANDARD) ||
1221                 (info->vendor == CFI_CMDSET_AMD_EXTENDED))
1222                 return ERR_INVAL;
1223
1224         src.cp = cp;
1225         dst.cp = (uchar *) dest;
1226         sector = find_sector (info, dest);
1227         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1228         flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1229         if ((retcode =
1230              flash_status_check (info, sector, info->buffer_write_tout,
1231                                  "write to buffer")) == ERR_OK) {
1232                 /* reduce the number of loops by the width of the port  */
1233                 switch (info->portwidth) {
1234                 case FLASH_CFI_8BIT:
1235                         cnt = len;
1236                         break;
1237                 case FLASH_CFI_16BIT:
1238                         cnt = len >> 1;
1239                         break;
1240                 case FLASH_CFI_32BIT:
1241                         cnt = len >> 2;
1242                         break;
1243                 case FLASH_CFI_64BIT:
1244                         cnt = len >> 3;
1245                         break;
1246                 default:
1247                         return ERR_INVAL;
1248                         break;
1249                 }
1250                 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1251                 while (cnt-- > 0) {
1252                         switch (info->portwidth) {
1253                         case FLASH_CFI_8BIT:
1254                                 *dst.cp++ = *src.cp++;
1255                                 break;
1256                         case FLASH_CFI_16BIT:
1257                                 *dst.wp++ = *src.wp++;
1258                                 break;
1259                         case FLASH_CFI_32BIT:
1260                                 *dst.lp++ = *src.lp++;
1261                                 break;
1262                         case FLASH_CFI_64BIT:
1263                                 *dst.llp++ = *src.llp++;
1264                                 break;
1265                         default:
1266                                 return ERR_INVAL;
1267                                 break;
1268                         }
1269                 }
1270                 flash_write_cmd (info, sector, 0,
1271                                  FLASH_CMD_WRITE_BUFFER_CONFIRM);
1272                 retcode =
1273                         flash_full_status_check (info, sector,
1274                                                  info->buffer_write_tout,
1275                                                  "buffer write");
1276         }
1277         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1278         return retcode;
1279 }
1280 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1281 #endif /* CFG_FLASH_CFI */