1 // SPDX-License-Identifier: GPL-2.0+
3 * Take linux kernel driver drivers/gpio/gpio-pca953x.c for reference.
5 * Copyright (C) 2016 Peng Fan <van.freenix@gmail.com>
11 * The driver's compatible table is borrowed from Linux Kernel,
12 * but now max supported gpio pins is 24 and only PCA953X_TYPE
13 * is supported. PCA957X_TYPE is not supported now.
14 * Also the Polarity Inversion feature is not supported now.
17 * 1. Support PCA957X_TYPE
18 * 2. Support 24 gpio pins
19 * 3. Support Polarity Inversion
30 #include <dt-bindings/gpio/gpio.h>
32 #define PCA953X_INPUT 0
33 #define PCA953X_OUTPUT 1
34 #define PCA953X_INVERT 2
35 #define PCA953X_DIRECTION 3
37 #define PCA_GPIO_MASK 0x00FF
38 #define PCA_INT 0x0100
39 #define PCA953X_TYPE 0x1000
40 #define PCA957X_TYPE 0x2000
41 #define PCA_TYPE_MASK 0xF000
42 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
46 PCA953X_DIRECTION_OUT,
53 * struct pca953x_info - Data for pca953x
55 * @dev: udevice structure for the device
56 * @addr: i2c slave address
57 * @invert: Polarity inversion or not
58 * @gpio_count: the number of gpio pins that the device supports
59 * @chip_type: indicate the chip type,PCA953X or PCA957X
60 * @bank_count: the number of banks that the device supports
61 * @reg_output: array to hold the value of output registers
62 * @reg_direction: array to hold the value of direction registers
71 u8 reg_output[MAX_BANK];
72 u8 reg_direction[MAX_BANK];
75 static int pca953x_write_single(struct udevice *dev, int reg, u8 val,
78 struct pca953x_info *info = dev_get_platdata(dev);
79 int bank_shift = fls((info->gpio_count - 1) / BANK_SZ);
80 int off = offset / BANK_SZ;
83 ret = dm_i2c_write(dev, (reg << bank_shift) + off, &val, 1);
85 dev_err(dev, "%s error\n", __func__);
92 static int pca953x_read_single(struct udevice *dev, int reg, u8 *val,
95 struct pca953x_info *info = dev_get_platdata(dev);
96 int bank_shift = fls((info->gpio_count - 1) / BANK_SZ);
97 int off = offset / BANK_SZ;
101 ret = dm_i2c_read(dev, (reg << bank_shift) + off, &byte, 1);
103 dev_err(dev, "%s error\n", __func__);
112 static int pca953x_read_regs(struct udevice *dev, int reg, u8 *val)
114 struct pca953x_info *info = dev_get_platdata(dev);
117 if (info->gpio_count <= 8) {
118 ret = dm_i2c_read(dev, reg, val, 1);
119 } else if (info->gpio_count <= 16) {
120 ret = dm_i2c_read(dev, reg << 1, val, info->bank_count);
121 } else if (info->gpio_count == 40) {
123 ret = dm_i2c_read(dev, (reg << 3) | 0x80, val,
126 dev_err(dev, "Unsupported now\n");
133 static int pca953x_is_output(struct udevice *dev, int offset)
135 struct pca953x_info *info = dev_get_platdata(dev);
137 int bank = offset / BANK_SZ;
138 int off = offset % BANK_SZ;
140 /*0: output; 1: input */
141 return !(info->reg_direction[bank] & (1 << off));
144 static int pca953x_get_value(struct udevice *dev, uint offset)
149 int off = offset % BANK_SZ;
151 ret = pca953x_read_single(dev, PCA953X_INPUT, &val, offset);
155 return (val >> off) & 0x1;
158 static int pca953x_set_value(struct udevice *dev, uint offset, int value)
160 struct pca953x_info *info = dev_get_platdata(dev);
161 int bank = offset / BANK_SZ;
162 int off = offset % BANK_SZ;
167 val = info->reg_output[bank] | (1 << off);
169 val = info->reg_output[bank] & ~(1 << off);
171 ret = pca953x_write_single(dev, PCA953X_OUTPUT, val, offset);
175 info->reg_output[bank] = val;
180 static int pca953x_set_direction(struct udevice *dev, uint offset, int dir)
182 struct pca953x_info *info = dev_get_platdata(dev);
183 int bank = offset / BANK_SZ;
184 int off = offset % BANK_SZ;
188 if (dir == PCA953X_DIRECTION_IN)
189 val = info->reg_direction[bank] | (1 << off);
191 val = info->reg_direction[bank] & ~(1 << off);
193 ret = pca953x_write_single(dev, PCA953X_DIRECTION, val, offset);
197 info->reg_direction[bank] = val;
202 static int pca953x_direction_input(struct udevice *dev, uint offset)
204 return pca953x_set_direction(dev, offset, PCA953X_DIRECTION_IN);
207 static int pca953x_direction_output(struct udevice *dev, uint offset, int value)
209 /* Configure output value. */
210 pca953x_set_value(dev, offset, value);
212 /* Configure direction as output. */
213 pca953x_set_direction(dev, offset, PCA953X_DIRECTION_OUT);
218 static int pca953x_get_function(struct udevice *dev, uint offset)
220 if (pca953x_is_output(dev, offset))
226 static int pca953x_xlate(struct udevice *dev, struct gpio_desc *desc,
227 struct ofnode_phandle_args *args)
229 desc->offset = args->args[0];
230 desc->flags = args->args[1] & (GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0);
235 static const struct dm_gpio_ops pca953x_ops = {
236 .direction_input = pca953x_direction_input,
237 .direction_output = pca953x_direction_output,
238 .get_value = pca953x_get_value,
239 .set_value = pca953x_set_value,
240 .get_function = pca953x_get_function,
241 .xlate = pca953x_xlate,
244 static int pca953x_probe(struct udevice *dev)
246 struct pca953x_info *info = dev_get_platdata(dev);
247 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
248 char name[32], label[8], *str;
255 addr = dev_read_addr(dev);
261 driver_data = dev_get_driver_data(dev);
263 info->gpio_count = driver_data & PCA_GPIO_MASK;
264 if (info->gpio_count > MAX_BANK * BANK_SZ) {
265 dev_err(dev, "Max support %d pins now\n", MAX_BANK * BANK_SZ);
269 info->chip_type = PCA_CHIP_TYPE(driver_data);
270 if (info->chip_type != PCA953X_TYPE) {
271 dev_err(dev, "Only support PCA953X chip type now.\n");
275 info->bank_count = DIV_ROUND_UP(info->gpio_count, BANK_SZ);
277 ret = pca953x_read_regs(dev, PCA953X_OUTPUT, info->reg_output);
279 dev_err(dev, "Error reading output register\n");
283 ret = pca953x_read_regs(dev, PCA953X_DIRECTION, info->reg_direction);
285 dev_err(dev, "Error reading direction register\n");
289 tmp = dev_read_prop(dev, "label", &size);
292 memcpy(label, tmp, sizeof(label) - 1);
293 label[sizeof(label) - 1] = '\0';
294 snprintf(name, sizeof(name), "%s@%x_", label, info->addr);
296 snprintf(name, sizeof(name), "gpio@%x_", info->addr);
302 uc_priv->bank_name = str;
303 uc_priv->gpio_count = info->gpio_count;
305 dev_dbg(dev, "%s is ready\n", str);
310 #define OF_953X(__nrgpio, __int) (ulong)(__nrgpio | PCA953X_TYPE | __int)
311 #define OF_957X(__nrgpio, __int) (ulong)(__nrgpio | PCA957X_TYPE | __int)
313 static const struct udevice_id pca953x_ids[] = {
314 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
315 { .compatible = "nxp,pca9534", .data = OF_953X(8, PCA_INT), },
316 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
317 { .compatible = "nxp,pca9536", .data = OF_953X(4, 0), },
318 { .compatible = "nxp,pca9537", .data = OF_953X(4, PCA_INT), },
319 { .compatible = "nxp,pca9538", .data = OF_953X(8, PCA_INT), },
320 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
321 { .compatible = "nxp,pca9554", .data = OF_953X(8, PCA_INT), },
322 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
323 { .compatible = "nxp,pca9556", .data = OF_953X(8, 0), },
324 { .compatible = "nxp,pca9557", .data = OF_953X(8, 0), },
325 { .compatible = "nxp,pca9574", .data = OF_957X(8, PCA_INT), },
326 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
327 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
329 { .compatible = "maxim,max7310", .data = OF_953X(8, 0), },
330 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
331 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
332 { .compatible = "maxim,max7315", .data = OF_953X(8, PCA_INT), },
334 { .compatible = "ti,pca6107", .data = OF_953X(8, PCA_INT), },
335 { .compatible = "ti,tca6408", .data = OF_953X(8, PCA_INT), },
336 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
337 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
339 { .compatible = "onsemi,pca9654", .data = OF_953X(8, PCA_INT), },
341 { .compatible = "exar,xra1202", .data = OF_953X(8, 0), },
345 U_BOOT_DRIVER(pca953x) = {
349 .probe = pca953x_probe,
350 .platdata_auto_alloc_size = sizeof(struct pca953x_info),
351 .of_match = pca953x_ids,