2 * (C) Copyright 2001, 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
24 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
29 #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
32 #ifdef CONFIG_AT91RM9200 /* need this for the at91rm9200 */
34 #include <asm/arch/hardware.h>
36 #ifdef CONFIG_IXP425 /* only valid for IXP425 */
37 #include <asm/arch/ixp425.h>
40 #include <asm/arch/hardware.h>
44 /* #define DEBUG_I2C */
47 DECLARE_GLOBAL_DATA_PTR;
51 /*-----------------------------------------------------------------------
58 #define I2C_ACK 0 /* PD_SDA level to ack a byte */
59 #define I2C_NOACK 1 /* PD_SDA level to noack a byte */
63 #define PRINTD(fmt,args...) do { \
64 if (gd->have_console) \
65 printf (fmt ,##args); \
68 #define PRINTD(fmt,args...)
71 #if defined(CONFIG_I2C_MULTI_BUS)
72 static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = 0;
73 #endif /* CONFIG_I2C_MULTI_BUS */
75 /*-----------------------------------------------------------------------
78 static void send_reset (void);
79 static void send_start (void);
80 static void send_stop (void);
81 static void send_ack (int);
82 static int write_byte (uchar byte);
83 static uchar read_byte (int);
85 /*-----------------------------------------------------------------------
86 * Send a reset sequence consisting of 9 clocks with the data signal high
87 * to clock any confused device back into an idle state. Also send a
88 * <stop> at the end of the sequence for belts & suspenders.
90 static void send_reset(void)
92 I2C_SOFT_DECLARATIONS /* intentional without ';' */
101 for(j = 0; j < 9; j++) {
113 /*-----------------------------------------------------------------------
114 * START: High -> Low on SDA while SCL is High
116 static void send_start(void)
118 I2C_SOFT_DECLARATIONS /* intentional without ';' */
130 /*-----------------------------------------------------------------------
131 * STOP: Low -> High on SDA while SCL is High
133 static void send_stop(void)
135 I2C_SOFT_DECLARATIONS /* intentional without ';' */
150 /*-----------------------------------------------------------------------
151 * ack should be I2C_ACK or I2C_NOACK
153 static void send_ack(int ack)
155 I2C_SOFT_DECLARATIONS /* intentional without ';' */
170 /*-----------------------------------------------------------------------
171 * Send 8 bits and look for an acknowledgement.
173 static int write_byte(uchar data)
175 I2C_SOFT_DECLARATIONS /* intentional without ';' */
180 for(j = 0; j < 8; j++) {
183 I2C_SDA(data & 0x80);
193 * Look for an <ACK>(negative logic) and return it.
208 return(nack); /* not a nack is an ack */
211 #if defined(CONFIG_I2C_MULTI_BUS)
213 * Functions for multiple I2C bus handling
215 unsigned int i2c_get_bus_num(void)
220 int i2c_set_bus_num(unsigned int bus)
222 if (bus >= CFG_MAX_I2C_BUS)
229 /* TODO: add 100/400k switching */
230 unsigned int i2c_get_bus_speed(void)
232 return CFG_I2C_SPEED;
235 int i2c_set_bus_speed(unsigned int speed)
237 if (speed != CFG_I2C_SPEED)
244 /*-----------------------------------------------------------------------
245 * if ack == I2C_ACK, ACK the byte so can continue reading, else
246 * send I2C_NOACK to end the read.
248 static uchar read_byte(int ack)
250 I2C_SOFT_DECLARATIONS /* intentional without ';' */
255 * Read 8 bits, MSB first.
260 for(j = 0; j < 8; j++) {
274 /*=====================================================================*/
275 /* Public Functions */
276 /*=====================================================================*/
278 /*-----------------------------------------------------------------------
281 void i2c_init (int speed, int slaveaddr)
284 * WARNING: Do NOT save speed in a static variable: if the
285 * I2C routines are called before RAM is initialized (to read
286 * the DIMM SPD, for instance), RAM won't be usable and your
292 /*-----------------------------------------------------------------------
293 * Probe to see if a chip is present. Also good for checking for the
294 * completion of EEPROM writes since the chip stops responding until
295 * the write completes (typically 10mSec).
297 int i2c_probe(uchar addr)
302 * perform 1 byte write transaction with just address byte
306 rc = write_byte ((addr << 1) | 0);
312 /*-----------------------------------------------------------------------
315 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
318 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
319 chip, addr, alen, buffer, len);
321 #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
323 * EEPROM chips that implement "address overflow" are ones
324 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
325 * address and the extra bits end up in the "chip address"
326 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
327 * four 256 byte chips.
329 * Note that we consider the length of the address field to
330 * still be one byte because the extra address bits are
331 * hidden in the chip address.
333 chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
335 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
340 * Do the addressing portion of a write cycle to set the
341 * chip's address pointer. If the address length is zero,
342 * don't do the normal write cycle to set the address pointer,
343 * there is no address pointer in this chip.
347 if(write_byte(chip << 1)) { /* write cycle */
349 PRINTD("i2c_read, no chip responded %02X\n", chip);
352 shift = (alen-1) * 8;
354 if(write_byte(addr >> shift)) {
355 PRINTD("i2c_read, address not <ACK>ed\n");
360 send_stop(); /* reportedly some chips need a full stop */
364 * Send the chip address again, this time for a read cycle.
365 * Then read the data. On the last byte, we do a NACK instead
366 * of an ACK(len == 0) to terminate the read.
368 write_byte((chip << 1) | 1); /* read cycle */
370 *buffer++ = read_byte(len == 0);
376 /*-----------------------------------------------------------------------
379 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
381 int shift, failures = 0;
383 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
384 chip, addr, alen, buffer, len);
387 if(write_byte(chip << 1)) { /* write cycle */
389 PRINTD("i2c_write, no chip responded %02X\n", chip);
392 shift = (alen-1) * 8;
394 if(write_byte(addr >> shift)) {
395 PRINTD("i2c_write, address not <ACK>ed\n");
402 if(write_byte(*buffer++)) {
410 /*-----------------------------------------------------------------------
413 uchar i2c_reg_read(uchar i2c_addr, uchar reg)
417 i2c_read(i2c_addr, reg, 1, &buf, 1);
422 /*-----------------------------------------------------------------------
425 void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
427 i2c_write(i2c_addr, reg, 1, &val, 1);