2 * Qualcomm SDHCI driver - SD/eMMC controller
4 * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
6 * Based on Linux driver
8 * SPDX-License-Identifier: GPL-2.0+
17 #include <linux/bitops.h>
19 /* Non-standard registers needed for SDHCI startup */
20 #define SDCC_MCI_POWER 0x0
21 #define SDCC_MCI_POWER_SW_RST BIT(7)
23 /* This is undocumented register */
24 #define SDCC_MCI_VERSION 0x50
25 #define SDCC_MCI_VERSION_MAJOR_SHIFT 28
26 #define SDCC_MCI_VERSION_MAJOR_MASK (0xf << SDCC_MCI_VERSION_MAJOR_SHIFT)
27 #define SDCC_MCI_VERSION_MINOR_MASK 0xff
29 #define SDCC_MCI_STATUS2 0x6C
30 #define SDCC_MCI_STATUS2_MCI_ACT 0x1
31 #define SDCC_MCI_HC_MODE 0x78
33 /* Offset to SDHCI registers */
34 #define SDCC_SDHCI_OFFSET 0x900
36 /* Non standard (?) SDHCI register */
37 #define SDHCI_VENDOR_SPEC_CAPABILITIES0 0x11c
40 struct sdhci_host host;
44 DECLARE_GLOBAL_DATA_PTR;
46 static int msm_sdc_clk_init(struct udevice *dev)
48 uint clk_rate = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
49 "clock-frequency", 400000);
50 uint clkd[2]; /* clk_id and clk_no */
55 ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset, "clock", clkd,
60 clk_offset = fdt_node_offset_by_phandle(gd->fdt_blob, clkd[0]);
64 ret = uclass_get_device_by_of_offset(UCLASS_CLK, clk_offset, &clk);
68 ret = clk_set_periph_rate(clk, clkd[1], clk_rate);
75 static int msm_sdc_probe(struct udevice *dev)
77 struct msm_sdhc *prv = dev_get_priv(dev);
78 struct sdhci_host *host = &prv->host;
79 u32 core_version, core_minor, core_major;
82 host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_BROKEN_R1B;
85 ret = msm_sdc_clk_init(dev);
89 /* Reset the core and Enable SDHC mode */
90 writel(readl(prv->base + SDCC_MCI_POWER) | SDCC_MCI_POWER_SW_RST,
91 prv->base + SDCC_MCI_POWER);
94 /* Wait for reset to be written to register */
95 if (wait_for_bit(__func__, prv->base + SDCC_MCI_STATUS2,
96 SDCC_MCI_STATUS2_MCI_ACT, false, 10, false)) {
97 printf("msm_sdhci: reset request failed\n");
101 /* SW reset can take upto 10HCLK + 15MCLK cycles. (min 40us) */
102 if (wait_for_bit(__func__, prv->base + SDCC_MCI_POWER,
103 SDCC_MCI_POWER_SW_RST, false, 2, false)) {
104 printf("msm_sdhci: stuck in reset\n");
108 /* Enable host-controller mode */
109 writel(1, prv->base + SDCC_MCI_HC_MODE);
111 core_version = readl(prv->base + SDCC_MCI_VERSION);
113 core_major = (core_version & SDCC_MCI_VERSION_MAJOR_MASK);
114 core_major >>= SDCC_MCI_VERSION_MAJOR_SHIFT;
116 core_minor = core_version & SDCC_MCI_VERSION_MINOR_MASK;
119 * Support for some capabilities is not advertised by newer
120 * controller versions and must be explicitly enabled.
122 if (core_major >= 1 && core_minor != 0x11 && core_minor != 0x12) {
123 u32 caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
124 caps |= SDHCI_CAN_VDD_300 | SDHCI_CAN_DO_8BIT;
125 writel(caps, host->ioaddr + SDHCI_VENDOR_SPEC_CAPABILITIES0);
128 /* Set host controller version */
129 host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
131 /* automatically detect max and min speed */
132 return add_sdhci(host, 0, 0);
135 static int msm_sdc_remove(struct udevice *dev)
137 struct msm_sdhc *priv = dev_get_priv(dev);
139 /* Disable host-controller mode */
140 writel(0, priv->base + SDCC_MCI_HC_MODE);
145 static int msm_ofdata_to_platdata(struct udevice *dev)
147 struct udevice *parent = dev->parent;
148 struct msm_sdhc *priv = dev_get_priv(dev);
149 struct sdhci_host *host = &priv->host;
151 host->name = strdup(dev->name);
152 host->ioaddr = (void *)dev_get_addr(dev);
153 host->bus_width = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
155 host->index = fdtdec_get_uint(gd->fdt_blob, dev->of_offset, "index", 0);
156 priv->base = (void *)fdtdec_get_addr_size_auto_parent(gd->fdt_blob,
160 if (priv->base == (void *)FDT_ADDR_T_NONE ||
161 host->ioaddr == (void *)FDT_ADDR_T_NONE)
167 static const struct udevice_id msm_mmc_ids[] = {
168 { .compatible = "qcom,sdhci-msm-v4" },
172 U_BOOT_DRIVER(msm_sdc_drv) = {
175 .of_match = msm_mmc_ids,
176 .ofdata_to_platdata = msm_ofdata_to_platdata,
177 .probe = msm_sdc_probe,
178 .remove = msm_sdc_remove,
179 .priv_auto_alloc_size = sizeof(struct msm_sdhc),