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[u-boot] / drivers / mmc / sdhci.c
1 /*
2  * Copyright 2011, Marvell Semiconductor Inc.
3  * Lei Wen <leiwen@marvell.com>
4  *
5  * SPDX-License-Identifier:     GPL-2.0+
6  *
7  * Back ported to the 8xx platform (from the 8260 platform) by
8  * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
9  */
10
11 #include <common.h>
12 #include <errno.h>
13 #include <malloc.h>
14 #include <mmc.h>
15 #include <sdhci.h>
16
17 #if defined(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER)
18 void *aligned_buffer = (void *)CONFIG_FIXED_SDHCI_ALIGNED_BUFFER;
19 #else
20 void *aligned_buffer;
21 #endif
22
23 static void sdhci_reset(struct sdhci_host *host, u8 mask)
24 {
25         unsigned long timeout;
26
27         /* Wait max 100 ms */
28         timeout = 100;
29         sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET);
30         while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) {
31                 if (timeout == 0) {
32                         printf("%s: Reset 0x%x never completed.\n",
33                                __func__, (int)mask);
34                         return;
35                 }
36                 timeout--;
37                 udelay(1000);
38         }
39 }
40
41 static void sdhci_cmd_done(struct sdhci_host *host, struct mmc_cmd *cmd)
42 {
43         int i;
44         if (cmd->resp_type & MMC_RSP_136) {
45                 /* CRC is stripped so we need to do some shifting. */
46                 for (i = 0; i < 4; i++) {
47                         cmd->response[i] = sdhci_readl(host,
48                                         SDHCI_RESPONSE + (3-i)*4) << 8;
49                         if (i != 3)
50                                 cmd->response[i] |= sdhci_readb(host,
51                                                 SDHCI_RESPONSE + (3-i)*4-1);
52                 }
53         } else {
54                 cmd->response[0] = sdhci_readl(host, SDHCI_RESPONSE);
55         }
56 }
57
58 static void sdhci_transfer_pio(struct sdhci_host *host, struct mmc_data *data)
59 {
60         int i;
61         char *offs;
62         for (i = 0; i < data->blocksize; i += 4) {
63                 offs = data->dest + i;
64                 if (data->flags == MMC_DATA_READ)
65                         *(u32 *)offs = sdhci_readl(host, SDHCI_BUFFER);
66                 else
67                         sdhci_writel(host, *(u32 *)offs, SDHCI_BUFFER);
68         }
69 }
70
71 static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data,
72                                 unsigned int start_addr)
73 {
74         unsigned int stat, rdy, mask, timeout, block = 0;
75 #ifdef CONFIG_MMC_SDMA
76         unsigned char ctrl;
77         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
78         ctrl &= ~SDHCI_CTRL_DMA_MASK;
79         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
80 #endif
81
82         timeout = 1000000;
83         rdy = SDHCI_INT_SPACE_AVAIL | SDHCI_INT_DATA_AVAIL;
84         mask = SDHCI_DATA_AVAILABLE | SDHCI_SPACE_AVAILABLE;
85         do {
86                 stat = sdhci_readl(host, SDHCI_INT_STATUS);
87                 if (stat & SDHCI_INT_ERROR) {
88                         printf("%s: Error detected in status(0x%X)!\n",
89                                __func__, stat);
90                         return -1;
91                 }
92                 if (stat & rdy) {
93                         if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & mask))
94                                 continue;
95                         sdhci_writel(host, rdy, SDHCI_INT_STATUS);
96                         sdhci_transfer_pio(host, data);
97                         data->dest += data->blocksize;
98                         if (++block >= data->blocks)
99                                 break;
100                 }
101 #ifdef CONFIG_MMC_SDMA
102                 if (stat & SDHCI_INT_DMA_END) {
103                         sdhci_writel(host, SDHCI_INT_DMA_END, SDHCI_INT_STATUS);
104                         start_addr &= ~(SDHCI_DEFAULT_BOUNDARY_SIZE - 1);
105                         start_addr += SDHCI_DEFAULT_BOUNDARY_SIZE;
106                         sdhci_writel(host, start_addr, SDHCI_DMA_ADDRESS);
107                 }
108 #endif
109                 if (timeout-- > 0)
110                         udelay(10);
111                 else {
112                         printf("%s: Transfer data timeout\n", __func__);
113                         return -1;
114                 }
115         } while (!(stat & SDHCI_INT_DATA_END));
116         return 0;
117 }
118
119 /*
120  * No command will be sent by driver if card is busy, so driver must wait
121  * for card ready state.
122  * Every time when card is busy after timeout then (last) timeout value will be
123  * increased twice but only if it doesn't exceed global defined maximum.
124  * Each function call will use last timeout value.
125  */
126 #define SDHCI_CMD_MAX_TIMEOUT                   3200
127 #define SDHCI_CMD_DEFAULT_TIMEOUT               100
128 #define SDHCI_READ_STATUS_TIMEOUT               1000
129
130 #ifdef CONFIG_DM_MMC_OPS
131 static int sdhci_send_command(struct udevice *dev, struct mmc_cmd *cmd,
132                               struct mmc_data *data)
133 {
134         struct mmc *mmc = mmc_get_mmc_dev(dev);
135
136 #else
137 static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
138                               struct mmc_data *data)
139 {
140 #endif
141         struct sdhci_host *host = mmc->priv;
142         unsigned int stat = 0;
143         int ret = 0;
144         int trans_bytes = 0, is_aligned = 1;
145         u32 mask, flags, mode;
146         unsigned int time = 0, start_addr = 0;
147         int mmc_dev = mmc_get_blk_desc(mmc)->devnum;
148         unsigned start = get_timer(0);
149
150         /* Timeout unit - ms */
151         static unsigned int cmd_timeout = SDHCI_CMD_DEFAULT_TIMEOUT;
152
153         sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS);
154         mask = SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT;
155
156         /* We shouldn't wait for data inihibit for stop commands, even
157            though they might use busy signaling */
158         if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION)
159                 mask &= ~SDHCI_DATA_INHIBIT;
160
161         while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
162                 if (time >= cmd_timeout) {
163                         printf("%s: MMC: %d busy ", __func__, mmc_dev);
164                         if (2 * cmd_timeout <= SDHCI_CMD_MAX_TIMEOUT) {
165                                 cmd_timeout += cmd_timeout;
166                                 printf("timeout increasing to: %u ms.\n",
167                                        cmd_timeout);
168                         } else {
169                                 puts("timeout.\n");
170                                 return -ECOMM;
171                         }
172                 }
173                 time++;
174                 udelay(1000);
175         }
176
177         mask = SDHCI_INT_RESPONSE;
178         if (!(cmd->resp_type & MMC_RSP_PRESENT))
179                 flags = SDHCI_CMD_RESP_NONE;
180         else if (cmd->resp_type & MMC_RSP_136)
181                 flags = SDHCI_CMD_RESP_LONG;
182         else if (cmd->resp_type & MMC_RSP_BUSY) {
183                 flags = SDHCI_CMD_RESP_SHORT_BUSY;
184                 if (data)
185                         mask |= SDHCI_INT_DATA_END;
186         } else
187                 flags = SDHCI_CMD_RESP_SHORT;
188
189         if (cmd->resp_type & MMC_RSP_CRC)
190                 flags |= SDHCI_CMD_CRC;
191         if (cmd->resp_type & MMC_RSP_OPCODE)
192                 flags |= SDHCI_CMD_INDEX;
193         if (data)
194                 flags |= SDHCI_CMD_DATA;
195
196         /* Set Transfer mode regarding to data flag */
197         if (data != 0) {
198                 sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL);
199                 mode = SDHCI_TRNS_BLK_CNT_EN;
200                 trans_bytes = data->blocks * data->blocksize;
201                 if (data->blocks > 1)
202                         mode |= SDHCI_TRNS_MULTI;
203
204                 if (data->flags == MMC_DATA_READ)
205                         mode |= SDHCI_TRNS_READ;
206
207 #ifdef CONFIG_MMC_SDMA
208                 if (data->flags == MMC_DATA_READ)
209                         start_addr = (unsigned long)data->dest;
210                 else
211                         start_addr = (unsigned long)data->src;
212                 if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) &&
213                                 (start_addr & 0x7) != 0x0) {
214                         is_aligned = 0;
215                         start_addr = (unsigned long)aligned_buffer;
216                         if (data->flags != MMC_DATA_READ)
217                                 memcpy(aligned_buffer, data->src, trans_bytes);
218                 }
219
220 #if defined(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER)
221                 /*
222                  * Always use this bounce-buffer when
223                  * CONFIG_FIXED_SDHCI_ALIGNED_BUFFER is defined
224                  */
225                 is_aligned = 0;
226                 start_addr = (unsigned long)aligned_buffer;
227                 if (data->flags != MMC_DATA_READ)
228                         memcpy(aligned_buffer, data->src, trans_bytes);
229 #endif
230
231                 sdhci_writel(host, start_addr, SDHCI_DMA_ADDRESS);
232                 mode |= SDHCI_TRNS_DMA;
233 #endif
234                 sdhci_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG,
235                                 data->blocksize),
236                                 SDHCI_BLOCK_SIZE);
237                 sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT);
238                 sdhci_writew(host, mode, SDHCI_TRANSFER_MODE);
239         } else if (cmd->resp_type & MMC_RSP_BUSY) {
240                 sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL);
241         }
242
243         sdhci_writel(host, cmd->cmdarg, SDHCI_ARGUMENT);
244 #ifdef CONFIG_MMC_SDMA
245         flush_cache(start_addr, trans_bytes);
246 #endif
247         sdhci_writew(host, SDHCI_MAKE_CMD(cmd->cmdidx, flags), SDHCI_COMMAND);
248         start = get_timer(0);
249         do {
250                 stat = sdhci_readl(host, SDHCI_INT_STATUS);
251                 if (stat & SDHCI_INT_ERROR)
252                         break;
253
254                 if (get_timer(start) >= SDHCI_READ_STATUS_TIMEOUT) {
255                         if (host->quirks & SDHCI_QUIRK_BROKEN_R1B) {
256                                 return 0;
257                         } else {
258                                 printf("%s: Timeout for status update!\n",
259                                        __func__);
260                                 return -ETIMEDOUT;
261                         }
262                 }
263         } while ((stat & mask) != mask);
264
265         if ((stat & (SDHCI_INT_ERROR | mask)) == mask) {
266                 sdhci_cmd_done(host, cmd);
267                 sdhci_writel(host, mask, SDHCI_INT_STATUS);
268         } else
269                 ret = -1;
270
271         if (!ret && data)
272                 ret = sdhci_transfer_data(host, data, start_addr);
273
274         if (host->quirks & SDHCI_QUIRK_WAIT_SEND_CMD)
275                 udelay(1000);
276
277         stat = sdhci_readl(host, SDHCI_INT_STATUS);
278         sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS);
279         if (!ret) {
280                 if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) &&
281                                 !is_aligned && (data->flags == MMC_DATA_READ))
282                         memcpy(data->dest, aligned_buffer, trans_bytes);
283                 return 0;
284         }
285
286         sdhci_reset(host, SDHCI_RESET_CMD);
287         sdhci_reset(host, SDHCI_RESET_DATA);
288         if (stat & SDHCI_INT_TIMEOUT)
289                 return -ETIMEDOUT;
290         else
291                 return -ECOMM;
292 }
293
294 static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
295 {
296         struct sdhci_host *host = mmc->priv;
297         unsigned int div, clk, timeout, reg;
298
299         /* Wait max 20 ms */
300         timeout = 200;
301         while (sdhci_readl(host, SDHCI_PRESENT_STATE) &
302                            (SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT)) {
303                 if (timeout == 0) {
304                         printf("%s: Timeout to wait cmd & data inhibit\n",
305                                __func__);
306                         return -1;
307                 }
308
309                 timeout--;
310                 udelay(100);
311         }
312
313         reg = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
314         reg &= ~(SDHCI_CLOCK_CARD_EN | SDHCI_CLOCK_INT_EN);
315         sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL);
316
317         if (clock == 0)
318                 return 0;
319
320         if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
321                 /* Version 3.00 divisors must be a multiple of 2. */
322                 if (mmc->cfg->f_max <= clock)
323                         div = 1;
324                 else {
325                         for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; div += 2) {
326                                 if ((mmc->cfg->f_max / div) <= clock)
327                                         break;
328                         }
329                 }
330         } else {
331                 /* Version 2.00 divisors must be a power of 2. */
332                 for (div = 1; div < SDHCI_MAX_DIV_SPEC_200; div *= 2) {
333                         if ((mmc->cfg->f_max / div) <= clock)
334                                 break;
335                 }
336         }
337         div >>= 1;
338
339         if (host->set_clock)
340                 host->set_clock(host->index, div);
341
342         clk = (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
343         clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
344                 << SDHCI_DIVIDER_HI_SHIFT;
345         clk |= SDHCI_CLOCK_INT_EN;
346         sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
347
348         /* Wait max 20 ms */
349         timeout = 20;
350         while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
351                 & SDHCI_CLOCK_INT_STABLE)) {
352                 if (timeout == 0) {
353                         printf("%s: Internal clock never stabilised.\n",
354                                __func__);
355                         return -1;
356                 }
357                 timeout--;
358                 udelay(1000);
359         }
360
361         clk |= SDHCI_CLOCK_CARD_EN;
362         sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
363         return 0;
364 }
365
366 static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
367 {
368         u8 pwr = 0;
369
370         if (power != (unsigned short)-1) {
371                 switch (1 << power) {
372                 case MMC_VDD_165_195:
373                         pwr = SDHCI_POWER_180;
374                         break;
375                 case MMC_VDD_29_30:
376                 case MMC_VDD_30_31:
377                         pwr = SDHCI_POWER_300;
378                         break;
379                 case MMC_VDD_32_33:
380                 case MMC_VDD_33_34:
381                         pwr = SDHCI_POWER_330;
382                         break;
383                 }
384         }
385
386         if (pwr == 0) {
387                 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
388                 return;
389         }
390
391         if (host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER)
392                 sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
393
394         pwr |= SDHCI_POWER_ON;
395
396         sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
397 }
398
399 #ifdef CONFIG_DM_MMC_OPS
400 static int sdhci_set_ios(struct udevice *dev)
401 {
402         struct mmc *mmc = mmc_get_mmc_dev(dev);
403 #else
404 static void sdhci_set_ios(struct mmc *mmc)
405 {
406 #endif
407         u32 ctrl;
408         struct sdhci_host *host = mmc->priv;
409
410         if (host->set_control_reg)
411                 host->set_control_reg(host);
412
413         if (mmc->clock != host->clock)
414                 sdhci_set_clock(mmc, mmc->clock);
415
416         /* Set bus width */
417         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
418         if (mmc->bus_width == 8) {
419                 ctrl &= ~SDHCI_CTRL_4BITBUS;
420                 if ((SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) ||
421                                 (host->quirks & SDHCI_QUIRK_USE_WIDE8))
422                         ctrl |= SDHCI_CTRL_8BITBUS;
423         } else {
424                 if ((SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) ||
425                                 (host->quirks & SDHCI_QUIRK_USE_WIDE8))
426                         ctrl &= ~SDHCI_CTRL_8BITBUS;
427                 if (mmc->bus_width == 4)
428                         ctrl |= SDHCI_CTRL_4BITBUS;
429                 else
430                         ctrl &= ~SDHCI_CTRL_4BITBUS;
431         }
432
433         if (mmc->clock > 26000000)
434                 ctrl |= SDHCI_CTRL_HISPD;
435         else
436                 ctrl &= ~SDHCI_CTRL_HISPD;
437
438         if (host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)
439                 ctrl &= ~SDHCI_CTRL_HISPD;
440
441         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
442 #ifdef CONFIG_DM_MMC_OPS
443         return 0;
444 #endif
445 }
446
447 static int sdhci_init(struct mmc *mmc)
448 {
449         struct sdhci_host *host = mmc->priv;
450
451         sdhci_reset(host, SDHCI_RESET_ALL);
452
453         if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) && !aligned_buffer) {
454                 aligned_buffer = memalign(8, 512*1024);
455                 if (!aligned_buffer) {
456                         printf("%s: Aligned buffer alloc failed!!!\n",
457                                __func__);
458                         return -1;
459                 }
460         }
461
462         sdhci_set_power(host, fls(mmc->cfg->voltages) - 1);
463
464         if (host->quirks & SDHCI_QUIRK_NO_CD) {
465 #if defined(CONFIG_PIC32_SDHCI)
466                 /* PIC32 SDHCI CD errata:
467                  * - set CD_TEST and clear CD_TEST_INS bit
468                  */
469                 sdhci_writeb(host, SDHCI_CTRL_CD_TEST, SDHCI_HOST_CONTROL);
470 #else
471                 unsigned int status;
472
473                 sdhci_writeb(host, SDHCI_CTRL_CD_TEST_INS | SDHCI_CTRL_CD_TEST,
474                         SDHCI_HOST_CONTROL);
475
476                 status = sdhci_readl(host, SDHCI_PRESENT_STATE);
477                 while ((!(status & SDHCI_CARD_PRESENT)) ||
478                     (!(status & SDHCI_CARD_STATE_STABLE)) ||
479                     (!(status & SDHCI_CARD_DETECT_PIN_LEVEL)))
480                         status = sdhci_readl(host, SDHCI_PRESENT_STATE);
481 #endif
482         }
483
484         /* Enable only interrupts served by the SD controller */
485         sdhci_writel(host, SDHCI_INT_DATA_MASK | SDHCI_INT_CMD_MASK,
486                      SDHCI_INT_ENABLE);
487         /* Mask all sdhci interrupt sources */
488         sdhci_writel(host, 0x0, SDHCI_SIGNAL_ENABLE);
489
490         return 0;
491 }
492
493 #ifdef CONFIG_DM_MMC_OPS
494 int sdhci_probe(struct udevice *dev)
495 {
496         struct mmc *mmc = mmc_get_mmc_dev(dev);
497
498         return sdhci_init(mmc);
499 }
500
501 const struct dm_mmc_ops sdhci_ops = {
502         .send_cmd       = sdhci_send_command,
503         .set_ios        = sdhci_set_ios,
504 };
505 #else
506 static const struct mmc_ops sdhci_ops = {
507         .send_cmd       = sdhci_send_command,
508         .set_ios        = sdhci_set_ios,
509         .init           = sdhci_init,
510 };
511 #endif
512
513 int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
514                 u32 max_clk, u32 min_clk)
515 {
516         u32 caps;
517
518         caps = sdhci_readl(host, SDHCI_CAPABILITIES);
519
520 #ifdef CONFIG_MMC_SDMA
521         if (!(caps & SDHCI_CAN_DO_SDMA)) {
522                 printf("%s: Your controller doesn't support SDMA!!\n",
523                        __func__);
524                 return -EINVAL;
525         }
526 #endif
527         host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
528
529         cfg->name = host->name;
530 #ifndef CONFIG_DM_MMC_OPS
531         cfg->ops = &sdhci_ops;
532 #endif
533         if (max_clk)
534                 cfg->f_max = max_clk;
535         else {
536                 if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300)
537                         cfg->f_max = (caps & SDHCI_CLOCK_V3_BASE_MASK) >>
538                                 SDHCI_CLOCK_BASE_SHIFT;
539                 else
540                         cfg->f_max = (caps & SDHCI_CLOCK_BASE_MASK) >>
541                                 SDHCI_CLOCK_BASE_SHIFT;
542                 cfg->f_max *= 1000000;
543         }
544         if (cfg->f_max == 0) {
545                 printf("%s: Hardware doesn't specify base clock frequency\n",
546                        __func__);
547                 return -EINVAL;
548         }
549         if (min_clk)
550                 cfg->f_min = min_clk;
551         else {
552                 if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300)
553                         cfg->f_min = cfg->f_max / SDHCI_MAX_DIV_SPEC_300;
554                 else
555                         cfg->f_min = cfg->f_max / SDHCI_MAX_DIV_SPEC_200;
556         }
557         cfg->voltages = 0;
558         if (caps & SDHCI_CAN_VDD_330)
559                 cfg->voltages |= MMC_VDD_32_33 | MMC_VDD_33_34;
560         if (caps & SDHCI_CAN_VDD_300)
561                 cfg->voltages |= MMC_VDD_29_30 | MMC_VDD_30_31;
562         if (caps & SDHCI_CAN_VDD_180)
563                 cfg->voltages |= MMC_VDD_165_195;
564
565         if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE)
566                 cfg->voltages |= host->voltages;
567
568         cfg->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
569         if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
570                 if (caps & SDHCI_CAN_DO_8BIT)
571                         cfg->host_caps |= MMC_MODE_8BIT;
572         }
573
574         if (host->host_caps)
575                 cfg->host_caps |= host->host_caps;
576
577
578         cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
579
580         return 0;
581 }
582
583 #ifdef CONFIG_BLK
584 int sdhci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg)
585 {
586         return mmc_bind(dev, mmc, cfg);
587 }
588 #else
589 int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk)
590 {
591         int ret;
592
593         ret = sdhci_setup_cfg(&host->cfg, host, max_clk, min_clk);
594         if (ret)
595                 return ret;
596
597         host->mmc = mmc_create(&host->cfg, host);
598         if (host->mmc == NULL) {
599                 printf("%s: mmc create fail!\n", __func__);
600                 return -1;
601         }
602
603         return 0;
604 }
605 #endif