2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
12 * Tolunay Orkun <listmember@orkun.us>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 /* The DEBUG define must be before common to enable debugging */
38 #include <asm/processor.h>
40 #include <asm/byteorder.h>
41 #include <environment.h>
44 * This file implements a Common Flash Interface (CFI) driver for
47 * The width of the port and the width of the chips are determined at
48 * initialization. These widths are used to calculate the address for
49 * access CFI data structures.
52 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
53 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
54 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
55 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
56 * AMD CFI Specification, Release 2.0 December 1, 2001
57 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
58 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
60 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
61 * reading and writing ... (yes there is such a Hardware).
64 #ifndef CONFIG_SYS_FLASH_BANKS_LIST
65 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
68 #define FLASH_CMD_CFI 0x98
69 #define FLASH_CMD_READ_ID 0x90
70 #define FLASH_CMD_RESET 0xff
71 #define FLASH_CMD_BLOCK_ERASE 0x20
72 #define FLASH_CMD_ERASE_CONFIRM 0xD0
73 #define FLASH_CMD_WRITE 0x40
74 #define FLASH_CMD_PROTECT 0x60
75 #define FLASH_CMD_PROTECT_SET 0x01
76 #define FLASH_CMD_PROTECT_CLEAR 0xD0
77 #define FLASH_CMD_CLEAR_STATUS 0x50
78 #define FLASH_CMD_READ_STATUS 0x70
79 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
80 #define FLASH_CMD_WRITE_BUFFER_PROG 0xE9
81 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
83 #define FLASH_STATUS_DONE 0x80
84 #define FLASH_STATUS_ESS 0x40
85 #define FLASH_STATUS_ECLBS 0x20
86 #define FLASH_STATUS_PSLBS 0x10
87 #define FLASH_STATUS_VPENS 0x08
88 #define FLASH_STATUS_PSS 0x04
89 #define FLASH_STATUS_DPS 0x02
90 #define FLASH_STATUS_R 0x01
91 #define FLASH_STATUS_PROTECT 0x01
93 #define AMD_CMD_RESET 0xF0
94 #define AMD_CMD_WRITE 0xA0
95 #define AMD_CMD_ERASE_START 0x80
96 #define AMD_CMD_ERASE_SECTOR 0x30
97 #define AMD_CMD_UNLOCK_START 0xAA
98 #define AMD_CMD_UNLOCK_ACK 0x55
99 #define AMD_CMD_WRITE_TO_BUFFER 0x25
100 #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
102 #define AMD_STATUS_TOGGLE 0x40
103 #define AMD_STATUS_ERROR 0x20
105 #define ATM_CMD_UNLOCK_SECT 0x70
106 #define ATM_CMD_SOFTLOCK_START 0x80
107 #define ATM_CMD_LOCK_SECT 0x40
109 #define FLASH_OFFSET_MANUFACTURER_ID 0x00
110 #define FLASH_OFFSET_DEVICE_ID 0x01
111 #define FLASH_OFFSET_DEVICE_ID2 0x0E
112 #define FLASH_OFFSET_DEVICE_ID3 0x0F
113 #define FLASH_OFFSET_CFI 0x55
114 #define FLASH_OFFSET_CFI_ALT 0x555
115 #define FLASH_OFFSET_CFI_RESP 0x10
116 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13
117 /* extended query table primary address */
118 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15
119 #define FLASH_OFFSET_WTOUT 0x1F
120 #define FLASH_OFFSET_WBTOUT 0x20
121 #define FLASH_OFFSET_ETOUT 0x21
122 #define FLASH_OFFSET_CETOUT 0x22
123 #define FLASH_OFFSET_WMAX_TOUT 0x23
124 #define FLASH_OFFSET_WBMAX_TOUT 0x24
125 #define FLASH_OFFSET_EMAX_TOUT 0x25
126 #define FLASH_OFFSET_CEMAX_TOUT 0x26
127 #define FLASH_OFFSET_SIZE 0x27
128 #define FLASH_OFFSET_INTERFACE 0x28
129 #define FLASH_OFFSET_BUFFER_SIZE 0x2A
130 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
131 #define FLASH_OFFSET_ERASE_REGIONS 0x2D
132 #define FLASH_OFFSET_PROTECT 0x02
133 #define FLASH_OFFSET_USER_PROTECTION 0x85
134 #define FLASH_OFFSET_INTEL_PROTECTION 0x81
136 #define CFI_CMDSET_NONE 0
137 #define CFI_CMDSET_INTEL_EXTENDED 1
138 #define CFI_CMDSET_AMD_STANDARD 2
139 #define CFI_CMDSET_INTEL_STANDARD 3
140 #define CFI_CMDSET_AMD_EXTENDED 4
141 #define CFI_CMDSET_MITSU_STANDARD 256
142 #define CFI_CMDSET_MITSU_EXTENDED 257
143 #define CFI_CMDSET_SST 258
144 #define CFI_CMDSET_INTEL_PROG_REGIONS 512
146 #ifdef CONFIG_SYS_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
147 # undef FLASH_CMD_RESET
148 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
155 unsigned long long ll;
158 #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
160 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
161 static uint flash_verbose = 1;
163 /* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */
164 #ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
165 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT
167 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS
170 flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
173 * Check if chip width is defined. If not, start detecting with 8bit.
175 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
176 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
179 /* CFI standard query structure */
190 u8 word_write_timeout_typ;
191 u8 buf_write_timeout_typ;
192 u8 block_erase_timeout_typ;
193 u8 chip_erase_timeout_typ;
194 u8 word_write_timeout_max;
195 u8 buf_write_timeout_max;
196 u8 block_erase_timeout_max;
197 u8 chip_erase_timeout_max;
200 u16 max_buf_write_size;
201 u8 num_erase_regions;
202 u32 erase_region_info[NUM_ERASE_REGIONS];
203 } __attribute__((packed));
209 } __attribute__((packed));
211 static void __flash_write8(u8 value, void *addr)
213 __raw_writeb(value, addr);
216 static void __flash_write16(u16 value, void *addr)
218 __raw_writew(value, addr);
221 static void __flash_write32(u32 value, void *addr)
223 __raw_writel(value, addr);
226 static void __flash_write64(u64 value, void *addr)
228 /* No architectures currently implement __raw_writeq() */
229 *(volatile u64 *)addr = value;
232 static u8 __flash_read8(void *addr)
234 return __raw_readb(addr);
237 static u16 __flash_read16(void *addr)
239 return __raw_readw(addr);
242 static u32 __flash_read32(void *addr)
244 return __raw_readl(addr);
247 static u64 __flash_read64(void *addr)
249 /* No architectures currently implement __raw_readq() */
250 return *(volatile u64 *)addr;
253 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
254 void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
255 void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
256 void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
257 void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
258 u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
259 u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
260 u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
261 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
263 #define flash_write8 __flash_write8
264 #define flash_write16 __flash_write16
265 #define flash_write32 __flash_write32
266 #define flash_write64 __flash_write64
267 #define flash_read8 __flash_read8
268 #define flash_read16 __flash_read16
269 #define flash_read32 __flash_read32
270 #define flash_read64 __flash_read64
273 /*-----------------------------------------------------------------------
275 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
276 static flash_info_t *flash_get_info(ulong base)
279 flash_info_t * info = 0;
281 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
282 info = & flash_info[i];
283 if (info->size && info->start[0] <= base &&
284 base <= info->start[0] + info->size - 1)
288 return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info;
292 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
294 if (sect != (info->sector_count - 1))
295 return info->start[sect + 1] - info->start[sect];
297 return info->start[0] + info->size - info->start[sect];
300 /*-----------------------------------------------------------------------
301 * create an address based on the offset and the port width
304 flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
306 unsigned int byte_offset = offset * info->portwidth;
308 return (void *)(info->start[sect] + byte_offset);
311 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
312 unsigned int offset, void *addr)
316 /*-----------------------------------------------------------------------
317 * make a proper sized command based on the port and chip widths
319 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
324 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
325 u32 cmd_le = cpu_to_le32(cmd);
328 uchar *cp = (uchar *) cmdbuf;
330 for (i = info->portwidth; i > 0; i--){
331 cword_offset = (info->portwidth-i)%info->chipwidth;
332 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
333 cp_offset = info->portwidth - i;
334 val = *((uchar*)&cmd_le + cword_offset);
337 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
339 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
344 /*-----------------------------------------------------------------------
347 static void print_longlong (char *str, unsigned long long data)
352 cp = (unsigned char *) &data;
353 for (i = 0; i < 8; i++)
354 sprintf (&str[i * 2], "%2.2x", *cp++);
357 static void flash_printqry (struct cfi_qry *qry)
362 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
364 for (y = 0; y < 16; y++)
365 debug("%2.2x ", p[x + y]);
367 for (y = 0; y < 16; y++) {
368 unsigned char c = p[x + y];
369 if (c >= 0x20 && c <= 0x7e)
380 /*-----------------------------------------------------------------------
381 * read a character at a port width address
383 static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
388 cp = flash_map (info, 0, offset);
389 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
390 retval = flash_read8(cp);
392 retval = flash_read8(cp + info->portwidth - 1);
394 flash_unmap (info, 0, offset, cp);
398 /*-----------------------------------------------------------------------
399 * read a word at a port width address, assume 16bit bus
401 static inline ushort flash_read_word (flash_info_t * info, uint offset)
403 ushort *addr, retval;
405 addr = flash_map (info, 0, offset);
406 retval = flash_read16 (addr);
407 flash_unmap (info, 0, offset, addr);
412 /*-----------------------------------------------------------------------
413 * read a long word by picking the least significant byte of each maximum
414 * port size word. Swap for ppc format.
416 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
425 addr = flash_map (info, sect, offset);
428 debug ("long addr is at %p info->portwidth = %d\n", addr,
430 for (x = 0; x < 4 * info->portwidth; x++) {
431 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
434 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
435 retval = ((flash_read8(addr) << 16) |
436 (flash_read8(addr + info->portwidth) << 24) |
437 (flash_read8(addr + 2 * info->portwidth)) |
438 (flash_read8(addr + 3 * info->portwidth) << 8));
440 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
441 (flash_read8(addr + info->portwidth - 1) << 16) |
442 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
443 (flash_read8(addr + 3 * info->portwidth - 1)));
445 flash_unmap(info, sect, offset, addr);
451 * Write a proper sized command to the correct address
453 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
454 uint offset, u32 cmd)
460 addr = flash_map (info, sect, offset);
461 flash_make_cmd (info, cmd, &cword);
462 switch (info->portwidth) {
464 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
465 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
466 flash_write8(cword.c, addr);
468 case FLASH_CFI_16BIT:
469 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
471 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
472 flash_write16(cword.w, addr);
474 case FLASH_CFI_32BIT:
475 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
477 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
478 flash_write32(cword.l, addr);
480 case FLASH_CFI_64BIT:
485 print_longlong (str, cword.ll);
487 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
489 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
492 flash_write64(cword.ll, addr);
496 /* Ensure all the instructions are fully finished */
499 flash_unmap(info, sect, offset, addr);
502 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
504 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
505 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
508 /*-----------------------------------------------------------------------
510 static int flash_isequal (flash_info_t * info, flash_sect_t sect,
511 uint offset, uchar cmd)
517 addr = flash_map (info, sect, offset);
518 flash_make_cmd (info, cmd, &cword);
520 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
521 switch (info->portwidth) {
523 debug ("is= %x %x\n", flash_read8(addr), cword.c);
524 retval = (flash_read8(addr) == cword.c);
526 case FLASH_CFI_16BIT:
527 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
528 retval = (flash_read16(addr) == cword.w);
530 case FLASH_CFI_32BIT:
531 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
532 retval = (flash_read32(addr) == cword.l);
534 case FLASH_CFI_64BIT:
540 print_longlong (str1, flash_read64(addr));
541 print_longlong (str2, cword.ll);
542 debug ("is= %s %s\n", str1, str2);
545 retval = (flash_read64(addr) == cword.ll);
551 flash_unmap(info, sect, offset, addr);
556 /*-----------------------------------------------------------------------
558 static int flash_isset (flash_info_t * info, flash_sect_t sect,
559 uint offset, uchar cmd)
565 addr = flash_map (info, sect, offset);
566 flash_make_cmd (info, cmd, &cword);
567 switch (info->portwidth) {
569 retval = ((flash_read8(addr) & cword.c) == cword.c);
571 case FLASH_CFI_16BIT:
572 retval = ((flash_read16(addr) & cword.w) == cword.w);
574 case FLASH_CFI_32BIT:
575 retval = ((flash_read32(addr) & cword.l) == cword.l);
577 case FLASH_CFI_64BIT:
578 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
584 flash_unmap(info, sect, offset, addr);
589 /*-----------------------------------------------------------------------
591 static int flash_toggle (flash_info_t * info, flash_sect_t sect,
592 uint offset, uchar cmd)
598 addr = flash_map (info, sect, offset);
599 flash_make_cmd (info, cmd, &cword);
600 switch (info->portwidth) {
602 retval = flash_read8(addr) != flash_read8(addr);
604 case FLASH_CFI_16BIT:
605 retval = flash_read16(addr) != flash_read16(addr);
607 case FLASH_CFI_32BIT:
608 retval = flash_read32(addr) != flash_read32(addr);
610 case FLASH_CFI_64BIT:
611 retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
612 (flash_read32(addr+4) != flash_read32(addr+4)) );
618 flash_unmap(info, sect, offset, addr);
624 * flash_is_busy - check to see if the flash is busy
626 * This routine checks the status of the chip and returns true if the
629 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
633 switch (info->vendor) {
634 case CFI_CMDSET_INTEL_PROG_REGIONS:
635 case CFI_CMDSET_INTEL_STANDARD:
636 case CFI_CMDSET_INTEL_EXTENDED:
637 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
639 case CFI_CMDSET_AMD_STANDARD:
640 case CFI_CMDSET_AMD_EXTENDED:
641 #ifdef CONFIG_FLASH_CFI_LEGACY
642 case CFI_CMDSET_AMD_LEGACY:
644 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
649 debug ("flash_is_busy: %d\n", retval);
653 /*-----------------------------------------------------------------------
654 * wait for XSR.7 to be set. Time out with an error if it does not.
655 * This routine does not set the flash to read-array mode.
657 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
658 ulong tout, char *prompt)
662 #if CONFIG_SYS_HZ != 1000
663 tout *= CONFIG_SYS_HZ/1000;
666 /* Wait for command completion */
667 start = get_timer (0);
668 while (flash_is_busy (info, sector)) {
669 if (get_timer (start) > tout) {
670 printf ("Flash %s timeout at address %lx data %lx\n",
671 prompt, info->start[sector],
672 flash_read_long (info, sector, 0));
673 flash_write_cmd (info, sector, 0, info->cmd_reset);
676 udelay (1); /* also triggers watchdog */
681 /*-----------------------------------------------------------------------
682 * Wait for XSR.7 to be set, if it times out print an error, otherwise
683 * do a full status check.
685 * This routine sets the flash to read-array mode.
687 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
688 ulong tout, char *prompt)
692 retcode = flash_status_check (info, sector, tout, prompt);
693 switch (info->vendor) {
694 case CFI_CMDSET_INTEL_PROG_REGIONS:
695 case CFI_CMDSET_INTEL_EXTENDED:
696 case CFI_CMDSET_INTEL_STANDARD:
697 if ((retcode != ERR_OK)
698 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
700 printf ("Flash %s error at address %lx\n", prompt,
701 info->start[sector]);
702 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
703 FLASH_STATUS_PSLBS)) {
704 puts ("Command Sequence Error.\n");
705 } else if (flash_isset (info, sector, 0,
706 FLASH_STATUS_ECLBS)) {
707 puts ("Block Erase Error.\n");
708 retcode = ERR_NOT_ERASED;
709 } else if (flash_isset (info, sector, 0,
710 FLASH_STATUS_PSLBS)) {
711 puts ("Locking Error\n");
713 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
714 puts ("Block locked.\n");
715 retcode = ERR_PROTECTED;
717 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
718 puts ("Vpp Low Error.\n");
720 flash_write_cmd (info, sector, 0, info->cmd_reset);
728 /*-----------------------------------------------------------------------
730 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
732 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
735 unsigned long long ll;
738 switch (info->portwidth) {
742 case FLASH_CFI_16BIT:
743 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
746 cword->w = (cword->w >> 8) | w;
748 cword->w = (cword->w << 8) | c;
751 case FLASH_CFI_32BIT:
752 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
755 cword->l = (cword->l >> 8) | l;
757 cword->l = (cword->l << 8) | c;
760 case FLASH_CFI_64BIT:
761 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
764 cword->ll = (cword->ll >> 8) | ll;
766 cword->ll = (cword->ll << 8) | c;
773 * Loop through the sector table starting from the previously found sector.
774 * Searches forwards or backwards, dependent on the passed address.
776 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
778 static flash_sect_t saved_sector = 0; /* previously found sector */
779 flash_sect_t sector = saved_sector;
781 while ((info->start[sector] < addr)
782 && (sector < info->sector_count - 1))
784 while ((info->start[sector] > addr) && (sector > 0))
786 * also decrements the sector in case of an overshot
791 saved_sector = sector;
795 /*-----------------------------------------------------------------------
797 static int flash_write_cfiword (flash_info_t * info, ulong dest,
800 void *dstaddr = (void *)dest;
802 flash_sect_t sect = 0;
805 /* Check if Flash is (sufficiently) erased */
806 switch (info->portwidth) {
808 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
810 case FLASH_CFI_16BIT:
811 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
813 case FLASH_CFI_32BIT:
814 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
816 case FLASH_CFI_64BIT:
817 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
824 return ERR_NOT_ERASED;
826 /* Disable interrupts which might cause a timeout here */
827 flag = disable_interrupts ();
829 switch (info->vendor) {
830 case CFI_CMDSET_INTEL_PROG_REGIONS:
831 case CFI_CMDSET_INTEL_EXTENDED:
832 case CFI_CMDSET_INTEL_STANDARD:
833 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
834 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
836 case CFI_CMDSET_AMD_EXTENDED:
837 case CFI_CMDSET_AMD_STANDARD:
838 #ifdef CONFIG_FLASH_CFI_LEGACY
839 case CFI_CMDSET_AMD_LEGACY:
841 sect = find_sector(info, dest);
842 flash_unlock_seq (info, sect);
843 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
848 switch (info->portwidth) {
850 flash_write8(cword.c, dstaddr);
852 case FLASH_CFI_16BIT:
853 flash_write16(cword.w, dstaddr);
855 case FLASH_CFI_32BIT:
856 flash_write32(cword.l, dstaddr);
858 case FLASH_CFI_64BIT:
859 flash_write64(cword.ll, dstaddr);
863 /* re-enable interrupts if necessary */
865 enable_interrupts ();
868 sect = find_sector (info, dest);
870 return flash_full_status_check (info, sect, info->write_tout, "write");
873 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
875 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
882 void *dst = (void *)dest;
889 switch (info->portwidth) {
893 case FLASH_CFI_16BIT:
896 case FLASH_CFI_32BIT:
899 case FLASH_CFI_64BIT:
909 while ((cnt-- > 0) && (flag == 0)) {
910 switch (info->portwidth) {
912 flag = ((flash_read8(dst2) & flash_read8(src)) ==
916 case FLASH_CFI_16BIT:
917 flag = ((flash_read16(dst2) & flash_read16(src)) ==
921 case FLASH_CFI_32BIT:
922 flag = ((flash_read32(dst2) & flash_read32(src)) ==
926 case FLASH_CFI_64BIT:
927 flag = ((flash_read64(dst2) & flash_read64(src)) ==
934 retcode = ERR_NOT_ERASED;
939 sector = find_sector (info, dest);
941 switch (info->vendor) {
942 case CFI_CMDSET_INTEL_PROG_REGIONS:
943 case CFI_CMDSET_INTEL_STANDARD:
944 case CFI_CMDSET_INTEL_EXTENDED:
945 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
946 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
947 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
948 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
949 flash_write_cmd (info, sector, 0, write_cmd);
950 retcode = flash_status_check (info, sector,
951 info->buffer_write_tout,
953 if (retcode == ERR_OK) {
954 /* reduce the number of loops by the width of
957 flash_write_cmd (info, sector, 0, cnt - 1);
959 switch (info->portwidth) {
961 flash_write8(flash_read8(src), dst);
964 case FLASH_CFI_16BIT:
965 flash_write16(flash_read16(src), dst);
968 case FLASH_CFI_32BIT:
969 flash_write32(flash_read32(src), dst);
972 case FLASH_CFI_64BIT:
973 flash_write64(flash_read64(src), dst);
981 flash_write_cmd (info, sector, 0,
982 FLASH_CMD_WRITE_BUFFER_CONFIRM);
983 retcode = flash_full_status_check (
984 info, sector, info->buffer_write_tout,
990 case CFI_CMDSET_AMD_STANDARD:
991 case CFI_CMDSET_AMD_EXTENDED:
992 flash_unlock_seq(info,0);
994 #ifdef CONFIG_FLASH_SPANSION_S29WS_N
995 offset = ((unsigned long)dst - info->start[sector]) >> shift;
997 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
999 flash_write_cmd(info, sector, offset, (uchar)cnt - 1);
1001 switch (info->portwidth) {
1002 case FLASH_CFI_8BIT:
1004 flash_write8(flash_read8(src), dst);
1008 case FLASH_CFI_16BIT:
1010 flash_write16(flash_read16(src), dst);
1014 case FLASH_CFI_32BIT:
1016 flash_write32(flash_read32(src), dst);
1020 case FLASH_CFI_64BIT:
1022 flash_write64(flash_read64(src), dst);
1027 retcode = ERR_INVAL;
1031 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1032 retcode = flash_full_status_check (info, sector,
1033 info->buffer_write_tout,
1038 debug ("Unknown Command Set\n");
1039 retcode = ERR_INVAL;
1046 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1049 /*-----------------------------------------------------------------------
1051 int flash_erase (flash_info_t * info, int s_first, int s_last)
1057 if (info->flash_id != FLASH_MAN_CFI) {
1058 puts ("Can't erase unknown flash type - aborted\n");
1061 if ((s_first < 0) || (s_first > s_last)) {
1062 puts ("- no sectors to erase\n");
1067 for (sect = s_first; sect <= s_last; ++sect) {
1068 if (info->protect[sect]) {
1073 printf ("- Warning: %d protected sectors will not be erased!\n",
1075 } else if (flash_verbose) {
1080 for (sect = s_first; sect <= s_last; sect++) {
1081 if (info->protect[sect] == 0) { /* not protected */
1082 switch (info->vendor) {
1083 case CFI_CMDSET_INTEL_PROG_REGIONS:
1084 case CFI_CMDSET_INTEL_STANDARD:
1085 case CFI_CMDSET_INTEL_EXTENDED:
1086 flash_write_cmd (info, sect, 0,
1087 FLASH_CMD_CLEAR_STATUS);
1088 flash_write_cmd (info, sect, 0,
1089 FLASH_CMD_BLOCK_ERASE);
1090 flash_write_cmd (info, sect, 0,
1091 FLASH_CMD_ERASE_CONFIRM);
1093 case CFI_CMDSET_AMD_STANDARD:
1094 case CFI_CMDSET_AMD_EXTENDED:
1095 flash_unlock_seq (info, sect);
1096 flash_write_cmd (info, sect,
1098 AMD_CMD_ERASE_START);
1099 flash_unlock_seq (info, sect);
1100 flash_write_cmd (info, sect, 0,
1101 AMD_CMD_ERASE_SECTOR);
1103 #ifdef CONFIG_FLASH_CFI_LEGACY
1104 case CFI_CMDSET_AMD_LEGACY:
1105 flash_unlock_seq (info, 0);
1106 flash_write_cmd (info, 0, info->addr_unlock1,
1107 AMD_CMD_ERASE_START);
1108 flash_unlock_seq (info, 0);
1109 flash_write_cmd (info, sect, 0,
1110 AMD_CMD_ERASE_SECTOR);
1114 debug ("Unkown flash vendor %d\n",
1119 if (flash_full_status_check
1120 (info, sect, info->erase_blk_tout, "erase")) {
1122 } else if (flash_verbose)
1133 /*-----------------------------------------------------------------------
1135 void flash_print_info (flash_info_t * info)
1139 if (info->flash_id != FLASH_MAN_CFI) {
1140 puts ("missing or unknown FLASH type\n");
1144 printf ("%s FLASH (%d x %d)",
1146 (info->portwidth << 3), (info->chipwidth << 3));
1147 if (info->size < 1024*1024)
1148 printf (" Size: %ld kB in %d Sectors\n",
1149 info->size >> 10, info->sector_count);
1151 printf (" Size: %ld MB in %d Sectors\n",
1152 info->size >> 20, info->sector_count);
1154 switch (info->vendor) {
1155 case CFI_CMDSET_INTEL_PROG_REGIONS:
1156 printf ("Intel Prog Regions");
1158 case CFI_CMDSET_INTEL_STANDARD:
1159 printf ("Intel Standard");
1161 case CFI_CMDSET_INTEL_EXTENDED:
1162 printf ("Intel Extended");
1164 case CFI_CMDSET_AMD_STANDARD:
1165 printf ("AMD Standard");
1167 case CFI_CMDSET_AMD_EXTENDED:
1168 printf ("AMD Extended");
1170 #ifdef CONFIG_FLASH_CFI_LEGACY
1171 case CFI_CMDSET_AMD_LEGACY:
1172 printf ("AMD Legacy");
1176 printf ("Unknown (%d)", info->vendor);
1179 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
1180 info->manufacturer_id, info->device_id);
1181 if (info->device_id == 0x7E) {
1182 printf("%04X", info->device_id2);
1184 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
1185 info->erase_blk_tout,
1187 if (info->buffer_size > 1) {
1188 printf (" Buffer write timeout: %ld ms, "
1189 "buffer size: %d bytes\n",
1190 info->buffer_write_tout,
1194 puts ("\n Sector Start Addresses:");
1195 for (i = 0; i < info->sector_count; ++i) {
1198 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1202 volatile unsigned long *flash;
1205 * Check if whole sector is erased
1207 size = flash_sector_size(info, i);
1209 flash = (volatile unsigned long *) info->start[i];
1210 size = size >> 2; /* divide by 4 for longword access */
1211 for (k = 0; k < size; k++) {
1212 if (*flash++ != 0xffffffff) {
1218 /* print empty and read-only info */
1219 printf (" %08lX %c %s ",
1222 info->protect[i] ? "RO" : " ");
1223 #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
1224 printf (" %08lX %s ",
1226 info->protect[i] ? "RO" : " ");
1233 /*-----------------------------------------------------------------------
1234 * This is used in a few places in write_buf() to show programming
1235 * progress. Making it a function is nasty because it needs to do side
1236 * effect updates to digit and dots. Repeated code is nasty too, so
1237 * we define it once here.
1239 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1240 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1241 if (flash_verbose) { \
1243 if ((scale > 0) && (dots <= 0)) { \
1244 if ((digit % 5) == 0) \
1245 printf ("%d", digit / 5); \
1253 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1256 /*-----------------------------------------------------------------------
1257 * Copy memory to flash, returns:
1260 * 2 - Flash not erased
1262 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
1269 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1272 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1273 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1278 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1280 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1281 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1282 CONFIG_FLASH_SHOW_PROGRESS);
1286 /* get lower aligned address */
1287 wp = (addr & ~(info->portwidth - 1));
1289 /* handle unaligned start */
1290 if ((aln = addr - wp) != 0) {
1293 for (i = 0; i < aln; ++i)
1294 flash_add_byte (info, &cword, flash_read8(p + i));
1296 for (; (i < info->portwidth) && (cnt > 0); i++) {
1297 flash_add_byte (info, &cword, *src++);
1300 for (; (cnt == 0) && (i < info->portwidth); ++i)
1301 flash_add_byte (info, &cword, flash_read8(p + i));
1303 rc = flash_write_cfiword (info, wp, cword);
1308 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1311 /* handle the aligned part */
1312 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1313 buffered_size = (info->portwidth / info->chipwidth);
1314 buffered_size *= info->buffer_size;
1315 while (cnt >= info->portwidth) {
1316 /* prohibit buffer write when buffer_size is 1 */
1317 if (info->buffer_size == 1) {
1319 for (i = 0; i < info->portwidth; i++)
1320 flash_add_byte (info, &cword, *src++);
1321 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1323 wp += info->portwidth;
1324 cnt -= info->portwidth;
1328 /* write buffer until next buffered_size aligned boundary */
1329 i = buffered_size - (wp % buffered_size);
1332 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
1334 i -= i & (info->portwidth - 1);
1338 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1341 while (cnt >= info->portwidth) {
1343 for (i = 0; i < info->portwidth; i++) {
1344 flash_add_byte (info, &cword, *src++);
1346 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1348 wp += info->portwidth;
1349 cnt -= info->portwidth;
1350 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1352 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1359 * handle unaligned tail bytes
1363 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1364 flash_add_byte (info, &cword, *src++);
1367 for (; i < info->portwidth; ++i)
1368 flash_add_byte (info, &cword, flash_read8(p + i));
1370 return flash_write_cfiword (info, wp, cword);
1373 /*-----------------------------------------------------------------------
1375 #ifdef CONFIG_SYS_FLASH_PROTECTION
1377 int flash_real_protect (flash_info_t * info, long sector, int prot)
1381 switch (info->vendor) {
1382 case CFI_CMDSET_INTEL_PROG_REGIONS:
1383 case CFI_CMDSET_INTEL_STANDARD:
1384 case CFI_CMDSET_INTEL_EXTENDED:
1385 flash_write_cmd (info, sector, 0,
1386 FLASH_CMD_CLEAR_STATUS);
1387 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1389 flash_write_cmd (info, sector, 0,
1390 FLASH_CMD_PROTECT_SET);
1392 flash_write_cmd (info, sector, 0,
1393 FLASH_CMD_PROTECT_CLEAR);
1395 case CFI_CMDSET_AMD_EXTENDED:
1396 case CFI_CMDSET_AMD_STANDARD:
1397 /* U-Boot only checks the first byte */
1398 if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
1400 flash_unlock_seq (info, 0);
1401 flash_write_cmd (info, 0,
1403 ATM_CMD_SOFTLOCK_START);
1404 flash_unlock_seq (info, 0);
1405 flash_write_cmd (info, sector, 0,
1408 flash_write_cmd (info, 0,
1410 AMD_CMD_UNLOCK_START);
1411 if (info->device_id == ATM_ID_BV6416)
1412 flash_write_cmd (info, sector,
1413 0, ATM_CMD_UNLOCK_SECT);
1417 #ifdef CONFIG_FLASH_CFI_LEGACY
1418 case CFI_CMDSET_AMD_LEGACY:
1419 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1420 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1422 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1424 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1429 flash_full_status_check (info, sector, info->erase_blk_tout,
1430 prot ? "protect" : "unprotect")) == 0) {
1432 info->protect[sector] = prot;
1435 * On some of Intel's flash chips (marked via legacy_unlock)
1436 * unprotect unprotects all locking.
1438 if ((prot == 0) && (info->legacy_unlock)) {
1441 for (i = 0; i < info->sector_count; i++) {
1442 if (info->protect[i])
1443 flash_real_protect (info, i, 1);
1450 /*-----------------------------------------------------------------------
1451 * flash_read_user_serial - read the OneTimeProgramming cells
1453 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1460 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
1461 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1462 memcpy (dst, src + offset, len);
1463 flash_write_cmd (info, 0, 0, info->cmd_reset);
1464 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1468 * flash_read_factory_serial - read the device Id from the protection area
1470 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1475 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1476 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1477 memcpy (buffer, src + offset, len);
1478 flash_write_cmd (info, 0, 0, info->cmd_reset);
1479 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1482 #endif /* CONFIG_SYS_FLASH_PROTECTION */
1484 /*-----------------------------------------------------------------------
1485 * Reverse the order of the erase regions in the CFI QRY structure.
1486 * This is needed for chips that are either a) correctly detected as
1487 * top-boot, or b) buggy.
1489 static void cfi_reverse_geometry(struct cfi_qry *qry)
1494 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1495 tmp = qry->erase_region_info[i];
1496 qry->erase_region_info[i] = qry->erase_region_info[j];
1497 qry->erase_region_info[j] = tmp;
1501 /*-----------------------------------------------------------------------
1502 * read jedec ids from device and set corresponding fields in info struct
1504 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1507 static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1509 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1510 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1511 udelay(1000); /* some flash are slow to respond */
1512 info->manufacturer_id = flash_read_uchar (info,
1513 FLASH_OFFSET_MANUFACTURER_ID);
1514 info->device_id = flash_read_uchar (info,
1515 FLASH_OFFSET_DEVICE_ID);
1516 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1519 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1521 info->cmd_reset = FLASH_CMD_RESET;
1523 cmdset_intel_read_jedec_ids(info);
1524 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1526 #ifdef CONFIG_SYS_FLASH_PROTECTION
1527 /* read legacy lock/unlock bit from intel flash */
1528 if (info->ext_addr) {
1529 info->legacy_unlock = flash_read_uchar (info,
1530 info->ext_addr + 5) & 0x08;
1537 static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1539 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1540 flash_unlock_seq(info, 0);
1541 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1542 udelay(1000); /* some flash are slow to respond */
1544 info->manufacturer_id = flash_read_uchar (info,
1545 FLASH_OFFSET_MANUFACTURER_ID);
1547 switch (info->chipwidth){
1548 case FLASH_CFI_8BIT:
1549 info->device_id = flash_read_uchar (info,
1550 FLASH_OFFSET_DEVICE_ID);
1551 if (info->device_id == 0x7E) {
1552 /* AMD 3-byte (expanded) device ids */
1553 info->device_id2 = flash_read_uchar (info,
1554 FLASH_OFFSET_DEVICE_ID2);
1555 info->device_id2 <<= 8;
1556 info->device_id2 |= flash_read_uchar (info,
1557 FLASH_OFFSET_DEVICE_ID3);
1560 case FLASH_CFI_16BIT:
1561 info->device_id = flash_read_word (info,
1562 FLASH_OFFSET_DEVICE_ID);
1567 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1570 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1572 info->cmd_reset = AMD_CMD_RESET;
1574 cmdset_amd_read_jedec_ids(info);
1575 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1580 #ifdef CONFIG_FLASH_CFI_LEGACY
1581 static void flash_read_jedec_ids (flash_info_t * info)
1583 info->manufacturer_id = 0;
1584 info->device_id = 0;
1585 info->device_id2 = 0;
1587 switch (info->vendor) {
1588 case CFI_CMDSET_INTEL_PROG_REGIONS:
1589 case CFI_CMDSET_INTEL_STANDARD:
1590 case CFI_CMDSET_INTEL_EXTENDED:
1591 cmdset_intel_read_jedec_ids(info);
1593 case CFI_CMDSET_AMD_STANDARD:
1594 case CFI_CMDSET_AMD_EXTENDED:
1595 cmdset_amd_read_jedec_ids(info);
1602 /*-----------------------------------------------------------------------
1603 * Call board code to request info about non-CFI flash.
1604 * board_flash_get_legacy needs to fill in at least:
1605 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1607 static int flash_detect_legacy(phys_addr_t base, int banknum)
1609 flash_info_t *info = &flash_info[banknum];
1611 if (board_flash_get_legacy(base, banknum, info)) {
1612 /* board code may have filled info completely. If not, we
1613 use JEDEC ID probing. */
1614 if (!info->vendor) {
1616 CFI_CMDSET_AMD_STANDARD,
1617 CFI_CMDSET_INTEL_STANDARD
1621 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1622 info->vendor = modes[i];
1624 (ulong)map_physmem(base,
1627 if (info->portwidth == FLASH_CFI_8BIT
1628 && info->interface == FLASH_CFI_X8X16) {
1629 info->addr_unlock1 = 0x2AAA;
1630 info->addr_unlock2 = 0x5555;
1632 info->addr_unlock1 = 0x5555;
1633 info->addr_unlock2 = 0x2AAA;
1635 flash_read_jedec_ids(info);
1636 debug("JEDEC PROBE: ID %x %x %x\n",
1637 info->manufacturer_id,
1640 if (jedec_flash_match(info, info->start[0]))
1643 unmap_physmem(info->start[0],
1648 switch(info->vendor) {
1649 case CFI_CMDSET_INTEL_PROG_REGIONS:
1650 case CFI_CMDSET_INTEL_STANDARD:
1651 case CFI_CMDSET_INTEL_EXTENDED:
1652 info->cmd_reset = FLASH_CMD_RESET;
1654 case CFI_CMDSET_AMD_STANDARD:
1655 case CFI_CMDSET_AMD_EXTENDED:
1656 case CFI_CMDSET_AMD_LEGACY:
1657 info->cmd_reset = AMD_CMD_RESET;
1660 info->flash_id = FLASH_MAN_CFI;
1663 return 0; /* use CFI */
1666 static inline int flash_detect_legacy(phys_addr_t base, int banknum)
1668 return 0; /* use CFI */
1672 /*-----------------------------------------------------------------------
1673 * detect if flash is compatible with the Common Flash Interface (CFI)
1674 * http://www.jedec.org/download/search/jesd68.pdf
1676 static void flash_read_cfi (flash_info_t *info, void *buf,
1677 unsigned int start, size_t len)
1682 for (i = 0; i < len; i++)
1683 p[i] = flash_read_uchar(info, start + i);
1686 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1690 /* We do not yet know what kind of commandset to use, so we issue
1691 the reset command in both Intel and AMD variants, in the hope
1692 that AMD flash roms ignore the Intel command. */
1693 flash_write_cmd (info, 0, 0, AMD_CMD_RESET);
1694 flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
1697 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1699 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1701 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1702 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1703 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1704 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1705 sizeof(struct cfi_qry));
1706 info->interface = le16_to_cpu(qry->interface_desc);
1708 info->cfi_offset = flash_offset_cfi[cfi_offset];
1709 debug ("device interface is %d\n",
1711 debug ("found port %d chip %d ",
1712 info->portwidth, info->chipwidth);
1713 debug ("port %d bits chip %d bits\n",
1714 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1715 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1717 /* calculate command offsets as in the Linux driver */
1718 info->addr_unlock1 = 0x555;
1719 info->addr_unlock2 = 0x2aa;
1722 * modify the unlock address if we are
1723 * in compatibility mode
1725 if ( /* x8/x16 in x8 mode */
1726 ((info->chipwidth == FLASH_CFI_BY8) &&
1727 (info->interface == FLASH_CFI_X8X16)) ||
1728 /* x16/x32 in x16 mode */
1729 ((info->chipwidth == FLASH_CFI_BY16) &&
1730 (info->interface == FLASH_CFI_X16X32)))
1732 info->addr_unlock1 = 0xaaa;
1733 info->addr_unlock2 = 0x555;
1736 info->name = "CFI conformant";
1744 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1746 debug ("flash detect cfi\n");
1748 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
1749 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1750 for (info->chipwidth = FLASH_CFI_BY8;
1751 info->chipwidth <= info->portwidth;
1752 info->chipwidth <<= 1)
1753 if (__flash_detect_cfi(info, qry))
1756 debug ("not found\n");
1761 * Manufacturer-specific quirks. Add workarounds for geometry
1762 * reversal, etc. here.
1764 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1766 /* check if flash geometry needs reversal */
1767 if (qry->num_erase_regions > 1) {
1768 /* reverse geometry if top boot part */
1769 if (info->cfi_version < 0x3131) {
1770 /* CFI < 1.1, try to guess from device id */
1771 if ((info->device_id & 0x80) != 0)
1772 cfi_reverse_geometry(qry);
1773 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1774 /* CFI >= 1.1, deduct from top/bottom flag */
1775 /* note: ext_addr is valid since cfi_version > 0 */
1776 cfi_reverse_geometry(qry);
1781 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1783 int reverse_geometry = 0;
1785 /* Check the "top boot" bit in the PRI */
1786 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1787 reverse_geometry = 1;
1789 /* AT49BV6416(T) list the erase regions in the wrong order.
1790 * However, the device ID is identical with the non-broken
1791 * AT49BV642D since u-boot only reads the low byte (they
1792 * differ in the high byte.) So leave out this fixup for now.
1795 if (info->device_id == 0xd6 || info->device_id == 0xd2)
1796 reverse_geometry = !reverse_geometry;
1799 if (reverse_geometry)
1800 cfi_reverse_geometry(qry);
1803 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
1805 /* check if flash geometry needs reversal */
1806 if (qry->num_erase_regions > 1) {
1807 /* reverse geometry if top boot part */
1808 if (info->cfi_version < 0x3131) {
1809 /* CFI < 1.1, guess by device id (only M29W320ET now) */
1810 if (info->device_id == 0x2256) {
1811 cfi_reverse_geometry(qry);
1818 * The following code cannot be run from FLASH!
1821 ulong flash_get_size (phys_addr_t base, int banknum)
1823 flash_info_t *info = &flash_info[banknum];
1825 flash_sect_t sect_cnt;
1829 uchar num_erase_regions;
1830 int erase_region_size;
1831 int erase_region_count;
1834 memset(&qry, 0, sizeof(qry));
1837 info->cfi_version = 0;
1838 #ifdef CONFIG_SYS_FLASH_PROTECTION
1839 info->legacy_unlock = 0;
1842 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
1844 if (flash_detect_cfi (info, &qry)) {
1845 info->vendor = le16_to_cpu(qry.p_id);
1846 info->ext_addr = le16_to_cpu(qry.p_adr);
1847 num_erase_regions = qry.num_erase_regions;
1849 if (info->ext_addr) {
1850 info->cfi_version = (ushort) flash_read_uchar (info,
1851 info->ext_addr + 3) << 8;
1852 info->cfi_version |= (ushort) flash_read_uchar (info,
1853 info->ext_addr + 4);
1857 flash_printqry (&qry);
1860 switch (info->vendor) {
1861 case CFI_CMDSET_INTEL_PROG_REGIONS:
1862 case CFI_CMDSET_INTEL_STANDARD:
1863 case CFI_CMDSET_INTEL_EXTENDED:
1864 cmdset_intel_init(info, &qry);
1866 case CFI_CMDSET_AMD_STANDARD:
1867 case CFI_CMDSET_AMD_EXTENDED:
1868 cmdset_amd_init(info, &qry);
1871 printf("CFI: Unknown command set 0x%x\n",
1874 * Unfortunately, this means we don't know how
1875 * to get the chip back to Read mode. Might
1876 * as well try an Intel-style reset...
1878 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1882 /* Do manufacturer-specific fixups */
1883 switch (info->manufacturer_id) {
1885 flash_fixup_amd(info, &qry);
1888 flash_fixup_atmel(info, &qry);
1891 flash_fixup_stm(info, &qry);
1895 debug ("manufacturer is %d\n", info->vendor);
1896 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1897 debug ("device id is 0x%x\n", info->device_id);
1898 debug ("device id2 is 0x%x\n", info->device_id2);
1899 debug ("cfi version is 0x%04x\n", info->cfi_version);
1901 size_ratio = info->portwidth / info->chipwidth;
1902 /* if the chip is x8/x16 reduce the ratio by half */
1903 if ((info->interface == FLASH_CFI_X8X16)
1904 && (info->chipwidth == FLASH_CFI_BY8)) {
1907 debug ("size_ratio %d port %d bits chip %d bits\n",
1908 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1909 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1910 debug ("found %d erase regions\n", num_erase_regions);
1913 for (i = 0; i < num_erase_regions; i++) {
1914 if (i > NUM_ERASE_REGIONS) {
1915 printf ("%d erase regions found, only %d used\n",
1916 num_erase_regions, NUM_ERASE_REGIONS);
1920 tmp = le32_to_cpu(qry.erase_region_info[i]);
1921 debug("erase region %u: 0x%08lx\n", i, tmp);
1923 erase_region_count = (tmp & 0xffff) + 1;
1926 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1927 debug ("erase_region_count = %d erase_region_size = %d\n",
1928 erase_region_count, erase_region_size);
1929 for (j = 0; j < erase_region_count; j++) {
1930 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
1931 printf("ERROR: too many flash sectors\n");
1934 info->start[sect_cnt] =
1935 (ulong)map_physmem(sector,
1938 sector += (erase_region_size * size_ratio);
1941 * Only read protection status from
1942 * supported devices (intel...)
1944 switch (info->vendor) {
1945 case CFI_CMDSET_INTEL_PROG_REGIONS:
1946 case CFI_CMDSET_INTEL_EXTENDED:
1947 case CFI_CMDSET_INTEL_STANDARD:
1948 info->protect[sect_cnt] =
1949 flash_isset (info, sect_cnt,
1950 FLASH_OFFSET_PROTECT,
1951 FLASH_STATUS_PROTECT);
1954 /* default: not protected */
1955 info->protect[sect_cnt] = 0;
1962 info->sector_count = sect_cnt;
1963 info->size = 1 << qry.dev_size;
1964 /* multiply the size by the number of chips */
1965 info->size *= size_ratio;
1966 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
1967 tmp = 1 << qry.block_erase_timeout_typ;
1968 info->erase_blk_tout = tmp *
1969 (1 << qry.block_erase_timeout_max);
1970 tmp = (1 << qry.buf_write_timeout_typ) *
1971 (1 << qry.buf_write_timeout_max);
1973 /* round up when converting to ms */
1974 info->buffer_write_tout = (tmp + 999) / 1000;
1975 tmp = (1 << qry.word_write_timeout_typ) *
1976 (1 << qry.word_write_timeout_max);
1977 /* round up when converting to ms */
1978 info->write_tout = (tmp + 999) / 1000;
1979 info->flash_id = FLASH_MAN_CFI;
1980 if ((info->interface == FLASH_CFI_X8X16) &&
1981 (info->chipwidth == FLASH_CFI_BY8)) {
1982 /* XXX - Need to test on x8/x16 in parallel. */
1983 info->portwidth >>= 1;
1986 flash_write_cmd (info, 0, 0, info->cmd_reset);
1989 return (info->size);
1992 void flash_set_verbose(uint v)
1997 /*-----------------------------------------------------------------------
1999 unsigned long flash_init (void)
2001 unsigned long size = 0;
2003 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2007 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2010 #ifdef CONFIG_SYS_FLASH_PROTECTION
2011 char *s = getenv("unlock");
2014 #define BANK_BASE(i) (((phys_addr_t [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i])
2016 /* Init: no FLASHes known */
2017 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
2018 flash_info[i].flash_id = FLASH_UNKNOWN;
2020 if (!flash_detect_legacy (BANK_BASE(i), i))
2021 flash_get_size (BANK_BASE(i), i);
2022 size += flash_info[i].size;
2023 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
2024 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
2025 printf ("## Unknown FLASH on Bank %d "
2026 "- Size = 0x%08lx = %ld MB\n",
2027 i+1, flash_info[i].size,
2028 flash_info[i].size << 20);
2029 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
2031 #ifdef CONFIG_SYS_FLASH_PROTECTION
2032 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
2034 * Only the U-Boot image and it's environment
2035 * is protected, all other sectors are
2036 * unprotected (unlocked) if flash hardware
2037 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
2038 * and the environment variable "unlock" is
2041 if (flash_info[i].legacy_unlock) {
2045 * Disable legacy_unlock temporarily,
2046 * since flash_real_protect would
2047 * relock all other sectors again
2050 flash_info[i].legacy_unlock = 0;
2053 * Legacy unlocking (e.g. Intel J3) ->
2054 * unlock only one sector. This will
2055 * unlock all sectors.
2057 flash_real_protect (&flash_info[i], 0, 0);
2059 flash_info[i].legacy_unlock = 1;
2062 * Manually mark other sectors as
2063 * unlocked (unprotected)
2065 for (k = 1; k < flash_info[i].sector_count; k++)
2066 flash_info[i].protect[k] = 0;
2069 * No legancy unlocking -> unlock all sectors
2071 flash_protect (FLAG_PROTECT_CLEAR,
2072 flash_info[i].start[0],
2073 flash_info[i].start[0]
2074 + flash_info[i].size - 1,
2078 #endif /* CONFIG_SYS_FLASH_PROTECTION */
2081 /* Monitor protection ON by default */
2082 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
2083 flash_protect (FLAG_PROTECT_SET,
2084 CONFIG_SYS_MONITOR_BASE,
2085 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2086 flash_get_info(CONFIG_SYS_MONITOR_BASE));
2089 /* Environment protection ON by default */
2090 #ifdef CONFIG_ENV_IS_IN_FLASH
2091 flash_protect (FLAG_PROTECT_SET,
2093 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2094 flash_get_info(CONFIG_ENV_ADDR));
2097 /* Redundant environment protection ON by default */
2098 #ifdef CONFIG_ENV_ADDR_REDUND
2099 flash_protect (FLAG_PROTECT_SET,
2100 CONFIG_ENV_ADDR_REDUND,
2101 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1,
2102 flash_get_info(CONFIG_ENV_ADDR_REDUND));
2105 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2106 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
2107 debug("autoprotecting from %08x to %08x\n",
2108 apl[i].start, apl[i].start + apl[i].size - 1);
2109 flash_protect (FLAG_PROTECT_SET,
2111 apl[i].start + apl[i].size - 1,
2112 flash_get_info(apl[i].start));
2116 #ifdef CONFIG_FLASH_CFI_MTD