2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
12 * Tolunay Orkun <listmember@orkun.us>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 /* The DEBUG define must be before common to enable debugging */
38 #include <asm/processor.h>
40 #include <asm/byteorder.h>
41 #include <environment.h>
42 #ifdef CFG_FLASH_CFI_DRIVER
45 * This file implements a Common Flash Interface (CFI) driver for
48 * The width of the port and the width of the chips are determined at
49 * initialization. These widths are used to calculate the address for
50 * access CFI data structures.
53 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
57 * AMD CFI Specification, Release 2.0 December 1, 2001
58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
61 * Define CFG_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
62 * reading and writing ... (yes there is such a Hardware).
65 #ifndef CFG_FLASH_BANKS_LIST
66 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
69 #define FLASH_CMD_CFI 0x98
70 #define FLASH_CMD_READ_ID 0x90
71 #define FLASH_CMD_RESET 0xff
72 #define FLASH_CMD_BLOCK_ERASE 0x20
73 #define FLASH_CMD_ERASE_CONFIRM 0xD0
74 #define FLASH_CMD_WRITE 0x40
75 #define FLASH_CMD_PROTECT 0x60
76 #define FLASH_CMD_PROTECT_SET 0x01
77 #define FLASH_CMD_PROTECT_CLEAR 0xD0
78 #define FLASH_CMD_CLEAR_STATUS 0x50
79 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
80 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
82 #define FLASH_STATUS_DONE 0x80
83 #define FLASH_STATUS_ESS 0x40
84 #define FLASH_STATUS_ECLBS 0x20
85 #define FLASH_STATUS_PSLBS 0x10
86 #define FLASH_STATUS_VPENS 0x08
87 #define FLASH_STATUS_PSS 0x04
88 #define FLASH_STATUS_DPS 0x02
89 #define FLASH_STATUS_R 0x01
90 #define FLASH_STATUS_PROTECT 0x01
92 #define AMD_CMD_RESET 0xF0
93 #define AMD_CMD_WRITE 0xA0
94 #define AMD_CMD_ERASE_START 0x80
95 #define AMD_CMD_ERASE_SECTOR 0x30
96 #define AMD_CMD_UNLOCK_START 0xAA
97 #define AMD_CMD_UNLOCK_ACK 0x55
98 #define AMD_CMD_WRITE_TO_BUFFER 0x25
99 #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
101 #define AMD_STATUS_TOGGLE 0x40
102 #define AMD_STATUS_ERROR 0x20
104 #define FLASH_OFFSET_MANUFACTURER_ID 0x00
105 #define FLASH_OFFSET_DEVICE_ID 0x01
106 #define FLASH_OFFSET_DEVICE_ID2 0x0E
107 #define FLASH_OFFSET_DEVICE_ID3 0x0F
108 #define FLASH_OFFSET_CFI 0x55
109 #define FLASH_OFFSET_CFI_ALT 0x555
110 #define FLASH_OFFSET_CFI_RESP 0x10
111 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13
112 /* extended query table primary address */
113 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15
114 #define FLASH_OFFSET_WTOUT 0x1F
115 #define FLASH_OFFSET_WBTOUT 0x20
116 #define FLASH_OFFSET_ETOUT 0x21
117 #define FLASH_OFFSET_CETOUT 0x22
118 #define FLASH_OFFSET_WMAX_TOUT 0x23
119 #define FLASH_OFFSET_WBMAX_TOUT 0x24
120 #define FLASH_OFFSET_EMAX_TOUT 0x25
121 #define FLASH_OFFSET_CEMAX_TOUT 0x26
122 #define FLASH_OFFSET_SIZE 0x27
123 #define FLASH_OFFSET_INTERFACE 0x28
124 #define FLASH_OFFSET_BUFFER_SIZE 0x2A
125 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
126 #define FLASH_OFFSET_ERASE_REGIONS 0x2D
127 #define FLASH_OFFSET_PROTECT 0x02
128 #define FLASH_OFFSET_USER_PROTECTION 0x85
129 #define FLASH_OFFSET_INTEL_PROTECTION 0x81
131 #define CFI_CMDSET_NONE 0
132 #define CFI_CMDSET_INTEL_EXTENDED 1
133 #define CFI_CMDSET_AMD_STANDARD 2
134 #define CFI_CMDSET_INTEL_STANDARD 3
135 #define CFI_CMDSET_AMD_EXTENDED 4
136 #define CFI_CMDSET_MITSU_STANDARD 256
137 #define CFI_CMDSET_MITSU_EXTENDED 257
138 #define CFI_CMDSET_SST 258
140 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
141 # undef FLASH_CMD_RESET
142 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
149 unsigned long long ll;
152 #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
154 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
156 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
157 #ifdef CFG_MAX_FLASH_BANKS_DETECT
158 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
159 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT]; /* FLASH chips info */
161 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
162 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */
166 * Check if chip width is defined. If not, start detecting with 8bit.
168 #ifndef CFG_FLASH_CFI_WIDTH
169 #define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT
172 typedef unsigned long flash_sect_t;
174 static void flash_write8(u8 value, void *addr)
176 __raw_writeb(value, addr);
179 static void flash_write16(u16 value, void *addr)
181 __raw_writew(value, addr);
184 static void flash_write32(u32 value, void *addr)
186 __raw_writel(value, addr);
189 static void flash_write64(u64 value, void *addr)
191 /* No architectures currently implement __raw_writeq() */
192 *(volatile u64 *)addr = value;
195 static u8 flash_read8(void *addr)
197 return __raw_readb(addr);
200 static u16 flash_read16(void *addr)
202 return __raw_readw(addr);
205 static u32 flash_read32(void *addr)
207 return __raw_readl(addr);
210 static u64 flash_read64(void *addr)
212 /* No architectures currently implement __raw_readq() */
213 return *(volatile u64 *)addr;
216 /*-----------------------------------------------------------------------
218 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
219 static flash_info_t *flash_get_info(ulong base)
222 flash_info_t * info = 0;
224 for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
225 info = & flash_info[i];
226 if (info->size && info->start[0] <= base &&
227 base <= info->start[0] + info->size - 1)
231 return i == CFG_MAX_FLASH_BANKS ? 0 : info;
235 /*-----------------------------------------------------------------------
236 * create an address based on the offset and the port width
238 static inline uchar *
239 flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
241 return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
244 /*-----------------------------------------------------------------------
245 * make a proper sized command based on the port and chip widths
247 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
250 uchar *cp = (uchar *) cmdbuf;
252 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
253 for (i = info->portwidth; i > 0; i--)
255 for (i = 1; i <= info->portwidth; i++)
257 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
261 /*-----------------------------------------------------------------------
264 static void print_longlong (char *str, unsigned long long data)
269 cp = (unsigned char *) &data;
270 for (i = 0; i < 8; i++)
271 sprintf (&str[i * 2], "%2.2x", *cp++);
274 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
279 for (x = 0; x < 0x40; x += 16U / info->portwidth) {
280 addr = flash_make_addr (info, sect,
281 x + FLASH_OFFSET_CFI_RESP);
282 debug ("%p : ", addr);
283 for (y = 0; y < 16; y++) {
284 debug ("%2.2x ", flash_read8(addr + y));
287 for (y = 0; y < 16; y++) {
288 unsigned char c = flash_read8(addr + y);
289 if (c >= 0x20 && c <= 0x7e) {
301 /*-----------------------------------------------------------------------
302 * read a character at a port width address
304 static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
308 cp = flash_make_addr (info, 0, offset);
309 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
312 return (cp[info->portwidth - 1]);
316 /*-----------------------------------------------------------------------
317 * read a short word by swapping for ppc format.
319 static ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect,
328 addr = flash_make_addr (info, sect, offset);
331 debug ("ushort addr is at %p info->portwidth = %d\n", addr,
333 for (x = 0; x < 2 * info->portwidth; x++) {
334 debug ("addr[%x] = 0x%x\n", x, addr[x]);
337 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
338 retval = ((addr[(info->portwidth)] << 8) | addr[0]);
340 retval = ((addr[(2 * info->portwidth) - 1] << 8) |
341 addr[info->portwidth - 1]);
344 debug ("retval = 0x%x\n", retval);
348 /*-----------------------------------------------------------------------
349 * read a long word by picking the least significant byte of each maximum
350 * port size word. Swap for ppc format.
352 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
361 addr = flash_make_addr (info, sect, offset);
364 debug ("long addr is at %p info->portwidth = %d\n", addr,
366 for (x = 0; x < 4 * info->portwidth; x++) {
367 debug ("addr[%x] = 0x%x\n", x, addr[x]);
370 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
371 retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
372 (addr[(2 * info->portwidth)]) |
373 (addr[(3 * info->portwidth)] << 8);
375 retval = (addr[(2 * info->portwidth) - 1] << 24) |
376 (addr[(info->portwidth) - 1] << 16) |
377 (addr[(4 * info->portwidth) - 1] << 8) |
378 addr[(3 * info->portwidth) - 1];
384 * Write a proper sized command to the correct address
386 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
387 uint offset, uchar cmd)
393 addr = flash_make_addr (info, sect, offset);
394 flash_make_cmd (info, cmd, &cword);
395 switch (info->portwidth) {
397 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
398 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
399 flash_write8(cword.c, addr);
401 case FLASH_CFI_16BIT:
402 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
404 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
405 flash_write16(cword.w, addr);
407 case FLASH_CFI_32BIT:
408 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
410 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
411 flash_write32(cword.l, addr);
413 case FLASH_CFI_64BIT:
418 print_longlong (str, cword.ll);
420 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
422 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
425 flash_write64(cword.ll, addr);
429 /* Ensure all the instructions are fully finished */
433 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
435 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
436 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
439 /*-----------------------------------------------------------------------
441 static int flash_isequal (flash_info_t * info, flash_sect_t sect,
442 uint offset, uchar cmd)
448 addr = flash_make_addr (info, sect, offset);
449 flash_make_cmd (info, cmd, &cword);
451 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
452 switch (info->portwidth) {
454 debug ("is= %x %x\n", flash_read8(addr), cword.c);
455 retval = (flash_read8(addr) == cword.c);
457 case FLASH_CFI_16BIT:
458 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
459 retval = (flash_read16(addr) == cword.w);
461 case FLASH_CFI_32BIT:
462 debug ("is= %8.8lx %8.8lx\n", flash_read32(addr), cword.l);
463 retval = (flash_read32(addr) == cword.l);
465 case FLASH_CFI_64BIT:
471 print_longlong (str1, flash_read64(addr));
472 print_longlong (str2, cword.ll);
473 debug ("is= %s %s\n", str1, str2);
476 retval = (flash_read64(addr) == cword.ll);
485 /*-----------------------------------------------------------------------
487 static int flash_isset (flash_info_t * info, flash_sect_t sect,
488 uint offset, uchar cmd)
494 addr = flash_make_addr (info, sect, offset);
495 flash_make_cmd (info, cmd, &cword);
496 switch (info->portwidth) {
498 retval = ((flash_read8(addr) & cword.c) == cword.c);
500 case FLASH_CFI_16BIT:
501 retval = ((flash_read16(addr) & cword.w) == cword.w);
503 case FLASH_CFI_32BIT:
504 retval = ((flash_read16(addr) & cword.l) == cword.l);
506 case FLASH_CFI_64BIT:
507 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
516 /*-----------------------------------------------------------------------
518 static int flash_toggle (flash_info_t * info, flash_sect_t sect,
519 uint offset, uchar cmd)
525 addr = flash_make_addr (info, sect, offset);
526 flash_make_cmd (info, cmd, &cword);
527 switch (info->portwidth) {
529 retval = ((flash_read8(addr) & cword.c) !=
530 (flash_read8(addr) & cword.c));
532 case FLASH_CFI_16BIT:
533 retval = ((flash_read16(addr) & cword.w) !=
534 (flash_read16(addr) & cword.w));
536 case FLASH_CFI_32BIT:
537 retval = ((flash_read32(addr) & cword.l) !=
538 (flash_read32(addr) & cword.l));
540 case FLASH_CFI_64BIT:
541 retval = ((flash_read64(addr) & cword.ll) !=
542 (flash_read64(addr) & cword.ll));
552 * flash_is_busy - check to see if the flash is busy
554 * This routine checks the status of the chip and returns true if the
557 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
561 switch (info->vendor) {
562 case CFI_CMDSET_INTEL_STANDARD:
563 case CFI_CMDSET_INTEL_EXTENDED:
564 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
566 case CFI_CMDSET_AMD_STANDARD:
567 case CFI_CMDSET_AMD_EXTENDED:
568 #ifdef CONFIG_FLASH_CFI_LEGACY
569 case CFI_CMDSET_AMD_LEGACY:
571 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
576 debug ("flash_is_busy: %d\n", retval);
580 /*-----------------------------------------------------------------------
581 * wait for XSR.7 to be set. Time out with an error if it does not.
582 * This routine does not set the flash to read-array mode.
584 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
585 ulong tout, char *prompt)
593 /* Wait for command completion */
594 start = get_timer (0);
595 while (flash_is_busy (info, sector)) {
596 if (get_timer (start) > tout) {
597 printf ("Flash %s timeout at address %lx data %lx\n",
598 prompt, info->start[sector],
599 flash_read_long (info, sector, 0));
600 flash_write_cmd (info, sector, 0, info->cmd_reset);
603 udelay (1); /* also triggers watchdog */
608 /*-----------------------------------------------------------------------
609 * Wait for XSR.7 to be set, if it times out print an error, otherwise
610 * do a full status check.
612 * This routine sets the flash to read-array mode.
614 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
615 ulong tout, char *prompt)
619 retcode = flash_status_check (info, sector, tout, prompt);
620 switch (info->vendor) {
621 case CFI_CMDSET_INTEL_EXTENDED:
622 case CFI_CMDSET_INTEL_STANDARD:
623 if ((retcode == ERR_OK)
624 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
626 printf ("Flash %s error at address %lx\n", prompt,
627 info->start[sector]);
628 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
629 FLASH_STATUS_PSLBS)) {
630 puts ("Command Sequence Error.\n");
631 } else if (flash_isset (info, sector, 0,
632 FLASH_STATUS_ECLBS)) {
633 puts ("Block Erase Error.\n");
634 retcode = ERR_NOT_ERASED;
635 } else if (flash_isset (info, sector, 0,
636 FLASH_STATUS_PSLBS)) {
637 puts ("Locking Error\n");
639 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
640 puts ("Block locked.\n");
641 retcode = ERR_PROTECTED;
643 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
644 puts ("Vpp Low Error.\n");
646 flash_write_cmd (info, sector, 0, info->cmd_reset);
654 /*-----------------------------------------------------------------------
656 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
658 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
661 unsigned long long ll;
664 switch (info->portwidth) {
668 case FLASH_CFI_16BIT:
669 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
672 cword->w = (cword->w >> 8) | w;
674 cword->w = (cword->w << 8) | c;
677 case FLASH_CFI_32BIT:
678 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
681 cword->l = (cword->l >> 8) | l;
683 cword->l = (cword->l << 8) | c;
686 case FLASH_CFI_64BIT:
687 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
690 cword->ll = (cword->ll >> 8) | ll;
692 cword->ll = (cword->ll << 8) | c;
698 /* loop through the sectors from the highest address when the passed
699 * address is greater or equal to the sector address we have a match
701 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
705 for (sector = info->sector_count - 1; sector >= 0; sector--) {
706 if (addr >= info->start[sector])
712 /*-----------------------------------------------------------------------
714 static int flash_write_cfiword (flash_info_t * info, ulong dest,
721 ctladdr = flash_make_addr (info, 0, 0);
722 dstaddr = (uchar *)dest;
724 /* Check if Flash is (sufficiently) erased */
725 switch (info->portwidth) {
727 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
729 case FLASH_CFI_16BIT:
730 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
732 case FLASH_CFI_32BIT:
733 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
735 case FLASH_CFI_64BIT:
736 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
744 /* Disable interrupts which might cause a timeout here */
745 flag = disable_interrupts ();
747 switch (info->vendor) {
748 case CFI_CMDSET_INTEL_EXTENDED:
749 case CFI_CMDSET_INTEL_STANDARD:
750 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
751 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
753 case CFI_CMDSET_AMD_EXTENDED:
754 case CFI_CMDSET_AMD_STANDARD:
755 #ifdef CONFIG_FLASH_CFI_LEGACY
756 case CFI_CMDSET_AMD_LEGACY:
758 flash_unlock_seq (info, 0);
759 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
763 switch (info->portwidth) {
765 flash_write8(cword.c, dstaddr);
767 case FLASH_CFI_16BIT:
768 flash_write16(cword.w, dstaddr);
770 case FLASH_CFI_32BIT:
771 flash_write32(cword.l, dstaddr);
773 case FLASH_CFI_64BIT:
774 flash_write64(cword.ll, dstaddr);
778 /* re-enable interrupts if necessary */
780 enable_interrupts ();
782 return flash_full_status_check (info, find_sector (info, dest),
783 info->write_tout, "write");
786 #ifdef CFG_FLASH_USE_BUFFER_WRITE
788 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
795 void *dst = (void *)dest;
797 sector = find_sector (info, dest);
799 switch (info->vendor) {
800 case CFI_CMDSET_INTEL_STANDARD:
801 case CFI_CMDSET_INTEL_EXTENDED:
802 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
803 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
804 retcode = flash_status_check (info, sector,
805 info->buffer_write_tout,
807 if (retcode == ERR_OK) {
808 /* reduce the number of loops by the width of
810 switch (info->portwidth) {
814 case FLASH_CFI_16BIT:
817 case FLASH_CFI_32BIT:
820 case FLASH_CFI_64BIT:
827 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
829 switch (info->portwidth) {
831 flash_write8(flash_read8(src), dst);
834 case FLASH_CFI_16BIT:
835 flash_write16(flash_read16(src), dst);
838 case FLASH_CFI_32BIT:
839 flash_write32(flash_read32(src), dst);
842 case FLASH_CFI_64BIT:
843 flash_write64(flash_read64(src), dst);
851 flash_write_cmd (info, sector, 0,
852 FLASH_CMD_WRITE_BUFFER_CONFIRM);
853 retcode = flash_full_status_check (
854 info, sector, info->buffer_write_tout,
859 case CFI_CMDSET_AMD_STANDARD:
860 case CFI_CMDSET_AMD_EXTENDED:
861 flash_unlock_seq(info,0);
862 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
864 switch (info->portwidth) {
867 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
869 flash_write8(flash_read8(src), dst);
873 case FLASH_CFI_16BIT:
875 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
877 flash_write16(flash_read16(src), dst);
881 case FLASH_CFI_32BIT:
883 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
885 flash_write32(flash_read32(src), dst);
889 case FLASH_CFI_64BIT:
891 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
893 flash_write64(flash_read64(src), dst);
901 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
902 retcode = flash_full_status_check (info, sector,
903 info->buffer_write_tout,
908 debug ("Unknown Command Set\n");
912 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
915 /*-----------------------------------------------------------------------
917 int flash_erase (flash_info_t * info, int s_first, int s_last)
923 if (info->flash_id != FLASH_MAN_CFI) {
924 puts ("Can't erase unknown flash type - aborted\n");
927 if ((s_first < 0) || (s_first > s_last)) {
928 puts ("- no sectors to erase\n");
933 for (sect = s_first; sect <= s_last; ++sect) {
934 if (info->protect[sect]) {
939 printf ("- Warning: %d protected sectors will not be erased!\n",
946 for (sect = s_first; sect <= s_last; sect++) {
947 if (info->protect[sect] == 0) { /* not protected */
948 switch (info->vendor) {
949 case CFI_CMDSET_INTEL_STANDARD:
950 case CFI_CMDSET_INTEL_EXTENDED:
951 flash_write_cmd (info, sect, 0,
952 FLASH_CMD_CLEAR_STATUS);
953 flash_write_cmd (info, sect, 0,
954 FLASH_CMD_BLOCK_ERASE);
955 flash_write_cmd (info, sect, 0,
956 FLASH_CMD_ERASE_CONFIRM);
958 case CFI_CMDSET_AMD_STANDARD:
959 case CFI_CMDSET_AMD_EXTENDED:
960 flash_unlock_seq (info, sect);
961 flash_write_cmd (info, sect,
963 AMD_CMD_ERASE_START);
964 flash_unlock_seq (info, sect);
965 flash_write_cmd (info, sect, 0,
966 AMD_CMD_ERASE_SECTOR);
968 #ifdef CONFIG_FLASH_CFI_LEGACY
969 case CFI_CMDSET_AMD_LEGACY:
970 flash_unlock_seq (info, 0);
971 flash_write_cmd (info, 0, info->addr_unlock1,
972 AMD_CMD_ERASE_START);
973 flash_unlock_seq (info, 0);
974 flash_write_cmd (info, sect, 0,
975 AMD_CMD_ERASE_SECTOR);
979 debug ("Unkown flash vendor %d\n",
984 if (flash_full_status_check
985 (info, sect, info->erase_blk_tout, "erase")) {
995 /*-----------------------------------------------------------------------
997 void flash_print_info (flash_info_t * info)
1001 if (info->flash_id != FLASH_MAN_CFI) {
1002 puts ("missing or unknown FLASH type\n");
1006 printf ("%s FLASH (%d x %d)",
1008 (info->portwidth << 3), (info->chipwidth << 3));
1009 if (info->size < 1024*1024)
1010 printf (" Size: %ld kB in %d Sectors\n",
1011 info->size >> 10, info->sector_count);
1013 printf (" Size: %ld MB in %d Sectors\n",
1014 info->size >> 20, info->sector_count);
1016 switch (info->vendor) {
1017 case CFI_CMDSET_INTEL_STANDARD:
1018 printf ("Intel Standard");
1020 case CFI_CMDSET_INTEL_EXTENDED:
1021 printf ("Intel Extended");
1023 case CFI_CMDSET_AMD_STANDARD:
1024 printf ("AMD Standard");
1026 case CFI_CMDSET_AMD_EXTENDED:
1027 printf ("AMD Extended");
1029 #ifdef CONFIG_FLASH_CFI_LEGACY
1030 case CFI_CMDSET_AMD_LEGACY:
1031 printf ("AMD Legacy");
1035 printf ("Unknown (%d)", info->vendor);
1038 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
1039 info->manufacturer_id, info->device_id);
1040 if (info->device_id == 0x7E) {
1041 printf("%04X", info->device_id2);
1043 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
1044 info->erase_blk_tout,
1046 if (info->buffer_size > 1) {
1047 printf (" Buffer write timeout: %ld ms, "
1048 "buffer size: %d bytes\n",
1049 info->buffer_write_tout,
1053 puts ("\n Sector Start Addresses:");
1054 for (i = 0; i < info->sector_count; ++i) {
1057 #ifdef CFG_FLASH_EMPTY_INFO
1061 volatile unsigned long *flash;
1064 * Check if whole sector is erased
1066 if (i != (info->sector_count - 1))
1067 size = info->start[i + 1] - info->start[i];
1069 size = info->start[0] + info->size - info->start[i];
1071 flash = (volatile unsigned long *) info->start[i];
1072 size = size >> 2; /* divide by 4 for longword access */
1073 for (k = 0; k < size; k++) {
1074 if (*flash++ != 0xffffffff) {
1080 /* print empty and read-only info */
1081 printf (" %08lX %c %s ",
1084 info->protect[i] ? "RO" : " ");
1085 #else /* ! CFG_FLASH_EMPTY_INFO */
1086 printf (" %08lX %s ",
1088 info->protect[i] ? "RO" : " ");
1095 /*-----------------------------------------------------------------------
1096 * Copy memory to flash, returns:
1099 * 2 - Flash not erased
1101 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
1109 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1112 /* get lower aligned address */
1113 /* get lower aligned address */
1114 wp = (addr & ~(info->portwidth - 1));
1116 /* handle unaligned start */
1117 if ((aln = addr - wp) != 0) {
1120 for (i = 0; i < aln; ++i, ++cp)
1121 flash_add_byte (info, &cword, (*(uchar *) cp));
1123 for (; (i < info->portwidth) && (cnt > 0); i++) {
1124 flash_add_byte (info, &cword, *src++);
1128 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
1129 flash_add_byte (info, &cword, (*(uchar *) cp));
1130 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1135 /* handle the aligned part */
1136 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1137 buffered_size = (info->portwidth / info->chipwidth);
1138 buffered_size *= info->buffer_size;
1139 while (cnt >= info->portwidth) {
1140 /* prohibit buffer write when buffer_size is 1 */
1141 if (info->buffer_size == 1) {
1143 for (i = 0; i < info->portwidth; i++)
1144 flash_add_byte (info, &cword, *src++);
1145 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1147 wp += info->portwidth;
1148 cnt -= info->portwidth;
1152 /* write buffer until next buffered_size aligned boundary */
1153 i = buffered_size - (wp % buffered_size);
1156 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
1158 i -= i & (info->portwidth - 1);
1164 while (cnt >= info->portwidth) {
1166 for (i = 0; i < info->portwidth; i++) {
1167 flash_add_byte (info, &cword, *src++);
1169 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1171 wp += info->portwidth;
1172 cnt -= info->portwidth;
1174 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1180 * handle unaligned tail bytes
1183 for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
1184 flash_add_byte (info, &cword, *src++);
1187 for (; i < info->portwidth; ++i, ++cp) {
1188 flash_add_byte (info, &cword, (*(uchar *) cp));
1191 return flash_write_cfiword (info, wp, cword);
1194 /*-----------------------------------------------------------------------
1196 #ifdef CFG_FLASH_PROTECTION
1198 int flash_real_protect (flash_info_t * info, long sector, int prot)
1202 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1203 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1205 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1207 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1210 flash_full_status_check (info, sector, info->erase_blk_tout,
1211 prot ? "protect" : "unprotect")) == 0) {
1213 info->protect[sector] = prot;
1216 * On some of Intel's flash chips (marked via legacy_unlock)
1217 * unprotect unprotects all locking.
1219 if ((prot == 0) && (info->legacy_unlock)) {
1222 for (i = 0; i < info->sector_count; i++) {
1223 if (info->protect[i])
1224 flash_real_protect (info, i, 1);
1231 /*-----------------------------------------------------------------------
1232 * flash_read_user_serial - read the OneTimeProgramming cells
1234 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1241 src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
1242 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1243 memcpy (dst, src + offset, len);
1244 flash_write_cmd (info, 0, 0, info->cmd_reset);
1248 * flash_read_factory_serial - read the device Id from the protection area
1250 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1255 src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1256 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1257 memcpy (buffer, src + offset, len);
1258 flash_write_cmd (info, 0, 0, info->cmd_reset);
1261 #endif /* CFG_FLASH_PROTECTION */
1264 /*-----------------------------------------------------------------------
1265 * read jedec ids from device and set corresponding fields in info struct
1267 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1270 static void flash_read_jedec_ids (flash_info_t * info)
1272 info->manufacturer_id = 0;
1273 info->device_id = 0;
1274 info->device_id2 = 0;
1276 switch (info->vendor) {
1277 case CFI_CMDSET_INTEL_STANDARD:
1278 case CFI_CMDSET_INTEL_EXTENDED:
1279 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1280 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1281 udelay(1000); /* some flash are slow to respond */
1282 info->manufacturer_id = flash_read_uchar (info,
1283 FLASH_OFFSET_MANUFACTURER_ID);
1284 info->device_id = flash_read_uchar (info,
1285 FLASH_OFFSET_DEVICE_ID);
1286 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1288 case CFI_CMDSET_AMD_STANDARD:
1289 case CFI_CMDSET_AMD_EXTENDED:
1290 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1291 flash_unlock_seq(info, 0);
1292 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1293 udelay(1000); /* some flash are slow to respond */
1294 info->manufacturer_id = flash_read_uchar (info,
1295 FLASH_OFFSET_MANUFACTURER_ID);
1296 info->device_id = flash_read_uchar (info,
1297 FLASH_OFFSET_DEVICE_ID);
1298 if (info->device_id == 0x7E) {
1299 /* AMD 3-byte (expanded) device ids */
1300 info->device_id2 = flash_read_uchar (info,
1301 FLASH_OFFSET_DEVICE_ID2);
1302 info->device_id2 <<= 8;
1303 info->device_id2 |= flash_read_uchar (info,
1304 FLASH_OFFSET_DEVICE_ID3);
1306 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1313 #ifdef CONFIG_FLASH_CFI_LEGACY
1314 /*-----------------------------------------------------------------------
1315 * Call board code to request info about non-CFI flash.
1316 * board_flash_get_legacy needs to fill in at least:
1317 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1319 static int flash_detect_legacy(ulong base, int banknum)
1321 flash_info_t *info = &flash_info[banknum];
1323 if (board_flash_get_legacy(base, banknum, info)) {
1324 /* board code may have filled info completely. If not, we
1325 use JEDEC ID probing. */
1326 if (!info->vendor) {
1328 CFI_CMDSET_AMD_STANDARD,
1329 CFI_CMDSET_INTEL_STANDARD
1333 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1334 info->vendor = modes[i];
1335 info->start[0] = base;
1336 if (info->portwidth == FLASH_CFI_8BIT
1337 && info->interface == FLASH_CFI_X8X16) {
1338 info->addr_unlock1 = 0x2AAA;
1339 info->addr_unlock2 = 0x5555;
1341 info->addr_unlock1 = 0x5555;
1342 info->addr_unlock2 = 0x2AAA;
1344 flash_read_jedec_ids(info);
1345 debug("JEDEC PROBE: ID %x %x %x\n",
1346 info->manufacturer_id,
1349 if (jedec_flash_match(info, base))
1354 switch(info->vendor) {
1355 case CFI_CMDSET_INTEL_STANDARD:
1356 case CFI_CMDSET_INTEL_EXTENDED:
1357 info->cmd_reset = FLASH_CMD_RESET;
1359 case CFI_CMDSET_AMD_STANDARD:
1360 case CFI_CMDSET_AMD_EXTENDED:
1361 case CFI_CMDSET_AMD_LEGACY:
1362 info->cmd_reset = AMD_CMD_RESET;
1365 info->flash_id = FLASH_MAN_CFI;
1368 return 0; /* use CFI */
1371 static inline int flash_detect_legacy(ulong base, int banknum)
1373 return 0; /* use CFI */
1377 /*-----------------------------------------------------------------------
1378 * detect if flash is compatible with the Common Flash Interface (CFI)
1379 * http://www.jedec.org/download/search/jesd68.pdf
1381 static int __flash_detect_cfi (flash_info_t * info)
1385 flash_write_cmd (info, 0, 0, info->cmd_reset);
1387 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1389 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1391 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1392 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1393 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1394 info->interface = flash_read_ushort (info, 0,
1395 FLASH_OFFSET_INTERFACE);
1396 info->cfi_offset = flash_offset_cfi[cfi_offset];
1397 debug ("device interface is %d\n",
1399 debug ("found port %d chip %d ",
1400 info->portwidth, info->chipwidth);
1401 debug ("port %d bits chip %d bits\n",
1402 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1403 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1405 /* calculate command offsets as in the Linux driver */
1406 info->addr_unlock1 = 0x555;
1407 info->addr_unlock2 = 0x2aa;
1410 * modify the unlock address if we are
1411 * in compatibility mode
1413 if ( /* x8/x16 in x8 mode */
1414 ((info->chipwidth == FLASH_CFI_BY8) &&
1415 (info->interface == FLASH_CFI_X8X16)) ||
1416 /* x16/x32 in x16 mode */
1417 ((info->chipwidth == FLASH_CFI_BY16) &&
1418 (info->interface == FLASH_CFI_X16X32)))
1420 info->addr_unlock1 = 0xaaa;
1421 info->addr_unlock2 = 0x555;
1424 info->name = "CFI conformant";
1432 static int flash_detect_cfi (flash_info_t * info)
1434 debug ("flash detect cfi\n");
1436 for (info->portwidth = CFG_FLASH_CFI_WIDTH;
1437 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1438 for (info->chipwidth = FLASH_CFI_BY8;
1439 info->chipwidth <= info->portwidth;
1440 info->chipwidth <<= 1)
1441 if (__flash_detect_cfi(info))
1444 debug ("not found\n");
1449 * The following code cannot be run from FLASH!
1452 ulong flash_get_size (ulong base, int banknum)
1454 flash_info_t *info = &flash_info[banknum];
1456 flash_sect_t sect_cnt;
1457 unsigned long sector;
1460 uchar num_erase_regions;
1461 int erase_region_size;
1462 int erase_region_count;
1463 int geometry_reversed = 0;
1466 info->cfi_version = 0;
1467 #ifdef CFG_FLASH_PROTECTION
1468 info->legacy_unlock = 0;
1471 info->start[0] = base;
1473 if (flash_detect_cfi (info)) {
1474 info->vendor = flash_read_ushort (info, 0,
1475 FLASH_OFFSET_PRIMARY_VENDOR);
1476 flash_read_jedec_ids (info);
1477 flash_write_cmd (info, 0, info->cfi_offset, FLASH_CMD_CFI);
1478 num_erase_regions = flash_read_uchar (info,
1479 FLASH_OFFSET_NUM_ERASE_REGIONS);
1480 info->ext_addr = flash_read_ushort (info, 0,
1481 FLASH_OFFSET_EXT_QUERY_T_P_ADDR);
1482 if (info->ext_addr) {
1483 info->cfi_version = (ushort) flash_read_uchar (info,
1484 info->ext_addr + 3) << 8;
1485 info->cfi_version |= (ushort) flash_read_uchar (info,
1486 info->ext_addr + 4);
1489 flash_printqry (info, 0);
1491 switch (info->vendor) {
1492 case CFI_CMDSET_INTEL_STANDARD:
1493 case CFI_CMDSET_INTEL_EXTENDED:
1495 info->cmd_reset = FLASH_CMD_RESET;
1496 #ifdef CFG_FLASH_PROTECTION
1497 /* read legacy lock/unlock bit from intel flash */
1498 if (info->ext_addr) {
1499 info->legacy_unlock = flash_read_uchar (info,
1500 info->ext_addr + 5) & 0x08;
1504 case CFI_CMDSET_AMD_STANDARD:
1505 case CFI_CMDSET_AMD_EXTENDED:
1506 info->cmd_reset = AMD_CMD_RESET;
1507 /* check if flash geometry needs reversal */
1508 if (num_erase_regions <= 1)
1510 /* reverse geometry if top boot part */
1511 if (info->cfi_version < 0x3131) {
1512 /* CFI < 1.1, try to guess from device id */
1513 if ((info->device_id & 0x80) != 0) {
1514 geometry_reversed = 1;
1518 /* CFI >= 1.1, deduct from top/bottom flag */
1519 /* note: ext_addr is valid since cfi_version > 0 */
1520 if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1521 geometry_reversed = 1;
1526 debug ("manufacturer is %d\n", info->vendor);
1527 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1528 debug ("device id is 0x%x\n", info->device_id);
1529 debug ("device id2 is 0x%x\n", info->device_id2);
1530 debug ("cfi version is 0x%04x\n", info->cfi_version);
1532 size_ratio = info->portwidth / info->chipwidth;
1533 /* if the chip is x8/x16 reduce the ratio by half */
1534 if ((info->interface == FLASH_CFI_X8X16)
1535 && (info->chipwidth == FLASH_CFI_BY8)) {
1538 debug ("size_ratio %d port %d bits chip %d bits\n",
1539 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1540 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1541 debug ("found %d erase regions\n", num_erase_regions);
1544 for (i = 0; i < num_erase_regions; i++) {
1545 if (i > NUM_ERASE_REGIONS) {
1546 printf ("%d erase regions found, only %d used\n",
1547 num_erase_regions, NUM_ERASE_REGIONS);
1550 if (geometry_reversed)
1551 tmp = flash_read_long (info, 0,
1552 FLASH_OFFSET_ERASE_REGIONS +
1553 (num_erase_regions - 1 - i) * 4);
1555 tmp = flash_read_long (info, 0,
1556 FLASH_OFFSET_ERASE_REGIONS +
1559 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1561 erase_region_count = (tmp & 0xffff) + 1;
1562 debug ("erase_region_count = %d erase_region_size = %d\n",
1563 erase_region_count, erase_region_size);
1564 for (j = 0; j < erase_region_count; j++) {
1565 if (sect_cnt >= CFG_MAX_FLASH_SECT) {
1566 printf("ERROR: too many flash sectors\n");
1569 info->start[sect_cnt] = sector;
1570 sector += (erase_region_size * size_ratio);
1573 * Only read protection status from
1574 * supported devices (intel...)
1576 switch (info->vendor) {
1577 case CFI_CMDSET_INTEL_EXTENDED:
1578 case CFI_CMDSET_INTEL_STANDARD:
1579 info->protect[sect_cnt] =
1580 flash_isset (info, sect_cnt,
1581 FLASH_OFFSET_PROTECT,
1582 FLASH_STATUS_PROTECT);
1585 /* default: not protected */
1586 info->protect[sect_cnt] = 0;
1593 info->sector_count = sect_cnt;
1594 info->size = 1 << flash_read_uchar (info, FLASH_OFFSET_SIZE);
1595 /* multiply the size by the number of chips */
1596 info->size *= size_ratio;
1597 info->buffer_size = 1 << flash_read_ushort (info, 0,
1598 FLASH_OFFSET_BUFFER_SIZE);
1599 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1600 info->erase_blk_tout = tmp *
1601 (1 << flash_read_uchar (
1602 info, FLASH_OFFSET_EMAX_TOUT));
1603 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT)) *
1604 (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT));
1605 /* round up when converting to ms */
1606 info->buffer_write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0);
1607 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) *
1608 (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT));
1609 /* round up when converting to ms */
1610 info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0);
1611 info->flash_id = FLASH_MAN_CFI;
1612 if ((info->interface == FLASH_CFI_X8X16) &&
1613 (info->chipwidth == FLASH_CFI_BY8)) {
1614 /* XXX - Need to test on x8/x16 in parallel. */
1615 info->portwidth >>= 1;
1619 flash_write_cmd (info, 0, 0, info->cmd_reset);
1620 return (info->size);
1623 /*-----------------------------------------------------------------------
1625 unsigned long flash_init (void)
1627 unsigned long size = 0;
1630 #ifdef CFG_FLASH_PROTECTION
1631 char *s = getenv("unlock");
1634 /* Init: no FLASHes known */
1635 for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
1636 flash_info[i].flash_id = FLASH_UNKNOWN;
1638 if (!flash_detect_legacy (bank_base[i], i))
1639 flash_get_size (bank_base[i], i);
1640 size += flash_info[i].size;
1641 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
1642 #ifndef CFG_FLASH_QUIET_TEST
1643 printf ("## Unknown FLASH on Bank %d "
1644 "- Size = 0x%08lx = %ld MB\n",
1645 i+1, flash_info[i].size,
1646 flash_info[i].size << 20);
1647 #endif /* CFG_FLASH_QUIET_TEST */
1649 #ifdef CFG_FLASH_PROTECTION
1650 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
1652 * Only the U-Boot image and it's environment
1653 * is protected, all other sectors are
1654 * unprotected (unlocked) if flash hardware
1655 * protection is used (CFG_FLASH_PROTECTION)
1656 * and the environment variable "unlock" is
1659 if (flash_info[i].legacy_unlock) {
1663 * Disable legacy_unlock temporarily,
1664 * since flash_real_protect would
1665 * relock all other sectors again
1668 flash_info[i].legacy_unlock = 0;
1671 * Legacy unlocking (e.g. Intel J3) ->
1672 * unlock only one sector. This will
1673 * unlock all sectors.
1675 flash_real_protect (&flash_info[i], 0, 0);
1677 flash_info[i].legacy_unlock = 1;
1680 * Manually mark other sectors as
1681 * unlocked (unprotected)
1683 for (k = 1; k < flash_info[i].sector_count; k++)
1684 flash_info[i].protect[k] = 0;
1687 * No legancy unlocking -> unlock all sectors
1689 flash_protect (FLAG_PROTECT_CLEAR,
1690 flash_info[i].start[0],
1691 flash_info[i].start[0]
1692 + flash_info[i].size - 1,
1696 #endif /* CFG_FLASH_PROTECTION */
1699 /* Monitor protection ON by default */
1700 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
1701 flash_protect (FLAG_PROTECT_SET,
1703 CFG_MONITOR_BASE + monitor_flash_len - 1,
1704 flash_get_info(CFG_MONITOR_BASE));
1707 /* Environment protection ON by default */
1708 #ifdef CFG_ENV_IS_IN_FLASH
1709 flash_protect (FLAG_PROTECT_SET,
1711 CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
1712 flash_get_info(CFG_ENV_ADDR));
1715 /* Redundant environment protection ON by default */
1716 #ifdef CFG_ENV_ADDR_REDUND
1717 flash_protect (FLAG_PROTECT_SET,
1718 CFG_ENV_ADDR_REDUND,
1719 CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
1720 flash_get_info(CFG_ENV_ADDR_REDUND));
1725 #endif /* CFG_FLASH_CFI */