4 * Copyright (C) 2007 MontaVista Software, Inc.
5 * Anton Vorontsov <avorontsov@ru.mvista.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
15 #if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_FSL_UPM)
18 #include <asm/errno.h>
19 #include <linux/mtd/mtd.h>
20 #include <linux/mtd/fsl_upm.h>
23 static void fsl_upm_start_pattern(struct fsl_upm *upm, u32 pat_offset)
25 clrsetbits_be32(upm->mxmr, MxMR_MAD_MSK, MxMR_OP_RUNP | pat_offset);
28 static void fsl_upm_end_pattern(struct fsl_upm *upm)
30 clrbits_be32(upm->mxmr, MxMR_OP_RUNP);
32 while (in_be32(upm->mxmr) & MxMR_OP_RUNP)
36 static void fsl_upm_run_pattern(struct fsl_upm *upm, int width, u32 cmd)
38 out_be32(upm->mar, cmd << (32 - width));
41 out_8(upm->io_addr, 0x0);
44 out_be16(upm->io_addr, 0x0);
47 out_be32(upm->io_addr, 0x0);
52 static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
54 struct nand_chip *chip = mtd->priv;
55 struct fsl_upm_nand *fun = chip->priv;
57 if (!(ctrl & fun->last_ctrl)) {
58 fsl_upm_end_pattern(&fun->upm);
60 if (cmd == NAND_CMD_NONE)
63 fun->last_ctrl = ctrl & (NAND_ALE | NAND_CLE);
66 if (ctrl & NAND_CTRL_CHANGE) {
68 fsl_upm_start_pattern(&fun->upm, fun->upm_addr_offset);
69 else if (ctrl & NAND_CLE)
70 fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset);
73 fsl_upm_run_pattern(&fun->upm, fun->width, cmd);
76 * Some boards/chips needs this. At least on MPC8360E-RDK we
77 * need it. Probably weird chip, because I don't see any need
78 * for this on MPC8555E + Samsung K9F1G08U0A. Usually here are
79 * 0-2 unexpected busy states per block read.
81 if (fun->wait_pattern) {
82 while (!fun->dev_ready())
83 debug("unexpected busy state\n");
87 static u8 nand_read_byte(struct mtd_info *mtd)
89 struct nand_chip *chip = mtd->priv;
91 return in_8(chip->IO_ADDR_R);
94 static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
97 struct nand_chip *chip = mtd->priv;
99 for (i = 0; i < len; i++)
100 out_8(chip->IO_ADDR_W, buf[i]);
103 static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
106 struct nand_chip *chip = mtd->priv;
108 for (i = 0; i < len; i++)
109 buf[i] = in_8(chip->IO_ADDR_R);
112 static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
115 struct nand_chip *chip = mtd->priv;
117 for (i = 0; i < len; i++) {
118 if (buf[i] != in_8(chip->IO_ADDR_R))
125 static int nand_dev_ready(struct mtd_info *mtd)
127 struct nand_chip *chip = mtd->priv;
128 struct fsl_upm_nand *fun = chip->priv;
130 return fun->dev_ready();
133 int fsl_upm_nand_init(struct nand_chip *chip, struct fsl_upm_nand *fun)
135 if (fun->width != 8 && fun->width != 16 && fun->width != 32)
138 fun->last_ctrl = NAND_CLE;
141 chip->chip_delay = fun->chip_delay;
142 chip->ecc.mode = NAND_ECC_SOFT;
143 chip->cmd_ctrl = fun_cmd_ctrl;
144 chip->read_byte = nand_read_byte;
145 chip->read_buf = nand_read_buf;
146 chip->write_buf = nand_write_buf;
147 chip->verify_buf = nand_verify_buf;
149 chip->dev_ready = nand_dev_ready;
153 #endif /* CONFIG_CMD_NAND */