2 * SPI flash internal definitions
4 * Copyright (C) 2008 Atmel Corporation
5 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
7 * SPDX-License-Identifier: GPL-2.0+
10 #ifndef _SF_INTERNAL_H_
11 #define _SF_INTERNAL_H_
13 #include <linux/types.h>
14 #include <linux/compiler.h>
16 /* Dual SPI flash memories - see SPI_COMM_DUAL_... */
19 SF_DUAL_STACKED_FLASH = 1 << 0,
20 SF_DUAL_PARALLEL_FLASH = 1 << 1,
23 /* Enum list - Full read commands */
26 DUAL_OUTPUT_FAST = 1 << 1,
27 DUAL_IO_FAST = 1 << 2,
28 QUAD_OUTPUT_FAST = 1 << 3,
29 QUAD_IO_FAST = 1 << 4,
32 #define RD_EXTN (ARRAY_SLOW | DUAL_OUTPUT_FAST | DUAL_IO_FAST)
33 #define RD_FULL (RD_EXTN | QUAD_OUTPUT_FAST | QUAD_IO_FAST)
43 #define SPI_FLASH_3B_ADDR_LEN 3
44 #define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN)
45 #define SPI_FLASH_16MB_BOUN 0x1000000
47 /* CFI Manufacture ID's */
48 #define SPI_FLASH_CFI_MFR_SPANSION 0x01
49 #define SPI_FLASH_CFI_MFR_STMICRO 0x20
50 #define SPI_FLASH_CFI_MFR_MACRONIX 0xc2
51 #define SPI_FLASH_CFI_MFR_WINBOND 0xef
54 #define CMD_ERASE_4K 0x20
55 #define CMD_ERASE_32K 0x52
56 #define CMD_ERASE_CHIP 0xc7
57 #define CMD_ERASE_64K 0xd8
60 #define CMD_WRITE_STATUS 0x01
61 #define CMD_PAGE_PROGRAM 0x02
62 #define CMD_WRITE_DISABLE 0x04
63 #define CMD_READ_STATUS 0x05
64 #define CMD_QUAD_PAGE_PROGRAM 0x32
65 #define CMD_READ_STATUS1 0x35
66 #define CMD_WRITE_ENABLE 0x06
67 #define CMD_READ_CONFIG 0x35
68 #define CMD_FLAG_STATUS 0x70
71 #define CMD_READ_ARRAY_SLOW 0x03
72 #define CMD_READ_ARRAY_FAST 0x0b
73 #define CMD_READ_DUAL_OUTPUT_FAST 0x3b
74 #define CMD_READ_DUAL_IO_FAST 0xbb
75 #define CMD_READ_QUAD_OUTPUT_FAST 0x6b
76 #define CMD_READ_QUAD_IO_FAST 0xeb
77 #define CMD_READ_ID 0x9f
79 /* Bank addr access commands */
80 #ifdef CONFIG_SPI_FLASH_BAR
81 # define CMD_BANKADDR_BRWR 0x17
82 # define CMD_BANKADDR_BRRD 0x16
83 # define CMD_EXTNADDR_WREAR 0xC5
84 # define CMD_EXTNADDR_RDEAR 0xC8
88 #define STATUS_WIP (1 << 0)
89 #define STATUS_QEB_WINSPAN (1 << 1)
90 #define STATUS_QEB_MXIC (1 << 6)
91 #define STATUS_PEC (1 << 7)
93 #ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
94 #define STATUS_SRWD (1 << 7) /* SR write protect */
97 /* Flash timeout values */
98 #define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
99 #define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ)
100 #define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ)
103 #ifdef CONFIG_SPI_FLASH_SST
104 # define SST_WP 0x01 /* Supports AAI word program */
105 # define CMD_SST_BP 0x02 /* Byte Program */
106 # define CMD_SST_AAI_WP 0xAD /* Auto Address Incr Word Program */
108 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
113 * struct spi_flash_params - SPI/QSPI flash device params structure
115 * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
116 * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
117 * @ext_jedec: Device ext_jedec ID
118 * @sector_size: Sector size of this device
119 * @nr_sectors: No.of sectors on this device
120 * @e_rd_cmd: Enum list for read commands
121 * @flags: Important param, for flash specific behaviour
123 struct spi_flash_params {
133 extern const struct spi_flash_params spi_flash_params_table[];
135 /* Send a single-byte command to the device and read the response */
136 int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
139 * Send a multi-byte command to the device and read the response. Used
140 * for flash array reads, etc.
142 int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
143 size_t cmd_len, void *data, size_t data_len);
146 * Send a multi-byte command to the device followed by (optional)
147 * data. Used for programming the flash array, etc.
149 int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
150 const void *data, size_t data_len);
153 /* Flash erase(sectors) operation, support all possible erase commands */
154 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
156 /* Read the status register */
157 int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs);
159 /* Program the status register */
160 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws);
162 /* Read the config register */
163 int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc);
165 /* Program the config register */
166 int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc);
168 /* Enable writing on the SPI flash */
169 static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)
171 return spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0);
174 /* Disable writing on the SPI flash */
175 static inline int spi_flash_cmd_write_disable(struct spi_flash *flash)
177 return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0);
181 * Send the read status command to the device and wait for the wip
182 * (write-in-progress) bit to clear itself.
184 int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout);
187 * Used for spi_flash write operation
189 * - spi_flash_cmd_write_enable
190 * - spi_flash_cmd_write
191 * - spi_flash_cmd_wait_ready
194 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
195 size_t cmd_len, const void *buf, size_t buf_len);
198 * Flash write operation, support all possible write commands.
199 * Write the requested data out breaking it up into multiple write
200 * commands as needed per the write size.
202 int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
203 size_t len, const void *buf);
206 * Same as spi_flash_cmd_read() except it also claims/releases the SPI
207 * bus. Used as common part of the ->read() operation.
209 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
210 size_t cmd_len, void *data, size_t data_len);
212 /* Flash read operation, support all possible read commands */
213 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
214 size_t len, void *data);
216 #endif /* _SF_INTERNAL_H_ */