2 * SPI flash internal definitions
4 * Copyright (C) 2008 Atmel Corporation
5 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
7 * SPDX-License-Identifier: GPL-2.0+
10 #ifndef _SF_INTERNAL_H_
11 #define _SF_INTERNAL_H_
13 #define SPI_FLASH_3B_ADDR_LEN 3
14 #define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN)
15 #define SPI_FLASH_16MB_BOUN 0x1000000
17 /* CFI Manufacture ID's */
18 #define SPI_FLASH_CFI_MFR_SPANSION 0x01
19 #define SPI_FLASH_CFI_MFR_STMICRO 0x20
20 #define SPI_FLASH_CFI_MFR_MACRONIX 0xc2
21 #define SPI_FLASH_CFI_MFR_WINBOND 0xef
24 #define SECT_4K (1 << 1)
25 #define SECT_32K (1 << 2)
26 #define E_FSR (1 << 3)
29 #define CMD_ERASE_4K 0x20
30 #define CMD_ERASE_32K 0x52
31 #define CMD_ERASE_CHIP 0xc7
32 #define CMD_ERASE_64K 0xd8
35 #define CMD_WRITE_STATUS 0x01
36 #define CMD_PAGE_PROGRAM 0x02
37 #define CMD_WRITE_DISABLE 0x04
38 #define CMD_READ_STATUS 0x05
39 #define CMD_QUAD_PAGE_PROGRAM 0x32
40 #define CMD_READ_STATUS1 0x35
41 #define CMD_WRITE_ENABLE 0x06
42 #define CMD_READ_CONFIG 0x35
43 #define CMD_FLAG_STATUS 0x70
46 #define CMD_READ_ARRAY_SLOW 0x03
47 #define CMD_READ_ARRAY_FAST 0x0b
48 #define CMD_READ_DUAL_OUTPUT_FAST 0x3b
49 #define CMD_READ_DUAL_IO_FAST 0xbb
50 #define CMD_READ_QUAD_OUTPUT_FAST 0x6b
51 #define CMD_READ_QUAD_IO_FAST 0xeb
52 #define CMD_READ_ID 0x9f
54 /* Bank addr access commands */
55 #ifdef CONFIG_SPI_FLASH_BAR
56 # define CMD_BANKADDR_BRWR 0x17
57 # define CMD_BANKADDR_BRRD 0x16
58 # define CMD_EXTNADDR_WREAR 0xC5
59 # define CMD_EXTNADDR_RDEAR 0xC8
63 #define STATUS_WIP 0x01
64 #define STATUS_QEB_WINSPAN (1 << 1)
65 #define STATUS_QEB_MXIC (1 << 6)
66 #define STATUS_PEC 0x80
68 /* Flash timeout values */
69 #define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
70 #define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ)
71 #define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ)
74 #ifdef CONFIG_SPI_FLASH_SST
75 # define SST_WP 0x01 /* Supports AAI word program */
76 # define CMD_SST_BP 0x02 /* Byte Program */
77 # define CMD_SST_AAI_WP 0xAD /* Auto Address Incr Word Program */
79 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
83 /* Send a single-byte command to the device and read the response */
84 int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
87 * Send a multi-byte command to the device and read the response. Used
88 * for flash array reads, etc.
90 int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
91 size_t cmd_len, void *data, size_t data_len);
94 * Send a multi-byte command to the device followed by (optional)
95 * data. Used for programming the flash array, etc.
97 int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
98 const void *data, size_t data_len);
101 /* Flash erase(sectors) operation, support all possible erase commands */
102 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
104 /* Program the status register */
105 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
107 /* Set quad enbale bit for macronix flashes */
108 int spi_flash_set_qeb_mxic(struct spi_flash *flash);
110 /* Set quad enbale bit for winbond and spansion flashes */
111 int spi_flash_set_qeb_winspan(struct spi_flash *flash);
113 /* Enable writing on the SPI flash */
114 static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)
116 return spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0);
119 /* Disable writing on the SPI flash */
120 static inline int spi_flash_cmd_write_disable(struct spi_flash *flash)
122 return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0);
126 * Send the read status command to the device and wait for the wip
127 * (write-in-progress) bit to clear itself.
129 int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout);
132 * Used for spi_flash write operation
134 * - spi_flash_cmd_write_enable
135 * - spi_flash_cmd_write
136 * - spi_flash_cmd_wait_ready
139 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
140 size_t cmd_len, const void *buf, size_t buf_len);
143 * Flash write operation, support all possible write commands.
144 * Write the requested data out breaking it up into multiple write
145 * commands as needed per the write size.
147 int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
148 size_t len, const void *buf);
151 * Same as spi_flash_cmd_read() except it also claims/releases the SPI
152 * bus. Used as common part of the ->read() operation.
154 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
155 size_t cmd_len, void *data, size_t data_len);
157 /* Flash read operation, support all possible read commands */
158 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
159 size_t len, void *data);
161 #endif /* _SF_INTERNAL_H_ */