4 * Copyright (C) 2015 Jagan Teki <jteki@openedev.com>
5 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
6 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
7 * Copyright (C) 2008 Atmel Corporation
9 * SPDX-License-Identifier: GPL-2.0+
17 #include <spi_flash.h>
18 #include <linux/log2.h>
21 #include "sf_internal.h"
23 DECLARE_GLOBAL_DATA_PTR;
25 static void spi_flash_addr(u32 addr, u8 *cmd)
27 /* cmd[0] is actual command */
33 static int read_sr(struct spi_flash *flash, u8 *rs)
38 cmd = CMD_READ_STATUS;
39 ret = spi_flash_read_common(flash, &cmd, 1, rs, 1);
41 debug("SF: fail to read status register\n");
48 static int read_fsr(struct spi_flash *flash, u8 *fsr)
51 const u8 cmd = CMD_FLAG_STATUS;
53 ret = spi_flash_read_common(flash, &cmd, 1, fsr, 1);
55 debug("SF: fail to read flag status register\n");
62 static int write_sr(struct spi_flash *flash, u8 ws)
67 cmd = CMD_WRITE_STATUS;
68 ret = spi_flash_write_common(flash, &cmd, 1, &ws, 1);
70 debug("SF: fail to write status register\n");
77 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
78 static int read_cr(struct spi_flash *flash, u8 *rc)
83 cmd = CMD_READ_CONFIG;
84 ret = spi_flash_read_common(flash, &cmd, 1, rc, 1);
86 debug("SF: fail to read config register\n");
93 static int write_cr(struct spi_flash *flash, u8 wc)
99 ret = read_sr(flash, &data[0]);
103 cmd = CMD_WRITE_STATUS;
105 ret = spi_flash_write_common(flash, &cmd, 1, &data, 2);
107 debug("SF: fail to write config register\n");
115 #ifdef CONFIG_SPI_FLASH_STMICRO
116 static int read_evcr(struct spi_flash *flash, u8 *evcr)
119 const u8 cmd = CMD_READ_EVCR;
121 ret = spi_flash_read_common(flash, &cmd, 1, evcr, 1);
123 debug("SF: error reading EVCR\n");
130 static int write_evcr(struct spi_flash *flash, u8 evcr)
135 cmd = CMD_WRITE_EVCR;
136 ret = spi_flash_write_common(flash, &cmd, 1, &evcr, 1);
138 debug("SF: error while writing EVCR register\n");
146 #ifdef CONFIG_SPI_FLASH_BAR
147 static int write_bar(struct spi_flash *flash, u32 offset)
152 bank_sel = offset / (SPI_FLASH_16MB_BOUN << flash->shift);
153 if (bank_sel == flash->bank_curr)
156 cmd = flash->bank_write_cmd;
157 ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
159 debug("SF: fail to write bank register\n");
164 flash->bank_curr = bank_sel;
165 return flash->bank_curr;
168 static int read_bar(struct spi_flash *flash, const struct spi_flash_info *info)
173 if (flash->size <= SPI_FLASH_16MB_BOUN)
176 switch (JEDEC_MFR(info)) {
177 case SPI_FLASH_CFI_MFR_SPANSION:
178 flash->bank_read_cmd = CMD_BANKADDR_BRRD;
179 flash->bank_write_cmd = CMD_BANKADDR_BRWR;
182 flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
183 flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
186 ret = spi_flash_read_common(flash, &flash->bank_read_cmd, 1,
189 debug("SF: fail to read bank addr register\n");
194 flash->bank_curr = curr_bank;
199 #ifdef CONFIG_SF_DUAL_FLASH
200 static void spi_flash_dual(struct spi_flash *flash, u32 *addr)
202 switch (flash->dual_flash) {
203 case SF_DUAL_STACKED_FLASH:
204 if (*addr >= (flash->size >> 1)) {
205 *addr -= flash->size >> 1;
206 flash->flags |= SNOR_F_USE_UPAGE;
208 flash->flags &= ~SNOR_F_USE_UPAGE;
211 case SF_DUAL_PARALLEL_FLASH:
212 *addr >>= flash->shift;
215 debug("SF: Unsupported dual_flash=%d\n", flash->dual_flash);
221 static int spi_flash_sr_ready(struct spi_flash *flash)
226 ret = read_sr(flash, &sr);
230 return !(sr & STATUS_WIP);
233 static int spi_flash_fsr_ready(struct spi_flash *flash)
238 ret = read_fsr(flash, &fsr);
242 return fsr & STATUS_PEC;
245 static int spi_flash_ready(struct spi_flash *flash)
249 sr = spi_flash_sr_ready(flash);
254 if (flash->flags & SNOR_F_USE_FSR) {
255 fsr = spi_flash_fsr_ready(flash);
263 static int spi_flash_wait_till_ready(struct spi_flash *flash,
264 unsigned long timeout)
266 unsigned long timebase;
269 timebase = get_timer(0);
271 while (get_timer(timebase) < timeout) {
272 ret = spi_flash_ready(flash);
279 printf("SF: Timeout!\n");
284 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
285 size_t cmd_len, const void *buf, size_t buf_len)
287 struct spi_slave *spi = flash->spi;
288 unsigned long timeout = SPI_FLASH_PROG_TIMEOUT;
292 timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT;
294 ret = spi_claim_bus(spi);
296 debug("SF: unable to claim SPI bus\n");
300 ret = spi_flash_cmd_write_enable(flash);
302 debug("SF: enabling write failed\n");
306 ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len);
308 debug("SF: write cmd failed\n");
312 ret = spi_flash_wait_till_ready(flash, timeout);
314 debug("SF: write %s timed out\n",
315 timeout == SPI_FLASH_PROG_TIMEOUT ?
316 "program" : "page erase");
320 spi_release_bus(spi);
325 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
327 u32 erase_size, erase_addr;
328 u8 cmd[SPI_FLASH_CMD_LEN];
331 erase_size = flash->erase_size;
332 if (offset % erase_size || len % erase_size) {
333 debug("SF: Erase offset/length not multiple of erase size\n");
337 if (flash->flash_is_locked) {
338 if (flash->flash_is_locked(flash, offset, len) > 0) {
339 printf("offset 0x%x is protected and cannot be erased\n",
345 cmd[0] = flash->erase_cmd;
349 #ifdef CONFIG_SF_DUAL_FLASH
350 if (flash->dual_flash > SF_SINGLE_FLASH)
351 spi_flash_dual(flash, &erase_addr);
353 #ifdef CONFIG_SPI_FLASH_BAR
354 ret = write_bar(flash, erase_addr);
358 spi_flash_addr(erase_addr, cmd);
360 debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
361 cmd[2], cmd[3], erase_addr);
363 ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
365 debug("SF: erase failed\n");
369 offset += erase_size;
376 int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
377 size_t len, const void *buf)
379 struct spi_slave *spi = flash->spi;
380 unsigned long byte_addr, page_size;
382 size_t chunk_len, actual;
383 u8 cmd[SPI_FLASH_CMD_LEN];
386 page_size = flash->page_size;
388 if (flash->flash_is_locked) {
389 if (flash->flash_is_locked(flash, offset, len) > 0) {
390 printf("offset 0x%x is protected and cannot be written\n",
396 cmd[0] = flash->write_cmd;
397 for (actual = 0; actual < len; actual += chunk_len) {
400 #ifdef CONFIG_SF_DUAL_FLASH
401 if (flash->dual_flash > SF_SINGLE_FLASH)
402 spi_flash_dual(flash, &write_addr);
404 #ifdef CONFIG_SPI_FLASH_BAR
405 ret = write_bar(flash, write_addr);
409 byte_addr = offset % page_size;
410 chunk_len = min(len - actual, (size_t)(page_size - byte_addr));
412 if (spi->max_write_size)
413 chunk_len = min(chunk_len,
414 (size_t)spi->max_write_size);
416 spi_flash_addr(write_addr, cmd);
418 debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
419 buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
421 ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
422 buf + actual, chunk_len);
424 debug("SF: write failed\n");
434 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
435 size_t cmd_len, void *data, size_t data_len)
437 struct spi_slave *spi = flash->spi;
440 ret = spi_claim_bus(spi);
442 debug("SF: unable to claim SPI bus\n");
446 ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
448 debug("SF: read cmd failed\n");
452 spi_release_bus(spi);
458 * TODO: remove the weak after all the other spi_flash_copy_mmap
459 * implementations removed from drivers
461 void __weak spi_flash_copy_mmap(void *data, void *offset, size_t len)
464 if (!dma_memcpy(data, offset, len))
467 memcpy(data, offset, len);
470 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
471 size_t len, void *data)
473 struct spi_slave *spi = flash->spi;
475 u32 remain_len, read_len, read_addr;
479 /* Handle memory-mapped SPI */
480 if (flash->memory_map) {
481 ret = spi_claim_bus(spi);
483 debug("SF: unable to claim SPI bus\n");
486 spi_xfer(spi, 0, NULL, NULL, SPI_XFER_MMAP);
487 spi_flash_copy_mmap(data, flash->memory_map + offset, len);
488 spi_xfer(spi, 0, NULL, NULL, SPI_XFER_MMAP_END);
489 spi_release_bus(spi);
493 cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
494 cmd = calloc(1, cmdsz);
496 debug("SF: Failed to allocate cmd\n");
500 cmd[0] = flash->read_cmd;
504 #ifdef CONFIG_SF_DUAL_FLASH
505 if (flash->dual_flash > SF_SINGLE_FLASH)
506 spi_flash_dual(flash, &read_addr);
508 #ifdef CONFIG_SPI_FLASH_BAR
509 ret = write_bar(flash, read_addr);
512 bank_sel = flash->bank_curr;
514 remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) *
515 (bank_sel + 1)) - offset;
516 if (len < remain_len)
519 read_len = remain_len;
521 spi_flash_addr(read_addr, cmd);
523 ret = spi_flash_read_common(flash, cmd, cmdsz, data, read_len);
525 debug("SF: read failed\n");
538 #ifdef CONFIG_SPI_FLASH_SST
539 static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
541 struct spi_slave *spi = flash->spi;
550 debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
551 spi_w8r8(spi, CMD_READ_STATUS), buf, cmd[0], offset);
553 ret = spi_flash_cmd_write_enable(flash);
557 ret = spi_flash_cmd_write(spi, cmd, sizeof(cmd), buf, 1);
561 return spi_flash_wait_till_ready(flash, SPI_FLASH_PROG_TIMEOUT);
564 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
567 struct spi_slave *spi = flash->spi;
568 size_t actual, cmd_len;
572 ret = spi_claim_bus(spi);
574 debug("SF: Unable to claim SPI bus\n");
578 /* If the data is not word aligned, write out leading single byte */
581 ret = sst_byte_write(flash, offset, buf);
587 ret = spi_flash_cmd_write_enable(flash);
592 cmd[0] = CMD_SST_AAI_WP;
593 cmd[1] = offset >> 16;
594 cmd[2] = offset >> 8;
597 for (; actual < len - 1; actual += 2) {
598 debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
599 spi_w8r8(spi, CMD_READ_STATUS), buf + actual,
602 ret = spi_flash_cmd_write(spi, cmd, cmd_len,
605 debug("SF: sst word program failed\n");
609 ret = spi_flash_wait_till_ready(flash, SPI_FLASH_PROG_TIMEOUT);
618 ret = spi_flash_cmd_write_disable(flash);
620 /* If there is a single trailing byte, write it out */
621 if (!ret && actual != len)
622 ret = sst_byte_write(flash, offset, buf + actual);
625 debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
626 ret ? "failure" : "success", len, offset - actual);
628 spi_release_bus(spi);
632 int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
635 struct spi_slave *spi = flash->spi;
639 ret = spi_claim_bus(spi);
641 debug("SF: Unable to claim SPI bus\n");
645 for (actual = 0; actual < len; actual++) {
646 ret = sst_byte_write(flash, offset, buf + actual);
648 debug("SF: sst byte program failed\n");
655 ret = spi_flash_cmd_write_disable(flash);
657 debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
658 ret ? "failure" : "success", len, offset - actual);
660 spi_release_bus(spi);
665 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
666 static void stm_get_locked_range(struct spi_flash *flash, u8 sr, loff_t *ofs,
669 u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
670 int shift = ffs(mask) - 1;
678 pow = ((sr & mask) ^ mask) >> shift;
679 *len = flash->size >> pow;
680 *ofs = flash->size - *len;
685 * Return 1 if the entire region is locked, 0 otherwise
687 static int stm_is_locked_sr(struct spi_flash *flash, loff_t ofs, u64 len,
693 stm_get_locked_range(flash, sr, &lock_offs, &lock_len);
695 return (ofs + len <= lock_offs + lock_len) && (ofs >= lock_offs);
699 * Check if a region of the flash is (completely) locked. See stm_lock() for
702 * Returns 1 if entire region is locked, 0 if any portion is unlocked, and
703 * negative on errors.
705 int stm_is_locked(struct spi_flash *flash, u32 ofs, size_t len)
710 status = read_sr(flash, &sr);
714 return stm_is_locked_sr(flash, ofs, len, sr);
718 * Lock a region of the flash. Compatible with ST Micro and similar flash.
719 * Supports only the block protection bits BP{0,1,2} in the status register
720 * (SR). Does not support these features found in newer SR bitfields:
721 * - TB: top/bottom protect - only handle TB=0 (top protect)
722 * - SEC: sector/block protect - only handle SEC=0 (block protect)
723 * - CMP: complement protect - only support CMP=0 (range is not complemented)
725 * Sample table portion for 8MB flash (Winbond w25q64fw):
727 * SEC | TB | BP2 | BP1 | BP0 | Prot Length | Protected Portion
728 * --------------------------------------------------------------------------
729 * X | X | 0 | 0 | 0 | NONE | NONE
730 * 0 | 0 | 0 | 0 | 1 | 128 KB | Upper 1/64
731 * 0 | 0 | 0 | 1 | 0 | 256 KB | Upper 1/32
732 * 0 | 0 | 0 | 1 | 1 | 512 KB | Upper 1/16
733 * 0 | 0 | 1 | 0 | 0 | 1 MB | Upper 1/8
734 * 0 | 0 | 1 | 0 | 1 | 2 MB | Upper 1/4
735 * 0 | 0 | 1 | 1 | 0 | 4 MB | Upper 1/2
736 * X | X | 1 | 1 | 1 | 8 MB | ALL
738 * Returns negative on errors, 0 on success.
740 int stm_lock(struct spi_flash *flash, u32 ofs, size_t len)
742 u8 status_old, status_new;
743 u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
744 u8 shift = ffs(mask) - 1, pow, val;
747 ret = read_sr(flash, &status_old);
751 /* SPI NOR always locks to the end */
752 if (ofs + len != flash->size) {
753 /* Does combined region extend to end? */
754 if (!stm_is_locked_sr(flash, ofs + len, flash->size - ofs - len,
757 len = flash->size - ofs;
761 * Need smallest pow such that:
763 * 1 / (2^pow) <= (len / size)
765 * so (assuming power-of-2 size) we do:
767 * pow = ceil(log2(size / len)) = log2(size) - floor(log2(len))
769 pow = ilog2(flash->size) - ilog2(len);
770 val = mask - (pow << shift);
774 /* Don't "lock" with no region! */
778 status_new = (status_old & ~mask) | val;
780 /* Only modify protection if it will not unlock other areas */
781 if ((status_new & mask) <= (status_old & mask))
784 write_sr(flash, status_new);
790 * Unlock a region of the flash. See stm_lock() for more info
792 * Returns negative on errors, 0 on success.
794 int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len)
796 uint8_t status_old, status_new;
797 u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
798 u8 shift = ffs(mask) - 1, pow, val;
801 ret = read_sr(flash, &status_old);
805 /* Cannot unlock; would unlock larger region than requested */
806 if (stm_is_locked_sr(flash, ofs - flash->erase_size, flash->erase_size,
810 * Need largest pow such that:
812 * 1 / (2^pow) >= (len / size)
814 * so (assuming power-of-2 size) we do:
816 * pow = floor(log2(size / len)) = log2(size) - ceil(log2(len))
818 pow = ilog2(flash->size) - order_base_2(flash->size - (ofs + len));
819 if (ofs + len == flash->size) {
820 val = 0; /* fully unlocked */
822 val = mask - (pow << shift);
823 /* Some power-of-two sizes are not supported */
828 status_new = (status_old & ~mask) | val;
830 /* Only modify protection if it will not lock other areas */
831 if ((status_new & mask) >= (status_old & mask))
834 write_sr(flash, status_new);
841 #ifdef CONFIG_SPI_FLASH_MACRONIX
842 static int macronix_quad_enable(struct spi_flash *flash)
847 ret = read_sr(flash, &qeb_status);
851 if (qeb_status & STATUS_QEB_MXIC)
854 ret = write_sr(flash, qeb_status | STATUS_QEB_MXIC);
858 /* read SR and check it */
859 ret = read_sr(flash, &qeb_status);
860 if (!(ret >= 0 && (qeb_status & STATUS_QEB_MXIC))) {
861 printf("SF: Macronix SR Quad bit not clear\n");
869 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
870 static int spansion_quad_enable(struct spi_flash *flash)
875 ret = read_cr(flash, &qeb_status);
879 if (qeb_status & STATUS_QEB_WINSPAN)
882 ret = write_cr(flash, qeb_status | STATUS_QEB_WINSPAN);
886 /* read CR and check it */
887 ret = read_cr(flash, &qeb_status);
888 if (!(ret >= 0 && (qeb_status & STATUS_QEB_WINSPAN))) {
889 printf("SF: Spansion CR Quad bit not clear\n");
897 #ifdef CONFIG_SPI_FLASH_STMICRO
898 static int micron_quad_enable(struct spi_flash *flash)
903 ret = read_evcr(flash, &qeb_status);
907 if (!(qeb_status & STATUS_QEB_MICRON))
910 ret = write_evcr(flash, qeb_status & ~STATUS_QEB_MICRON);
914 /* read EVCR and check it */
915 ret = read_evcr(flash, &qeb_status);
916 if (!(ret >= 0 && !(qeb_status & STATUS_QEB_MICRON))) {
917 printf("SF: Micron EVCR Quad bit not clear\n");
925 static const struct spi_flash_info *spi_flash_read_id(struct spi_flash *flash)
928 u8 id[SPI_FLASH_MAX_ID_LEN];
929 const struct spi_flash_info *info;
931 tmp = spi_flash_cmd(flash->spi, CMD_READ_ID, id, SPI_FLASH_MAX_ID_LEN);
933 printf("SF: error %d reading JEDEC ID\n", tmp);
937 info = spi_flash_ids;
938 for (; info->name != NULL; info++) {
940 if (!memcmp(info->id, id, info->id_len))
945 printf("SF: unrecognized JEDEC id bytes: %02x, %02x, %02x\n",
946 id[0], id[1], id[2]);
947 return ERR_PTR(-ENODEV);
950 static int set_quad_mode(struct spi_flash *flash,
951 const struct spi_flash_info *info)
953 switch (JEDEC_MFR(info)) {
954 #ifdef CONFIG_SPI_FLASH_MACRONIX
955 case SPI_FLASH_CFI_MFR_MACRONIX:
956 return macronix_quad_enable(flash);
958 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
959 case SPI_FLASH_CFI_MFR_SPANSION:
960 case SPI_FLASH_CFI_MFR_WINBOND:
961 return spansion_quad_enable(flash);
963 #ifdef CONFIG_SPI_FLASH_STMICRO
964 case SPI_FLASH_CFI_MFR_STMICRO:
965 return micron_quad_enable(flash);
968 printf("SF: Need set QEB func for %02x flash\n",
974 #if CONFIG_IS_ENABLED(OF_CONTROL)
975 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
977 #ifdef CONFIG_DM_SPI_FLASH
980 int node = flash->dev->of_offset;
982 addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
983 if (addr == FDT_ADDR_T_NONE) {
984 debug("%s: Cannot decode address\n", __func__);
988 if (flash->size != size) {
989 debug("%s: Memory map must cover entire device\n", __func__);
992 flash->memory_map = map_sysmem(addr, size);
997 #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
999 int spi_flash_scan(struct spi_flash *flash)
1001 struct spi_slave *spi = flash->spi;
1002 const struct spi_flash_info *info = NULL;
1005 info = spi_flash_read_id(flash);
1006 if (IS_ERR_OR_NULL(info))
1009 /* Flash powers up read-only, so clear BP# bits */
1010 if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_ATMEL ||
1011 JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX ||
1012 JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST)
1015 flash->name = info->name;
1016 flash->memory_map = spi->memory_map;
1018 if (info->flags & SST_WR)
1019 flash->flags |= SNOR_F_SST_WR;
1021 #ifndef CONFIG_DM_SPI_FLASH
1022 flash->write = spi_flash_cmd_write_ops;
1023 #if defined(CONFIG_SPI_FLASH_SST)
1024 if (flash->flags & SNOR_F_SST_WR) {
1025 if (spi->mode & SPI_TX_BYTE)
1026 flash->write = sst_write_bp;
1028 flash->write = sst_write_wp;
1031 flash->erase = spi_flash_cmd_erase_ops;
1032 flash->read = spi_flash_cmd_read_ops;
1035 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
1036 /* NOR protection support for STmicro/Micron chips and similar */
1037 if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_STMICRO ||
1038 JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST) {
1039 flash->flash_lock = stm_lock;
1040 flash->flash_unlock = stm_unlock;
1041 flash->flash_is_locked = stm_is_locked;
1045 /* Compute the flash size */
1046 flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;
1047 flash->page_size = info->page_size;
1049 * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the
1050 * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with
1051 * the 0x4d00 Extended JEDEC code have 512b pages. All of the others
1054 if (JEDEC_EXT(info) == 0x4d00) {
1055 if ((JEDEC_ID(info) != 0x0215) &&
1056 (JEDEC_ID(info) != 0x0216))
1057 flash->page_size = 512;
1059 flash->page_size <<= flash->shift;
1060 flash->sector_size = info->sector_size << flash->shift;
1061 flash->size = flash->sector_size * info->n_sectors << flash->shift;
1062 #ifdef CONFIG_SF_DUAL_FLASH
1063 if (flash->dual_flash & SF_DUAL_STACKED_FLASH)
1067 #ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS
1068 /* Compute erase sector and command */
1069 if (info->flags & SECT_4K) {
1070 flash->erase_cmd = CMD_ERASE_4K;
1071 flash->erase_size = 4096 << flash->shift;
1075 flash->erase_cmd = CMD_ERASE_64K;
1076 flash->erase_size = flash->sector_size;
1079 /* Now erase size becomes valid sector size */
1080 flash->sector_size = flash->erase_size;
1082 /* Look for read commands */
1083 flash->read_cmd = CMD_READ_ARRAY_FAST;
1084 if (spi->mode & SPI_RX_SLOW)
1085 flash->read_cmd = CMD_READ_ARRAY_SLOW;
1086 else if (spi->mode & SPI_RX_QUAD && info->flags & RD_QUAD)
1087 flash->read_cmd = CMD_READ_QUAD_OUTPUT_FAST;
1088 else if (spi->mode & SPI_RX_DUAL && info->flags & RD_DUAL)
1089 flash->read_cmd = CMD_READ_DUAL_OUTPUT_FAST;
1091 /* Look for write commands */
1092 if (info->flags & WR_QPP && spi->mode & SPI_TX_QUAD)
1093 flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
1095 /* Go for default supported write cmd */
1096 flash->write_cmd = CMD_PAGE_PROGRAM;
1098 /* Set the quad enable bit - only for quad commands */
1099 if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) ||
1100 (flash->read_cmd == CMD_READ_QUAD_IO_FAST) ||
1101 (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
1102 ret = set_quad_mode(flash, info);
1104 debug("SF: Fail to set QEB for %02x\n",
1110 /* Read dummy_byte: dummy byte is determined based on the
1111 * dummy cycles of a particular command.
1112 * Fast commands - dummy_byte = dummy_cycles/8
1113 * I/O commands- dummy_byte = (dummy_cycles * no.of lines)/8
1114 * For I/O commands except cmd[0] everything goes on no.of lines
1115 * based on particular command but incase of fast commands except
1116 * data all go on single line irrespective of command.
1118 switch (flash->read_cmd) {
1119 case CMD_READ_QUAD_IO_FAST:
1120 flash->dummy_byte = 2;
1122 case CMD_READ_ARRAY_SLOW:
1123 flash->dummy_byte = 0;
1126 flash->dummy_byte = 1;
1129 #ifdef CONFIG_SPI_FLASH_STMICRO
1130 if (info->flags & E_FSR)
1131 flash->flags |= SNOR_F_USE_FSR;
1134 /* Configure the BAR - discover bank cmds and read current bank */
1135 #ifdef CONFIG_SPI_FLASH_BAR
1136 ret = read_bar(flash, info);
1141 #if CONFIG_IS_ENABLED(OF_CONTROL)
1142 ret = spi_flash_decode_fdt(gd->fdt_blob, flash);
1144 debug("SF: FDT decode error\n");
1149 #ifndef CONFIG_SPL_BUILD
1150 printf("SF: Detected %s with page size ", flash->name);
1151 print_size(flash->page_size, ", erase size ");
1152 print_size(flash->erase_size, ", total ");
1153 print_size(flash->size, "");
1154 if (flash->memory_map)
1155 printf(", mapped at %p", flash->memory_map);
1159 #ifndef CONFIG_SPI_FLASH_BAR
1160 if (((flash->dual_flash == SF_SINGLE_FLASH) &&
1161 (flash->size > SPI_FLASH_16MB_BOUN)) ||
1162 ((flash->dual_flash > SF_SINGLE_FLASH) &&
1163 (flash->size > SPI_FLASH_16MB_BOUN << 1))) {
1164 puts("SF: Warning - Only lower 16MiB accessible,");
1165 puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");