4 * Copyright (C) 2008 Atmel Corporation
5 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
7 * Licensed under the GPL-2 or later.
14 #include <spi_flash.h>
17 #include "spi_flash_internal.h"
19 DECLARE_GLOBAL_DATA_PTR;
21 static void spi_flash_addr(u32 addr, u8 *cmd)
23 /* cmd[0] is actual command */
29 static int spi_flash_read_write(struct spi_slave *spi,
30 const u8 *cmd, size_t cmd_len,
31 const u8 *data_out, u8 *data_in,
34 unsigned long flags = SPI_XFER_BEGIN;
38 flags |= SPI_XFER_END;
40 ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
42 debug("SF: Failed to send command (%zu bytes): %d\n",
44 } else if (data_len != 0) {
45 ret = spi_xfer(spi, data_len * 8, data_out, data_in, SPI_XFER_END);
47 debug("SF: Failed to transfer %zu bytes of data: %d\n",
54 int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len)
56 return spi_flash_cmd_read(spi, &cmd, 1, response, len);
59 int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
60 size_t cmd_len, void *data, size_t data_len)
62 return spi_flash_read_write(spi, cmd, cmd_len, NULL, data, data_len);
65 int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
66 const void *data, size_t data_len)
68 return spi_flash_read_write(spi, cmd, cmd_len, data, NULL, data_len);
71 int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
73 struct spi_slave *spi = flash->spi;
74 unsigned long timebase;
77 u8 check_status = 0x0;
78 u8 poll_bit = STATUS_WIP;
79 u8 cmd = flash->poll_cmd;
81 if (cmd == CMD_FLAG_STATUS) {
82 poll_bit = STATUS_PEC;
83 check_status = poll_bit;
86 ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN);
88 debug("SF: fail to read %s status register\n",
89 cmd == CMD_READ_STATUS ? "read" : "flag");
93 timebase = get_timer(0);
97 ret = spi_xfer(spi, 8, NULL, &status, 0);
101 if ((status & poll_bit) == check_status)
104 } while (get_timer(timebase) < timeout);
106 spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
108 if ((status & poll_bit) == check_status)
112 debug("SF: time out!\n");
116 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
117 size_t cmd_len, const void *buf, size_t buf_len)
119 struct spi_slave *spi = flash->spi;
120 unsigned long timeout = SPI_FLASH_PROG_TIMEOUT;
124 timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT;
126 ret = spi_claim_bus(flash->spi);
128 debug("SF: unable to claim SPI bus\n");
132 ret = spi_flash_cmd_write_enable(flash);
134 debug("SF: enabling write failed\n");
138 ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len);
140 debug("SF: write cmd failed\n");
144 ret = spi_flash_cmd_wait_ready(flash, timeout);
146 debug("SF: write %s timed out\n",
147 timeout == SPI_FLASH_PROG_TIMEOUT ?
148 "program" : "page erase");
152 spi_release_bus(spi);
157 int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
163 erase_size = flash->sector_size;
164 if (offset % erase_size || len % erase_size) {
165 debug("SF: Erase offset/length not multiple of erase size\n");
169 if (erase_size == 4096)
170 cmd[0] = CMD_ERASE_4K;
172 cmd[0] = CMD_ERASE_64K;
175 #ifdef CONFIG_SPI_FLASH_BAR
178 bank_sel = offset / SPI_FLASH_16MB_BOUN;
180 ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
182 debug("SF: fail to set bank%d\n", bank_sel);
186 spi_flash_addr(offset, cmd);
188 debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
189 cmd[2], cmd[3], offset);
191 ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
193 debug("SF: erase failed\n");
197 offset += erase_size;
204 int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
205 size_t len, const void *buf)
207 unsigned long byte_addr, page_size;
208 size_t chunk_len, actual;
212 page_size = flash->page_size;
214 cmd[0] = CMD_PAGE_PROGRAM;
215 for (actual = 0; actual < len; actual += chunk_len) {
216 #ifdef CONFIG_SPI_FLASH_BAR
219 bank_sel = offset / SPI_FLASH_16MB_BOUN;
221 ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
223 debug("SF: fail to set bank%d\n", bank_sel);
227 byte_addr = offset % page_size;
228 chunk_len = min(len - actual, page_size - byte_addr);
230 if (flash->spi->max_write_size)
231 chunk_len = min(chunk_len, flash->spi->max_write_size);
233 spi_flash_addr(offset, cmd);
235 debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
236 buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
238 ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
239 buf + actual, chunk_len);
241 debug("SF: write failed\n");
251 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
252 size_t cmd_len, void *data, size_t data_len)
254 struct spi_slave *spi = flash->spi;
258 ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
259 spi_release_bus(spi);
264 int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
265 size_t len, void *data)
267 u8 cmd[5], bank_sel = 0;
268 u32 remain_len, read_len;
271 /* Handle memory-mapped SPI */
272 if (flash->memory_map) {
273 memcpy(data, flash->memory_map + offset, len);
277 cmd[0] = CMD_READ_ARRAY_FAST;
281 #ifdef CONFIG_SPI_FLASH_BAR
282 bank_sel = offset / SPI_FLASH_16MB_BOUN;
284 ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
286 debug("SF: fail to set bank%d\n", bank_sel);
290 remain_len = (SPI_FLASH_16MB_BOUN * (bank_sel + 1) - offset);
291 if (len < remain_len)
294 read_len = remain_len;
296 spi_flash_addr(offset, cmd);
298 ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
301 debug("SF: read failed\n");
313 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr)
318 cmd = CMD_WRITE_STATUS;
319 ret = spi_flash_write_common(flash, &cmd, 1, &sr, 1);
321 debug("SF: fail to write status register\n");
328 #ifdef CONFIG_SPI_FLASH_BAR
329 int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
334 if (flash->bank_curr == bank_sel) {
335 debug("SF: not require to enable bank%d\n", bank_sel);
339 cmd = flash->bank_write_cmd;
340 ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
342 debug("SF: fail to write bank register\n");
345 flash->bank_curr = bank_sel;
350 int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0)
355 /* discover bank cmds */
357 case SPI_FLASH_SPANSION_IDCODE0:
358 flash->bank_read_cmd = CMD_BANKADDR_BRRD;
359 flash->bank_write_cmd = CMD_BANKADDR_BRWR;
361 case SPI_FLASH_STMICRO_IDCODE0:
362 case SPI_FLASH_WINBOND_IDCODE0:
363 flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
364 flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
367 printf("SF: Unsupported bank commands %02x\n", idcode0);
371 /* read the bank reg - on which bank the flash is in currently */
372 cmd = flash->bank_read_cmd;
373 if (flash->size > SPI_FLASH_16MB_BOUN) {
374 if (spi_flash_read_common(flash, &cmd, 1, &curr_bank, 1)) {
375 debug("SF: fail to read bank addr register\n");
378 flash->bank_curr = curr_bank;
380 flash->bank_curr = curr_bank;
387 #ifdef CONFIG_OF_CONTROL
388 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
394 /* If there is no node, do nothing */
395 node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
399 addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
400 if (addr == FDT_ADDR_T_NONE) {
401 debug("%s: Cannot decode address\n", __func__);
405 if (flash->size != size) {
406 debug("%s: Memory map must cover entire device\n", __func__);
409 flash->memory_map = (void *)addr;
413 #endif /* CONFIG_OF_CONTROL */
416 * The following table holds all device probe functions
418 * shift: number of continuation bytes before the ID
419 * idcode: the expected IDCODE or 0xff for non JEDEC devices
420 * probe: the function to call
422 * Non JEDEC devices should be ordered in the table such that
423 * the probe functions with best detection algorithms come first.
425 * Several matching entries are permitted, they will be tried
426 * in sequence until a probe function returns non NULL.
428 * IDCODE_CONT_LEN may be redefined if a device needs to declare a
429 * larger "shift" value. IDCODE_PART_LEN generally shouldn't be
430 * changed. This is the max number of bytes probe functions may
431 * examine when looking up part-specific identification info.
433 * Probe functions will be given the idcode buffer starting at their
434 * manu id byte (the "idcode" in the table below). In other words,
435 * all of the continuation bytes will be skipped (the "shift" below).
437 #define IDCODE_CONT_LEN 0
438 #define IDCODE_PART_LEN 5
439 static const struct {
442 struct spi_flash *(*probe) (struct spi_slave *spi, u8 *idcode);
444 /* Keep it sorted by define name */
445 #ifdef CONFIG_SPI_FLASH_ATMEL
446 { 0, 0x1f, spi_flash_probe_atmel, },
448 #ifdef CONFIG_SPI_FLASH_EON
449 { 0, 0x1c, spi_flash_probe_eon, },
451 #ifdef CONFIG_SPI_FLASH_MACRONIX
452 { 0, 0xc2, spi_flash_probe_macronix, },
454 #ifdef CONFIG_SPI_FLASH_SPANSION
455 { 0, 0x01, spi_flash_probe_spansion, },
457 #ifdef CONFIG_SPI_FLASH_SST
458 { 0, 0xbf, spi_flash_probe_sst, },
460 #ifdef CONFIG_SPI_FLASH_STMICRO
461 { 0, 0x20, spi_flash_probe_stmicro, },
463 #ifdef CONFIG_SPI_FLASH_WINBOND
464 { 0, 0xef, spi_flash_probe_winbond, },
466 #ifdef CONFIG_SPI_FRAM_RAMTRON
467 { 6, 0xc2, spi_fram_probe_ramtron, },
468 # undef IDCODE_CONT_LEN
469 # define IDCODE_CONT_LEN 6
471 /* Keep it sorted by best detection */
472 #ifdef CONFIG_SPI_FLASH_STMICRO
473 { 0, 0xff, spi_flash_probe_stmicro, },
475 #ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
476 { 0, 0xff, spi_fram_probe_ramtron, },
479 #define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN)
481 struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
482 unsigned int max_hz, unsigned int spi_mode)
484 struct spi_slave *spi;
485 struct spi_flash *flash = NULL;
487 u8 idcode[IDCODE_LEN], *idp;
489 spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
491 printf("SF: Failed to set up slave\n");
495 ret = spi_claim_bus(spi);
497 debug("SF: Failed to claim SPI bus: %d\n", ret);
501 /* Read the ID codes */
502 ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
507 printf("SF: Got idcodes\n");
508 print_buffer(0, idcode, 1, sizeof(idcode), 0);
511 /* count the number of continuation bytes */
512 for (shift = 0, idp = idcode;
513 shift < IDCODE_CONT_LEN && *idp == 0x7f;
517 /* search the table for matches in shift and id */
518 for (i = 0; i < ARRAY_SIZE(flashes); ++i)
519 if (flashes[i].shift == shift && flashes[i].idcode == *idp) {
520 /* we have a match, call probe */
521 flash = flashes[i].probe(spi, idp);
527 printf("SF: Unsupported manufacturer %02x\n", *idp);
528 goto err_manufacturer_probe;
531 #ifdef CONFIG_SPI_FLASH_BAR
532 /* Configure the BAR - disover bank cmds and read current bank */
533 ret = spi_flash_bank_config(flash, *idp);
535 goto err_manufacturer_probe;
538 #ifdef CONFIG_OF_CONTROL
539 if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
540 debug("SF: FDT decode error\n");
541 goto err_manufacturer_probe;
544 printf("SF: Detected %s with page size ", flash->name);
545 print_size(flash->sector_size, ", total ");
546 print_size(flash->size, "");
547 if (flash->memory_map)
548 printf(", mapped at %p", flash->memory_map);
551 spi_release_bus(spi);
555 err_manufacturer_probe:
557 spi_release_bus(spi);
563 void *spi_flash_do_alloc(int offset, int size, struct spi_slave *spi,
566 struct spi_flash *flash;
571 debug("SF: Failed to allocate memory\n");
574 memset(ptr, '\0', size);
575 flash = (struct spi_flash *)(ptr + offset);
577 /* Set up some basic fields - caller will sort out sizes */
580 flash->poll_cmd = CMD_READ_STATUS;
582 flash->read = spi_flash_cmd_read_fast;
583 flash->write = spi_flash_cmd_write_multi;
584 flash->erase = spi_flash_cmd_erase;
589 void spi_flash_free(struct spi_flash *flash)
591 spi_free_slave(flash->spi);