2 * (C) Copyright 2007-2009 Michal Simek
3 * (C) Copyright 2003 Xilinx Inc.
5 * Michal SIMEK <monstr@monstr.eu>
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 #define ENET_MAX_MTU PKTSIZE
35 #define ENET_MAX_MTU_ALIGNED PKTSIZE_ALIGN
36 #define ENET_ADDR_LENGTH 6
38 /* EmacLite constants */
39 #define XEL_BUFFER_OFFSET 0x0800 /* Next buffer's offset */
40 #define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */
41 #define XEL_TSR_OFFSET 0x07FC /* Tx status */
42 #define XEL_RSR_OFFSET 0x17FC /* Rx status */
43 #define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */
46 #define XEL_TSR_XMIT_BUSY_MASK 0x00000001UL
47 /* Xmit interrupt enable bit */
48 #define XEL_TSR_XMIT_IE_MASK 0x00000008UL
49 /* Buffer is active, SW bit only */
50 #define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000UL
51 /* Program the MAC address */
52 #define XEL_TSR_PROGRAM_MASK 0x00000002UL
53 /* define for programming the MAC address into the EMAC Lite */
54 #define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK)
56 /* Transmit packet length upper byte */
57 #define XEL_TPLR_LENGTH_MASK_HI 0x0000FF00UL
58 /* Transmit packet length lower byte */
59 #define XEL_TPLR_LENGTH_MASK_LO 0x000000FFUL
62 #define XEL_RSR_RECV_DONE_MASK 0x00000001UL
63 /* Recv interrupt enable bit */
64 #define XEL_RSR_RECV_IE_MASK 0x00000008UL
67 u32 nexttxbuffertouse; /* Next TX buffer to write to */
68 u32 nextrxbuffertouse; /* Next RX buffer to read from */
69 u32 txpp; /* TX ping pong buffer */
70 u32 rxpp; /* RX ping pong buffer */
73 static u32 etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */
75 static void xemaclite_alignedread (u32 *srcptr, void *destptr, u32 bytecount)
84 from32ptr = (u32 *) srcptr;
86 /* Word aligned buffer, no correction needed. */
87 to32ptr = (u32 *) destptr;
88 while (bytecount > 3) {
89 *to32ptr++ = *from32ptr++;
92 to8ptr = (u8 *) to32ptr;
94 alignbuffer = *from32ptr++;
95 from8ptr = (u8 *) & alignbuffer;
97 for (i = 0; i < bytecount; i++) {
98 *to8ptr++ = *from8ptr++;
102 static void xemaclite_alignedwrite (void *srcptr, u32 destptr, u32 bytecount)
106 u32 *to32ptr = (u32 *) destptr;
111 from32ptr = (u32 *) srcptr;
112 while (bytecount > 3) {
114 *to32ptr++ = *from32ptr++;
119 to8ptr = (u8 *) & alignbuffer;
120 from8ptr = (u8 *) from32ptr;
122 for (i = 0; i < bytecount; i++) {
123 *to8ptr++ = *from8ptr++;
126 *to32ptr++ = alignbuffer;
129 static void emaclite_halt(struct eth_device *dev)
131 debug ("eth_halt\n");
134 static int emaclite_init(struct eth_device *dev, bd_t *bis)
136 struct xemaclite *emaclite = dev->priv;
137 debug ("EmacLite Initialization Started\n");
140 * TX - TX_PING & TX_PONG initialization
142 /* Restart PING TX */
143 out_be32 (dev->iobase + XEL_TSR_OFFSET, 0);
144 /* Copy MAC address */
145 xemaclite_alignedwrite (dev->enetaddr,
146 dev->iobase, ENET_ADDR_LENGTH);
148 out_be32 (dev->iobase + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH);
149 /* Update the MAC address in the EMAC Lite */
150 out_be32 (dev->iobase + XEL_TSR_OFFSET, XEL_TSR_PROG_MAC_ADDR);
151 /* Wait for EMAC Lite to finish with the MAC address update */
152 while ((in_be32 (dev->iobase + XEL_TSR_OFFSET) &
153 XEL_TSR_PROG_MAC_ADDR) != 0)
156 if (emaclite->txpp) {
157 /* The same operation with PONG TX */
158 out_be32 (dev->iobase + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 0);
159 xemaclite_alignedwrite(dev->enetaddr, dev->iobase +
160 XEL_BUFFER_OFFSET, ENET_ADDR_LENGTH);
161 out_be32 (dev->iobase + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH);
162 out_be32 (dev->iobase + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET,
163 XEL_TSR_PROG_MAC_ADDR);
164 while ((in_be32 (dev->iobase + XEL_TSR_OFFSET +
165 XEL_BUFFER_OFFSET) & XEL_TSR_PROG_MAC_ADDR) != 0)
170 * RX - RX_PING & RX_PONG initialization
172 /* Write out the value to flush the RX buffer */
173 out_be32 (dev->iobase + XEL_RSR_OFFSET, XEL_RSR_RECV_IE_MASK);
176 out_be32 (dev->iobase + XEL_RSR_OFFSET + XEL_BUFFER_OFFSET,
177 XEL_RSR_RECV_IE_MASK);
179 debug ("EmacLite Initialization complete\n");
183 static int xemaclite_txbufferavailable(struct eth_device *dev)
188 struct xemaclite *emaclite = dev->priv;
191 * Read the other buffer register
192 * and determine if the other buffer is available
194 reg = in_be32 (dev->iobase +
195 emaclite->nexttxbuffertouse + 0);
196 txpingbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) ==
197 XEL_TSR_XMIT_BUSY_MASK);
199 reg = in_be32 (dev->iobase +
200 (emaclite->nexttxbuffertouse ^ XEL_TSR_OFFSET) + 0);
201 txpongbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) ==
202 XEL_TSR_XMIT_BUSY_MASK);
204 return (!(txpingbusy && txpongbusy));
207 static int emaclite_send (struct eth_device *dev, volatile void *ptr, int len)
211 struct xemaclite *emaclite = dev->priv;
215 if (len > ENET_MAX_MTU)
218 while (!xemaclite_txbufferavailable(dev) && maxtry) {
224 printf ("Error: Timeout waiting for ethernet TX buffer\n");
225 /* Restart PING TX */
226 out_be32 (dev->iobase + XEL_TSR_OFFSET, 0);
227 if (emaclite->txpp) {
228 out_be32 (dev->iobase + XEL_TSR_OFFSET +
229 XEL_BUFFER_OFFSET, 0);
234 /* Determine the expected TX buffer address */
235 baseaddress = (dev->iobase + emaclite->nexttxbuffertouse);
237 /* Determine if the expected buffer address is empty */
238 reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
239 if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0)
240 && ((in_be32 ((baseaddress) + XEL_TSR_OFFSET)
241 & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) {
244 emaclite->nexttxbuffertouse ^= XEL_BUFFER_OFFSET;
246 debug ("Send packet from 0x%x\n", baseaddress);
247 /* Write the frame to the buffer */
248 xemaclite_alignedwrite ((void *) ptr, baseaddress, len);
249 out_be32 (baseaddress + XEL_TPLR_OFFSET,(len &
250 (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO)));
251 reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
252 reg |= XEL_TSR_XMIT_BUSY_MASK;
253 if ((reg & XEL_TSR_XMIT_IE_MASK) != 0) {
254 reg |= XEL_TSR_XMIT_ACTIVE_MASK;
256 out_be32 (baseaddress + XEL_TSR_OFFSET, reg);
260 if (emaclite->txpp) {
261 /* Switch to second buffer */
262 baseaddress ^= XEL_BUFFER_OFFSET;
263 /* Determine if the expected buffer address is empty */
264 reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
265 if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0)
266 && ((in_be32 ((baseaddress) + XEL_TSR_OFFSET)
267 & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) {
268 debug("Send packet from 0x%x\n", baseaddress);
269 /* Write the frame to the buffer */
270 xemaclite_alignedwrite((void *) ptr, baseaddress, len);
271 out_be32 (baseaddress + XEL_TPLR_OFFSET, (len &
272 (XEL_TPLR_LENGTH_MASK_HI |
273 XEL_TPLR_LENGTH_MASK_LO)));
274 reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
275 reg |= XEL_TSR_XMIT_BUSY_MASK;
276 if ((reg & XEL_TSR_XMIT_IE_MASK) != 0)
277 reg |= XEL_TSR_XMIT_ACTIVE_MASK;
278 out_be32 (baseaddress + XEL_TSR_OFFSET, reg);
283 puts ("Error while sending frame\n");
287 static int emaclite_recv(struct eth_device *dev)
292 struct xemaclite *emaclite = dev->priv;
294 baseaddress = dev->iobase + emaclite->nextrxbuffertouse;
295 reg = in_be32 (baseaddress + XEL_RSR_OFFSET);
296 debug ("Testing data at address 0x%x\n", baseaddress);
297 if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
299 emaclite->nextrxbuffertouse ^= XEL_BUFFER_OFFSET;
302 if (!emaclite->rxpp) {
303 debug ("No data was available - address 0x%x\n",
307 baseaddress ^= XEL_BUFFER_OFFSET;
308 reg = in_be32 (baseaddress + XEL_RSR_OFFSET);
309 if ((reg & XEL_RSR_RECV_DONE_MASK) !=
310 XEL_RSR_RECV_DONE_MASK) {
311 debug("No data was available - address 0x%x\n",
317 /* Get the length of the frame that arrived */
318 switch(((ntohl(in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0xC))) &
319 0xFFFF0000 ) >> 16) {
321 length = 42 + 20; /* FIXME size of ARP */
322 debug ("ARP Packet\n");
326 (((ntohl(in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0x10))) &
327 0xFFFF0000) >> 16); /* FIXME size of IP packet */
328 debug ("IP Packet\n");
331 debug ("Other Packet\n");
332 length = ENET_MAX_MTU;
336 xemaclite_alignedread ((u32 *) (baseaddress + XEL_RXBUFF_OFFSET),
337 etherrxbuff, length);
339 /* Acknowledge the frame */
340 reg = in_be32 (baseaddress + XEL_RSR_OFFSET);
341 reg &= ~XEL_RSR_RECV_DONE_MASK;
342 out_be32 (baseaddress + XEL_RSR_OFFSET, reg);
344 debug ("Packet receive from 0x%x, length %dB\n", baseaddress, length);
345 NetReceive ((uchar *) etherrxbuff, length);
350 int xilinx_emaclite_initialize (bd_t *bis, int base_addr)
352 struct eth_device *dev;
353 struct xemaclite *emaclite;
355 dev = calloc(1, sizeof(*dev));
359 emaclite = calloc(1, sizeof(struct xemaclite));
360 if (emaclite == NULL) {
365 dev->priv = emaclite;
367 #ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
370 #ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
374 sprintf(dev->name, "Xelite.%x", base_addr);
376 dev->iobase = base_addr;
377 dev->init = emaclite_init;
378 dev->halt = emaclite_halt;
379 dev->send = emaclite_send;
380 dev->recv = emaclite_recv;