2 * (C) Copyright 2007-2009 Michal Simek
3 * (C) Copyright 2003 Xilinx Inc.
5 * Michal SIMEK <monstr@monstr.eu>
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 #define ENET_ADDR_LENGTH 6
36 /* EmacLite constants */
37 #define XEL_BUFFER_OFFSET 0x0800 /* Next buffer's offset */
38 #define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */
39 #define XEL_TSR_OFFSET 0x07FC /* Tx status */
40 #define XEL_RSR_OFFSET 0x17FC /* Rx status */
41 #define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */
44 #define XEL_TSR_XMIT_BUSY_MASK 0x00000001UL
45 /* Xmit interrupt enable bit */
46 #define XEL_TSR_XMIT_IE_MASK 0x00000008UL
47 /* Buffer is active, SW bit only */
48 #define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000UL
49 /* Program the MAC address */
50 #define XEL_TSR_PROGRAM_MASK 0x00000002UL
51 /* define for programming the MAC address into the EMAC Lite */
52 #define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK)
54 /* Transmit packet length upper byte */
55 #define XEL_TPLR_LENGTH_MASK_HI 0x0000FF00UL
56 /* Transmit packet length lower byte */
57 #define XEL_TPLR_LENGTH_MASK_LO 0x000000FFUL
60 #define XEL_RSR_RECV_DONE_MASK 0x00000001UL
61 /* Recv interrupt enable bit */
62 #define XEL_RSR_RECV_IE_MASK 0x00000008UL
65 u32 nexttxbuffertouse; /* Next TX buffer to write to */
66 u32 nextrxbuffertouse; /* Next RX buffer to read from */
67 u32 txpp; /* TX ping pong buffer */
68 u32 rxpp; /* RX ping pong buffer */
71 static u32 etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */
73 static void xemaclite_alignedread (u32 *srcptr, void *destptr, u32 bytecount)
82 from32ptr = (u32 *) srcptr;
84 /* Word aligned buffer, no correction needed. */
85 to32ptr = (u32 *) destptr;
86 while (bytecount > 3) {
87 *to32ptr++ = *from32ptr++;
90 to8ptr = (u8 *) to32ptr;
92 alignbuffer = *from32ptr++;
93 from8ptr = (u8 *) & alignbuffer;
95 for (i = 0; i < bytecount; i++) {
96 *to8ptr++ = *from8ptr++;
100 static void xemaclite_alignedwrite (void *srcptr, u32 destptr, u32 bytecount)
104 u32 *to32ptr = (u32 *) destptr;
109 from32ptr = (u32 *) srcptr;
110 while (bytecount > 3) {
112 *to32ptr++ = *from32ptr++;
117 to8ptr = (u8 *) & alignbuffer;
118 from8ptr = (u8 *) from32ptr;
120 for (i = 0; i < bytecount; i++) {
121 *to8ptr++ = *from8ptr++;
124 *to32ptr++ = alignbuffer;
127 static void emaclite_halt(struct eth_device *dev)
129 debug ("eth_halt\n");
132 static int emaclite_init(struct eth_device *dev, bd_t *bis)
134 struct xemaclite *emaclite = dev->priv;
135 debug ("EmacLite Initialization Started\n");
138 * TX - TX_PING & TX_PONG initialization
140 /* Restart PING TX */
141 out_be32 (dev->iobase + XEL_TSR_OFFSET, 0);
142 /* Copy MAC address */
143 xemaclite_alignedwrite (dev->enetaddr,
144 dev->iobase, ENET_ADDR_LENGTH);
146 out_be32 (dev->iobase + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH);
147 /* Update the MAC address in the EMAC Lite */
148 out_be32 (dev->iobase + XEL_TSR_OFFSET, XEL_TSR_PROG_MAC_ADDR);
149 /* Wait for EMAC Lite to finish with the MAC address update */
150 while ((in_be32 (dev->iobase + XEL_TSR_OFFSET) &
151 XEL_TSR_PROG_MAC_ADDR) != 0)
154 if (emaclite->txpp) {
155 /* The same operation with PONG TX */
156 out_be32 (dev->iobase + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 0);
157 xemaclite_alignedwrite(dev->enetaddr, dev->iobase +
158 XEL_BUFFER_OFFSET, ENET_ADDR_LENGTH);
159 out_be32 (dev->iobase + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH);
160 out_be32 (dev->iobase + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET,
161 XEL_TSR_PROG_MAC_ADDR);
162 while ((in_be32 (dev->iobase + XEL_TSR_OFFSET +
163 XEL_BUFFER_OFFSET) & XEL_TSR_PROG_MAC_ADDR) != 0)
168 * RX - RX_PING & RX_PONG initialization
170 /* Write out the value to flush the RX buffer */
171 out_be32 (dev->iobase + XEL_RSR_OFFSET, XEL_RSR_RECV_IE_MASK);
174 out_be32 (dev->iobase + XEL_RSR_OFFSET + XEL_BUFFER_OFFSET,
175 XEL_RSR_RECV_IE_MASK);
177 debug ("EmacLite Initialization complete\n");
181 static int xemaclite_txbufferavailable(struct eth_device *dev)
186 struct xemaclite *emaclite = dev->priv;
189 * Read the other buffer register
190 * and determine if the other buffer is available
192 reg = in_be32 (dev->iobase +
193 emaclite->nexttxbuffertouse + 0);
194 txpingbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) ==
195 XEL_TSR_XMIT_BUSY_MASK);
197 reg = in_be32 (dev->iobase +
198 (emaclite->nexttxbuffertouse ^ XEL_TSR_OFFSET) + 0);
199 txpongbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) ==
200 XEL_TSR_XMIT_BUSY_MASK);
202 return (!(txpingbusy && txpongbusy));
205 static int emaclite_send (struct eth_device *dev, volatile void *ptr, int len)
209 struct xemaclite *emaclite = dev->priv;
216 while (!xemaclite_txbufferavailable(dev) && maxtry) {
222 printf ("Error: Timeout waiting for ethernet TX buffer\n");
223 /* Restart PING TX */
224 out_be32 (dev->iobase + XEL_TSR_OFFSET, 0);
225 if (emaclite->txpp) {
226 out_be32 (dev->iobase + XEL_TSR_OFFSET +
227 XEL_BUFFER_OFFSET, 0);
232 /* Determine the expected TX buffer address */
233 baseaddress = (dev->iobase + emaclite->nexttxbuffertouse);
235 /* Determine if the expected buffer address is empty */
236 reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
237 if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0)
238 && ((in_be32 ((baseaddress) + XEL_TSR_OFFSET)
239 & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) {
242 emaclite->nexttxbuffertouse ^= XEL_BUFFER_OFFSET;
244 debug ("Send packet from 0x%x\n", baseaddress);
245 /* Write the frame to the buffer */
246 xemaclite_alignedwrite ((void *) ptr, baseaddress, len);
247 out_be32 (baseaddress + XEL_TPLR_OFFSET,(len &
248 (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO)));
249 reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
250 reg |= XEL_TSR_XMIT_BUSY_MASK;
251 if ((reg & XEL_TSR_XMIT_IE_MASK) != 0) {
252 reg |= XEL_TSR_XMIT_ACTIVE_MASK;
254 out_be32 (baseaddress + XEL_TSR_OFFSET, reg);
258 if (emaclite->txpp) {
259 /* Switch to second buffer */
260 baseaddress ^= XEL_BUFFER_OFFSET;
261 /* Determine if the expected buffer address is empty */
262 reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
263 if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0)
264 && ((in_be32 ((baseaddress) + XEL_TSR_OFFSET)
265 & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) {
266 debug("Send packet from 0x%x\n", baseaddress);
267 /* Write the frame to the buffer */
268 xemaclite_alignedwrite((void *) ptr, baseaddress, len);
269 out_be32 (baseaddress + XEL_TPLR_OFFSET, (len &
270 (XEL_TPLR_LENGTH_MASK_HI |
271 XEL_TPLR_LENGTH_MASK_LO)));
272 reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
273 reg |= XEL_TSR_XMIT_BUSY_MASK;
274 if ((reg & XEL_TSR_XMIT_IE_MASK) != 0)
275 reg |= XEL_TSR_XMIT_ACTIVE_MASK;
276 out_be32 (baseaddress + XEL_TSR_OFFSET, reg);
281 puts ("Error while sending frame\n");
285 static int emaclite_recv(struct eth_device *dev)
290 struct xemaclite *emaclite = dev->priv;
292 baseaddress = dev->iobase + emaclite->nextrxbuffertouse;
293 reg = in_be32 (baseaddress + XEL_RSR_OFFSET);
294 debug ("Testing data at address 0x%x\n", baseaddress);
295 if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
297 emaclite->nextrxbuffertouse ^= XEL_BUFFER_OFFSET;
300 if (!emaclite->rxpp) {
301 debug ("No data was available - address 0x%x\n",
305 baseaddress ^= XEL_BUFFER_OFFSET;
306 reg = in_be32 (baseaddress + XEL_RSR_OFFSET);
307 if ((reg & XEL_RSR_RECV_DONE_MASK) !=
308 XEL_RSR_RECV_DONE_MASK) {
309 debug("No data was available - address 0x%x\n",
315 /* Get the length of the frame that arrived */
316 switch(((ntohl(in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0xC))) &
317 0xFFFF0000 ) >> 16) {
319 length = 42 + 20; /* FIXME size of ARP */
320 debug ("ARP Packet\n");
324 (((ntohl(in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0x10))) &
325 0xFFFF0000) >> 16); /* FIXME size of IP packet */
326 debug ("IP Packet\n");
329 debug("Other Packet\n");
334 xemaclite_alignedread ((u32 *) (baseaddress + XEL_RXBUFF_OFFSET),
335 etherrxbuff, length);
337 /* Acknowledge the frame */
338 reg = in_be32 (baseaddress + XEL_RSR_OFFSET);
339 reg &= ~XEL_RSR_RECV_DONE_MASK;
340 out_be32 (baseaddress + XEL_RSR_OFFSET, reg);
342 debug ("Packet receive from 0x%x, length %dB\n", baseaddress, length);
343 NetReceive ((uchar *) etherrxbuff, length);
348 int xilinx_emaclite_initialize (bd_t *bis, int base_addr)
350 struct eth_device *dev;
351 struct xemaclite *emaclite;
353 dev = calloc(1, sizeof(*dev));
357 emaclite = calloc(1, sizeof(struct xemaclite));
358 if (emaclite == NULL) {
363 dev->priv = emaclite;
365 #ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
368 #ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
372 sprintf(dev->name, "Xelite.%x", base_addr);
374 dev->iobase = base_addr;
375 dev->init = emaclite_init;
376 dev->halt = emaclite_halt;
377 dev->send = emaclite_send;
378 dev->recv = emaclite_recv;