2 * Copyright (C) 2014 Google, Inc
4 * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
7 * Copyright (C) 2003-2004 Linux Networx
8 * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
9 * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com>
10 * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
11 * Copyright (C) 2005-2006 Tyan
12 * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
13 * Copyright (C) 2005-2009 coresystems GmbH
14 * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
16 * PCI Bus Services, see include/linux/pci.h for further explanation.
18 * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
19 * David Mosberger-Tang
21 * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
23 * SPDX-License-Identifier: GPL-2.0
27 #include <bios_emul.h>
35 #ifdef CONFIG_HAVE_ACPI_RESUME
39 __weak bool board_should_run_oprom(pci_dev_t dev)
44 static bool should_load_oprom(pci_dev_t dev)
46 #ifdef CONFIG_HAVE_ACPI_RESUME
47 if (acpi_get_slp_type() == 3)
50 if (IS_ENABLED(CONFIG_ALWAYS_LOAD_OPROM))
52 if (board_should_run_oprom(dev))
58 __weak uint32_t board_map_oprom_vendev(uint32_t vendev)
63 static int pci_rom_probe(pci_dev_t dev, uint class,
64 struct pci_rom_header **hdrp)
66 struct pci_rom_header *rom_header;
67 struct pci_rom_data *rom_data;
69 u16 rom_vendor, rom_device;
74 pci_read_config_word(dev, PCI_VENDOR_ID, &vendor);
75 pci_read_config_word(dev, PCI_DEVICE_ID, &device);
76 vendev = vendor << 16 | device;
77 mapped_vendev = board_map_oprom_vendev(vendev);
78 if (vendev != mapped_vendev)
79 debug("Device ID mapped to %#08x\n", mapped_vendev);
81 #ifdef CONFIG_X86_OPTION_ROM_ADDR
82 rom_address = CONFIG_X86_OPTION_ROM_ADDR;
85 if (pciauto_setup_rom(pci_bus_to_hose(PCI_BUS(dev)), dev)) {
86 debug("Cannot find option ROM\n");
90 pci_read_config_dword(dev, PCI_ROM_ADDRESS, &rom_address);
91 if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
92 debug("%s: rom_address=%x\n", __func__, rom_address);
96 /* Enable expansion ROM address decoding. */
97 pci_write_config_dword(dev, PCI_ROM_ADDRESS,
98 rom_address | PCI_ROM_ADDRESS_ENABLE);
100 debug("Option ROM address %x\n", rom_address);
101 rom_header = (struct pci_rom_header *)(unsigned long)rom_address;
103 debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
104 le16_to_cpu(rom_header->signature),
105 rom_header->size * 512, le16_to_cpu(rom_header->data));
107 if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
108 printf("Incorrect expansion ROM header signature %04x\n",
109 le16_to_cpu(rom_header->signature));
113 rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
114 rom_vendor = le16_to_cpu(rom_data->vendor);
115 rom_device = le16_to_cpu(rom_data->device);
117 debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
118 rom_vendor, rom_device);
120 /* If the device id is mapped, a mismatch is expected */
121 if ((vendor != rom_vendor || device != rom_device) &&
122 (vendev == mapped_vendev)) {
123 printf("ID mismatch: vendor ID %04x, device ID %04x\n",
124 rom_vendor, rom_device);
125 /* Continue anyway */
128 debug("PCI ROM image, Class Code %04x%02x, Code Type %02x\n",
129 rom_data->class_hi, rom_data->class_lo, rom_data->type);
131 if (class != ((rom_data->class_hi << 8) | rom_data->class_lo)) {
132 debug("Class Code mismatch ROM %08x, dev %08x\n",
133 (rom_data->class_hi << 8) | rom_data->class_lo,
141 int pci_rom_load(uint16_t class, struct pci_rom_header *rom_header,
142 struct pci_rom_header **ram_headerp)
144 struct pci_rom_data *rom_data;
145 unsigned int rom_size;
146 unsigned int image_size = 0;
150 /* Get next image, until we see an x86 version */
151 rom_header = (struct pci_rom_header *)((void *)rom_header +
154 rom_data = (struct pci_rom_data *)((void *)rom_header +
155 le16_to_cpu(rom_header->data));
157 image_size = le16_to_cpu(rom_data->ilen) * 512;
158 } while ((rom_data->type != 0) && (rom_data->indicator == 0));
160 if (rom_data->type != 0)
163 rom_size = rom_header->size * 512;
165 #ifdef PCI_VGA_RAM_IMAGE_START
166 target = (void *)PCI_VGA_RAM_IMAGE_START;
168 target = (void *)malloc(rom_size);
172 if (target != rom_header) {
173 ulong start = get_timer(0);
175 debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
176 rom_header, target, rom_size);
177 memcpy(target, rom_header, rom_size);
178 if (memcmp(target, rom_header, rom_size)) {
179 printf("VGA ROM copy failed\n");
182 debug("Copy took %lums\n", get_timer(start));
184 *ram_headerp = target;
189 static struct vbe_mode_info mode_info;
191 int vbe_get_video_info(struct graphic_device *gdev)
193 #ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
194 struct vesa_mode_info *vesa = &mode_info.vesa;
196 gdev->winSizeX = vesa->x_resolution;
197 gdev->winSizeY = vesa->y_resolution;
199 gdev->plnSizeX = vesa->x_resolution;
200 gdev->plnSizeY = vesa->y_resolution;
202 gdev->gdfBytesPP = vesa->bits_per_pixel / 8;
204 switch (vesa->bits_per_pixel) {
206 gdev->gdfIndex = GDF_32BIT_X888RGB;
209 gdev->gdfIndex = GDF_16BIT_565RGB;
212 gdev->gdfIndex = GDF__8BIT_INDEX;
216 gdev->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS;
217 gdev->pciBase = vesa->phys_base_ptr;
219 gdev->frameAdrs = vesa->phys_base_ptr;
220 gdev->memSize = vesa->bytes_per_scanline * vesa->y_resolution;
222 gdev->vprBase = vesa->phys_base_ptr;
223 gdev->cprBase = vesa->phys_base_ptr;
225 return gdev->winSizeX ? 0 : -ENOSYS;
231 int pci_run_vga_bios(pci_dev_t dev, int (*int15_handler)(void), int exec_method)
233 struct pci_rom_header *rom, *ram;
239 /* Only execute VGA ROMs */
240 pci_read_config_word(dev, PCI_CLASS_DEVICE, &class);
241 if ((class ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
242 debug("%s: Class %#x, should be %#x\n", __func__, class,
243 PCI_CLASS_DISPLAY_VGA);
247 if (!should_load_oprom(dev))
250 ret = pci_rom_probe(dev, class, &rom);
254 ret = pci_rom_load(class, rom, &ram);
258 if (!board_should_run_oprom(dev))
261 #if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
262 defined(CONFIG_FRAMEBUFFER_VESA_MODE)
263 vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
265 debug("Selected vesa mode %#x\n", vesa_mode);
267 if (exec_method & PCI_ROM_USE_NATIVE) {
271 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
272 printf("BIOS native execution is only available on x86\n");
278 #ifdef CONFIG_BIOSEMU
281 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
282 printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
290 #ifdef CONFIG_BIOSEMU
293 ret = biosemu_setup(dev, &info);
296 biosemu_set_interrupt_handler(0x15, int15_handler);
297 ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info, true,
298 vesa_mode, &mode_info);
304 bios_set_interrupt_handler(0x15, int15_handler);
306 bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
310 debug("Final vesa mode %#x\n", mode_info.video_mode);