2 * Copyright (C) 2014 Google, Inc
4 * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
7 * Copyright (C) 2003-2004 Linux Networx
8 * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
9 * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com>
10 * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
11 * Copyright (C) 2005-2006 Tyan
12 * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
13 * Copyright (C) 2005-2009 coresystems GmbH
14 * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
16 * PCI Bus Services, see include/linux/pci.h for further explanation.
18 * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
19 * David Mosberger-Tang
21 * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
23 * SPDX-License-Identifier: GPL-2.0
27 #include <bios_emul.h>
35 #ifdef CONFIG_HAVE_ACPI_RESUME
39 __weak bool board_should_run_oprom(pci_dev_t dev)
44 static bool should_load_oprom(pci_dev_t dev)
46 #ifdef CONFIG_HAVE_ACPI_RESUME
47 if (acpi_get_slp_type() == 3)
50 if (IS_ENABLED(CONFIG_ALWAYS_LOAD_OPROM))
52 if (board_should_run_oprom(dev))
58 __weak uint32_t board_map_oprom_vendev(uint32_t vendev)
63 static int pci_rom_probe(pci_dev_t dev, uint class,
64 struct pci_rom_header **hdrp)
66 struct pci_rom_header *rom_header;
67 struct pci_rom_data *rom_data;
69 u16 rom_vendor, rom_device;
74 pci_read_config_word(dev, PCI_VENDOR_ID, &vendor);
75 pci_read_config_word(dev, PCI_DEVICE_ID, &device);
76 vendev = vendor << 16 | device;
77 mapped_vendev = board_map_oprom_vendev(vendev);
78 if (vendev != mapped_vendev)
79 debug("Device ID mapped to %#08x\n", mapped_vendev);
81 #ifdef CONFIG_X86_OPTION_ROM_ADDR
82 rom_address = CONFIG_X86_OPTION_ROM_ADDR;
84 pci_write_config_dword(dev, PCI_ROM_ADDRESS, (u32)PCI_ROM_ADDRESS_MASK);
85 pci_read_config_dword(dev, PCI_ROM_ADDRESS, &rom_address);
86 if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
87 debug("%s: rom_address=%x\n", __func__, rom_address);
91 /* Enable expansion ROM address decoding. */
92 pci_write_config_dword(dev, PCI_ROM_ADDRESS,
93 rom_address | PCI_ROM_ADDRESS_ENABLE);
95 debug("Option ROM address %x\n", rom_address);
96 rom_header = (struct pci_rom_header *)rom_address;
98 debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
99 le16_to_cpu(rom_header->signature),
100 rom_header->size * 512, le16_to_cpu(rom_header->data));
102 if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
103 printf("Incorrect expansion ROM header signature %04x\n",
104 le16_to_cpu(rom_header->signature));
108 rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
109 rom_vendor = le16_to_cpu(rom_data->vendor);
110 rom_device = le16_to_cpu(rom_data->device);
112 debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
113 rom_vendor, rom_device);
115 /* If the device id is mapped, a mismatch is expected */
116 if ((vendor != rom_vendor || device != rom_device) &&
117 (vendev == mapped_vendev)) {
118 printf("ID mismatch: vendor ID %04x, device ID %04x\n",
119 rom_vendor, rom_device);
120 /* Continue anyway */
123 debug("PCI ROM image, Class Code %04x%02x, Code Type %02x\n",
124 rom_data->class_hi, rom_data->class_lo, rom_data->type);
126 if (class != ((rom_data->class_hi << 8) | rom_data->class_lo)) {
127 debug("Class Code mismatch ROM %08x, dev %08x\n",
128 (rom_data->class_hi << 8) | rom_data->class_lo,
136 int pci_rom_load(uint16_t class, struct pci_rom_header *rom_header,
137 struct pci_rom_header **ram_headerp)
139 struct pci_rom_data *rom_data;
140 unsigned int rom_size;
141 unsigned int image_size = 0;
145 /* Get next image, until we see an x86 version */
146 rom_header = (struct pci_rom_header *)((void *)rom_header +
149 rom_data = (struct pci_rom_data *)((void *)rom_header +
150 le16_to_cpu(rom_header->data));
152 image_size = le16_to_cpu(rom_data->ilen) * 512;
153 } while ((rom_data->type != 0) && (rom_data->indicator == 0));
155 if (rom_data->type != 0)
158 rom_size = rom_header->size * 512;
160 #ifdef PCI_VGA_RAM_IMAGE_START
161 target = (void *)PCI_VGA_RAM_IMAGE_START;
163 target = (void *)malloc(rom_size);
167 if (target != rom_header) {
168 ulong start = get_timer(0);
170 debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
171 rom_header, target, rom_size);
172 memcpy(target, rom_header, rom_size);
173 if (memcmp(target, rom_header, rom_size)) {
174 printf("VGA ROM copy failed\n");
177 debug("Copy took %lums\n", get_timer(start));
179 *ram_headerp = target;
184 static struct vbe_mode_info mode_info;
186 int vbe_get_video_info(struct graphic_device *gdev)
188 #ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
189 struct vesa_mode_info *vesa = &mode_info.vesa;
191 gdev->winSizeX = vesa->x_resolution;
192 gdev->winSizeY = vesa->y_resolution;
194 gdev->plnSizeX = vesa->x_resolution;
195 gdev->plnSizeY = vesa->y_resolution;
197 gdev->gdfBytesPP = vesa->bits_per_pixel / 8;
199 switch (vesa->bits_per_pixel) {
201 gdev->gdfIndex = GDF_32BIT_X888RGB;
204 gdev->gdfIndex = GDF_16BIT_565RGB;
207 gdev->gdfIndex = GDF__8BIT_INDEX;
211 gdev->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS;
212 gdev->pciBase = vesa->phys_base_ptr;
214 gdev->frameAdrs = vesa->phys_base_ptr;
215 gdev->memSize = vesa->bytes_per_scanline * vesa->y_resolution;
217 gdev->vprBase = vesa->phys_base_ptr;
218 gdev->cprBase = vesa->phys_base_ptr;
220 return gdev->winSizeX ? 0 : -ENOSYS;
226 int pci_run_vga_bios(pci_dev_t dev, int (*int15_handler)(void), bool emulate)
228 struct pci_rom_header *rom, *ram;
233 /* Only execute VGA ROMs */
234 pci_read_config_word(dev, PCI_CLASS_DEVICE, &class);
235 if ((class ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
236 debug("%s: Class %#x, should be %#x\n", __func__, class,
237 PCI_CLASS_DISPLAY_VGA);
241 if (!should_load_oprom(dev))
244 ret = pci_rom_probe(dev, class, &rom);
248 ret = pci_rom_load(class, rom, &ram);
252 if (!board_should_run_oprom(dev))
255 #if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
256 defined(CONFIG_FRAMEBUFFER_VESA_MODE)
257 vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
259 debug("Selected vesa mode %#x\n", vesa_mode);
261 #ifdef CONFIG_BIOSEMU
264 ret = biosemu_setup(dev, &info);
267 biosemu_set_interrupt_handler(0x15, int15_handler);
268 ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info, true,
269 vesa_mode, &mode_info);
273 printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
278 bios_set_interrupt_handler(0x15, int15_handler);
280 bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
283 printf("BIOS native execution is only available on x86\n");
287 debug("Final vesa mode %#x\n", mode_info.video_mode);