2 * Copyright (C) 2015 Google, Inc
3 * Written by Simon Glass <sjg@chromium.org>
5 * Based on Rockchip's drivers/power/pmic/pmic_rk808.c:
6 * Copyright (C) 2012 rockchips
7 * zyw <zyw@rock-chips.com>
9 * SPDX-License-Identifier: GPL-2.0+
15 #include <power/rk8xx_pmic.h>
16 #include <power/pmic.h>
17 #include <power/regulator.h>
19 #ifndef CONFIG_SPL_BUILD
23 /* Field Definitions */
24 #define RK808_BUCK_VSEL_MASK 0x3f
25 #define RK808_BUCK4_VSEL_MASK 0xf
26 #define RK808_LDO_VSEL_MASK 0x1f
28 #define RK818_BUCK_VSEL_MASK 0x3f
29 #define RK818_BUCK4_VSEL_MASK 0x1f
30 #define RK818_LDO_VSEL_MASK 0x1f
31 #define RK818_LDO3_ON_VSEL_MASK 0xf
32 #define RK818_BOOST_ON_VSEL_MASK 0xe0
34 struct rk8xx_reg_info {
41 static const struct rk8xx_reg_info rk808_buck[] = {
42 { 712500, 12500, REG_BUCK1_ON_VSEL, RK808_BUCK_VSEL_MASK, },
43 { 712500, 12500, REG_BUCK2_ON_VSEL, RK808_BUCK_VSEL_MASK, },
44 { 712500, 12500, -1, RK808_BUCK_VSEL_MASK, },
45 { 1800000, 100000, REG_BUCK4_ON_VSEL, RK808_BUCK4_VSEL_MASK, },
48 static const struct rk8xx_reg_info rk818_buck[] = {
49 { 712500, 12500, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, },
50 { 712500, 12500, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, },
51 { 712500, 12500, -1, RK818_BUCK_VSEL_MASK, },
52 { 1800000, 100000, REG_BUCK4_ON_VSEL, RK818_BUCK4_VSEL_MASK, },
56 static const struct rk8xx_reg_info rk808_ldo[] = {
57 { 1800000, 100000, REG_LDO1_ON_VSEL, RK808_LDO_VSEL_MASK, },
58 { 1800000, 100000, REG_LDO2_ON_VSEL, RK808_LDO_VSEL_MASK, },
59 { 800000, 100000, REG_LDO3_ON_VSEL, RK808_BUCK4_VSEL_MASK, },
60 { 1800000, 100000, REG_LDO4_ON_VSEL, RK808_LDO_VSEL_MASK, },
61 { 1800000, 100000, REG_LDO5_ON_VSEL, RK808_LDO_VSEL_MASK, },
62 { 800000, 100000, REG_LDO6_ON_VSEL, RK808_LDO_VSEL_MASK, },
63 { 800000, 100000, REG_LDO7_ON_VSEL, RK808_LDO_VSEL_MASK, },
64 { 1800000, 100000, REG_LDO8_ON_VSEL, RK808_LDO_VSEL_MASK, },
67 static const struct rk8xx_reg_info rk818_ldo[] = {
68 { 1800000, 100000, REG_LDO1_ON_VSEL, RK818_LDO_VSEL_MASK, },
69 { 1800000, 100000, REG_LDO2_ON_VSEL, RK818_LDO_VSEL_MASK, },
70 { 800000, 100000, REG_LDO3_ON_VSEL, RK818_LDO3_ON_VSEL_MASK, },
71 { 1800000, 100000, REG_LDO4_ON_VSEL, RK818_LDO_VSEL_MASK, },
72 { 1800000, 100000, REG_LDO5_ON_VSEL, RK818_LDO_VSEL_MASK, },
73 { 800000, 100000, REG_LDO6_ON_VSEL, RK818_LDO_VSEL_MASK, },
74 { 800000, 100000, REG_LDO7_ON_VSEL, RK818_LDO_VSEL_MASK, },
75 { 1800000, 100000, REG_LDO8_ON_VSEL, RK818_LDO_VSEL_MASK, },
79 static const struct rk8xx_reg_info *get_buck_reg(struct udevice *pmic,
82 struct rk8xx_priv *priv = dev_get_priv(pmic);
83 switch (priv->variant) {
85 return &rk818_buck[num];
87 return &rk808_buck[num];
91 static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
93 const struct rk8xx_reg_info *info = get_buck_reg(pmic, buck - 1);
94 int mask = info->vsel_mask;
97 if (info->vsel_reg == -1)
99 val = (uvolt - info->min_uv) / info->step_uv;
100 debug("%s: reg=%x, mask=%x, val=%x\n", __func__, info->vsel_reg, mask,
103 return pmic_clrsetbits(pmic, info->vsel_reg, mask, val);
106 static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
114 ret = pmic_clrsetbits(pmic, REG_DCDC_ILMAX, 0, 3 << (buck * 2));
117 ret = pmic_clrsetbits(pmic, REG_DCDC_UV_ACT, 1 << buck, 0);
122 return pmic_clrsetbits(pmic, REG_DCDC_EN, mask, enable ? mask : 0);
126 static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic,
129 struct rk8xx_priv *priv = dev_get_priv(pmic);
130 switch (priv->variant) {
132 return &rk818_ldo[num];
134 return &rk808_ldo[num];
138 static int buck_get_value(struct udevice *dev)
140 int buck = dev->driver_data - 1;
141 const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck);
142 int mask = info->vsel_mask;
145 if (info->vsel_reg == -1)
147 ret = pmic_reg_read(dev->parent, info->vsel_reg);
152 return info->min_uv + val * info->step_uv;
155 static int buck_set_value(struct udevice *dev, int uvolt)
157 int buck = dev->driver_data;
159 return _buck_set_value(dev->parent, buck, uvolt);
162 static int buck_set_enable(struct udevice *dev, bool enable)
164 int buck = dev->driver_data;
166 return _buck_set_enable(dev->parent, buck, enable);
169 static bool buck_get_enable(struct udevice *dev)
171 int buck = dev->driver_data - 1;
177 ret = pmic_reg_read(dev->parent, REG_DCDC_EN);
181 return ret & mask ? true : false;
184 static int ldo_get_value(struct udevice *dev)
186 int ldo = dev->driver_data - 1;
187 const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo);
188 int mask = info->vsel_mask;
191 if (info->vsel_reg == -1)
193 ret = pmic_reg_read(dev->parent, info->vsel_reg);
198 return info->min_uv + val * info->step_uv;
201 static int ldo_set_value(struct udevice *dev, int uvolt)
203 int ldo = dev->driver_data - 1;
204 const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo);
205 int mask = info->vsel_mask;
208 if (info->vsel_reg == -1)
210 val = (uvolt - info->min_uv) / info->step_uv;
211 debug("%s: reg=%x, mask=%x, val=%x\n", __func__, info->vsel_reg, mask,
214 return pmic_clrsetbits(dev->parent, info->vsel_reg, mask, val);
217 static int ldo_set_enable(struct udevice *dev, bool enable)
219 int ldo = dev->driver_data - 1;
224 return pmic_clrsetbits(dev->parent, REG_LDO_EN, mask,
228 static bool ldo_get_enable(struct udevice *dev)
230 int ldo = dev->driver_data - 1;
236 ret = pmic_reg_read(dev->parent, REG_LDO_EN);
240 return ret & mask ? true : false;
243 static int switch_set_enable(struct udevice *dev, bool enable)
245 int sw = dev->driver_data - 1;
248 mask = 1 << (sw + 5);
250 return pmic_clrsetbits(dev->parent, REG_DCDC_EN, mask,
254 static bool switch_get_enable(struct udevice *dev)
256 int sw = dev->driver_data - 1;
260 mask = 1 << (sw + 5);
262 ret = pmic_reg_read(dev->parent, REG_DCDC_EN);
266 return ret & mask ? true : false;
269 static int rk8xx_buck_probe(struct udevice *dev)
271 struct dm_regulator_uclass_platdata *uc_pdata;
273 uc_pdata = dev_get_uclass_platdata(dev);
275 uc_pdata->type = REGULATOR_TYPE_BUCK;
276 uc_pdata->mode_count = 0;
281 static int rk8xx_ldo_probe(struct udevice *dev)
283 struct dm_regulator_uclass_platdata *uc_pdata;
285 uc_pdata = dev_get_uclass_platdata(dev);
287 uc_pdata->type = REGULATOR_TYPE_LDO;
288 uc_pdata->mode_count = 0;
293 static int rk8xx_switch_probe(struct udevice *dev)
295 struct dm_regulator_uclass_platdata *uc_pdata;
297 uc_pdata = dev_get_uclass_platdata(dev);
299 uc_pdata->type = REGULATOR_TYPE_FIXED;
300 uc_pdata->mode_count = 0;
305 static const struct dm_regulator_ops rk8xx_buck_ops = {
306 .get_value = buck_get_value,
307 .set_value = buck_set_value,
308 .get_enable = buck_get_enable,
309 .set_enable = buck_set_enable,
312 static const struct dm_regulator_ops rk8xx_ldo_ops = {
313 .get_value = ldo_get_value,
314 .set_value = ldo_set_value,
315 .get_enable = ldo_get_enable,
316 .set_enable = ldo_set_enable,
319 static const struct dm_regulator_ops rk8xx_switch_ops = {
320 .get_enable = switch_get_enable,
321 .set_enable = switch_set_enable,
324 U_BOOT_DRIVER(rk8xx_buck) = {
325 .name = "rk8xx_buck",
326 .id = UCLASS_REGULATOR,
327 .ops = &rk8xx_buck_ops,
328 .probe = rk8xx_buck_probe,
331 U_BOOT_DRIVER(rk8xx_ldo) = {
333 .id = UCLASS_REGULATOR,
334 .ops = &rk8xx_ldo_ops,
335 .probe = rk8xx_ldo_probe,
338 U_BOOT_DRIVER(rk8xx_switch) = {
339 .name = "rk8xx_switch",
340 .id = UCLASS_REGULATOR,
341 .ops = &rk8xx_switch_ops,
342 .probe = rk8xx_switch_probe,
346 int rk8xx_spl_configure_buck(struct udevice *pmic, int buck, int uvolt)
350 ret = _buck_set_value(pmic, buck, uvolt);
354 return _buck_set_enable(pmic, buck, true);