2 * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
4 * Derived from linux/arch/mips/bcm63xx/cpu.c:
5 * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
6 * Copyright (C) 2009 Florian Fainelli <florian@openwrt.org>
8 * SPDX-License-Identifier: GPL-2.0+
15 #include <dm/device.h>
17 #define MEMC_CFG_REG 0x4
18 #define MEMC_CFG_32B_SHIFT 1
19 #define MEMC_CFG_32B_MASK (1 << MEMC_CFG_32B_SHIFT)
20 #define MEMC_CFG_COL_SHIFT 3
21 #define MEMC_CFG_COL_MASK (0x3 << MEMC_CFG_COL_SHIFT)
22 #define MEMC_CFG_ROW_SHIFT 6
23 #define MEMC_CFG_ROW_MASK (0x3 << MEMC_CFG_ROW_SHIFT)
25 #define DDR_CSEND_REG 0x8
27 struct bmips_ram_priv;
30 ulong (*get_ram_size)(struct bmips_ram_priv *);
33 struct bmips_ram_priv {
35 const struct bmips_ram_hw *hw;
38 static ulong bcm6328_get_ram_size(struct bmips_ram_priv *priv)
40 return readl_be(priv->regs + DDR_CSEND_REG) << 24;
43 static ulong bcm6358_get_ram_size(struct bmips_ram_priv *priv)
45 unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0;
48 val = readl_be(priv->regs + MEMC_CFG_REG);
49 rows = (val & MEMC_CFG_ROW_MASK) >> MEMC_CFG_ROW_SHIFT;
50 cols = (val & MEMC_CFG_COL_MASK) >> MEMC_CFG_COL_SHIFT;
51 is_32bits = (val & MEMC_CFG_32B_MASK) ? 0 : 1;
54 /* 0 => 11 address bits ... 2 => 13 address bits */
57 /* 0 => 8 address bits ... 2 => 10 address bits */
60 return 1 << (cols + rows + (is_32bits + 1) + banks);
63 static int bmips_ram_get_info(struct udevice *dev, struct ram_info *info)
65 struct bmips_ram_priv *priv = dev_get_priv(dev);
66 const struct bmips_ram_hw *hw = priv->hw;
68 info->base = 0x80000000;
69 info->size = hw->get_ram_size(priv);
74 static const struct ram_ops bmips_ram_ops = {
75 .get_info = bmips_ram_get_info,
78 static const struct bmips_ram_hw bmips_ram_bcm6328 = {
79 .get_ram_size = bcm6328_get_ram_size,
82 static const struct bmips_ram_hw bmips_ram_bcm6358 = {
83 .get_ram_size = bcm6358_get_ram_size,
86 static const struct udevice_id bmips_ram_ids[] = {
88 .compatible = "brcm,bcm6328-mc",
89 .data = (ulong)&bmips_ram_bcm6328,
91 .compatible = "brcm,bcm6358-mc",
92 .data = (ulong)&bmips_ram_bcm6358,
96 static int bmips_ram_probe(struct udevice *dev)
98 struct bmips_ram_priv *priv = dev_get_priv(dev);
99 const struct bmips_ram_hw *hw =
100 (const struct bmips_ram_hw *)dev_get_driver_data(dev);
104 addr = dev_get_addr_size_index(dev, 0, &size);
105 if (addr == FDT_ADDR_T_NONE)
108 priv->regs = ioremap(addr, size);
114 U_BOOT_DRIVER(bmips_ram) = {
117 .of_match = bmips_ram_ids,
118 .probe = bmips_ram_probe,
119 .priv_auto_alloc_size = sizeof(struct bmips_ram_priv),
120 .ops = &bmips_ram_ops,
121 .flags = DM_FLAG_PRE_RELOC,