3 * originally from linux source (arch/powerpc/boot/ns16550.c)
4 * modified to use CONFIG_SYS_ISA_MEM and new defines
15 #include <linux/types.h>
18 DECLARE_GLOBAL_DATA_PTR;
20 #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
21 #define UART_MCRVAL (UART_MCR_DTR | \
22 UART_MCR_RTS) /* RTS/DTR */
24 #ifndef CONFIG_DM_SERIAL
25 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
26 #define serial_out(x, y) outb(x, (ulong)y)
27 #define serial_in(y) inb((ulong)y)
28 #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
29 #define serial_out(x, y) out_be32(y, x)
30 #define serial_in(y) in_be32(y)
31 #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
32 #define serial_out(x, y) out_le32(y, x)
33 #define serial_in(y) in_le32(y)
35 #define serial_out(x, y) writeb(x, y)
36 #define serial_in(y) readb(y)
38 #endif /* !CONFIG_DM_SERIAL */
40 #if defined(CONFIG_SOC_KEYSTONE)
41 #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
42 #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
44 #ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
45 #define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE)
47 #define UART_MCRVAL (UART_MCR_RTS)
51 #ifndef CONFIG_SYS_NS16550_IER
52 #define CONFIG_SYS_NS16550_IER 0x00
53 #endif /* CONFIG_SYS_NS16550_IER */
55 static inline void serial_out_shift(void *addr, int shift, int value)
57 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
58 outb(value, (ulong)addr);
59 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
60 out_le32(addr, value);
61 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
62 out_be32(addr, value);
63 #elif defined(CONFIG_SYS_NS16550_MEM32)
65 #elif defined(CONFIG_SYS_BIG_ENDIAN)
66 writeb(value, addr + (1 << shift) - 1);
72 static inline int serial_in_shift(void *addr, int shift)
74 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
75 return inb((ulong)addr);
76 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
78 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
80 #elif defined(CONFIG_SYS_NS16550_MEM32)
82 #elif defined(CONFIG_SYS_BIG_ENDIAN)
83 return readb(addr + (1 << shift) - 1);
89 #ifdef CONFIG_DM_SERIAL
91 #ifndef CONFIG_SYS_NS16550_CLK
92 #define CONFIG_SYS_NS16550_CLK 0
95 static void ns16550_writeb(NS16550_t port, int offset, int value)
97 struct ns16550_platdata *plat = port->plat;
100 offset *= 1 << plat->reg_shift;
101 addr = (unsigned char *)plat->base + offset;
104 * As far as we know it doesn't make sense to support selection of
105 * these options at run-time, so use the existing CONFIG options.
107 serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value);
110 static int ns16550_readb(NS16550_t port, int offset)
112 struct ns16550_platdata *plat = port->plat;
115 offset *= 1 << plat->reg_shift;
116 addr = (unsigned char *)plat->base + offset;
118 return serial_in_shift(addr + plat->reg_offset, plat->reg_shift);
121 static u32 ns16550_getfcr(NS16550_t port)
123 struct ns16550_platdata *plat = port->plat;
128 /* We can clean these up once everything is moved to driver model */
129 #define serial_out(value, addr) \
130 ns16550_writeb(com_port, \
131 (unsigned char *)addr - (unsigned char *)com_port, value)
132 #define serial_in(addr) \
133 ns16550_readb(com_port, \
134 (unsigned char *)addr - (unsigned char *)com_port)
136 static u32 ns16550_getfcr(NS16550_t port)
138 return UART_FCR_DEFVAL;
142 int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
144 const unsigned int mode_x_div = 16;
146 return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
149 static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
151 serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
152 serial_out(baud_divisor & 0xff, &com_port->dll);
153 serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
154 serial_out(UART_LCRVAL, &com_port->lcr);
157 void NS16550_init(NS16550_t com_port, int baud_divisor)
159 #if (defined(CONFIG_SPL_BUILD) && \
160 (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
162 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
163 * before SPL starts only THRE bit is set. We have to empty the
164 * transmitter before initialization starts.
166 if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
168 if (baud_divisor != -1)
169 NS16550_setbrg(com_port, baud_divisor);
170 serial_out(0, &com_port->mdr1);
174 while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
177 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
178 #if defined(CONFIG_ARCH_OMAP2PLUS)
179 serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
182 serial_out(UART_MCRVAL, &com_port->mcr);
183 serial_out(ns16550_getfcr(com_port), &com_port->fcr);
184 if (baud_divisor != -1)
185 NS16550_setbrg(com_port, baud_divisor);
186 #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX)
187 /* /16 is proper to hit 115200 with 48MHz */
188 serial_out(0, &com_port->mdr1);
190 #if defined(CONFIG_SOC_KEYSTONE)
191 serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
195 #ifndef CONFIG_NS16550_MIN_FUNCTIONS
196 void NS16550_reinit(NS16550_t com_port, int baud_divisor)
198 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
199 NS16550_setbrg(com_port, 0);
200 serial_out(UART_MCRVAL, &com_port->mcr);
201 serial_out(ns16550_getfcr(com_port), &com_port->fcr);
202 NS16550_setbrg(com_port, baud_divisor);
204 #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
206 void NS16550_putc(NS16550_t com_port, char c)
208 while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
210 serial_out(c, &com_port->thr);
213 * Call watchdog_reset() upon newline. This is done here in putc
214 * since the environment code uses a single puts() to print the complete
215 * environment upon "printenv". So we can't put this watchdog call
222 #ifndef CONFIG_NS16550_MIN_FUNCTIONS
223 char NS16550_getc(NS16550_t com_port)
225 while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
226 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
227 extern void usbtty_poll(void);
232 return serial_in(&com_port->rbr);
235 int NS16550_tstc(NS16550_t com_port)
237 return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
240 #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
242 #ifdef CONFIG_DEBUG_UART_NS16550
244 #include <debug_uart.h>
246 static inline void _debug_uart_init(void)
248 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
252 * We copy the code from above because it is already horribly messy.
253 * Trying to refactor to nicely remove the duplication doesn't seem
254 * feasible. The better fix is to move all users of this driver to
257 baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
259 serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
260 serial_dout(&com_port->mcr, UART_MCRVAL);
261 serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
263 serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
264 serial_dout(&com_port->dll, baud_divisor & 0xff);
265 serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
266 serial_dout(&com_port->lcr, UART_LCRVAL);
269 static inline void _debug_uart_putc(int ch)
271 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
273 while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
275 serial_dout(&com_port->thr, ch);
282 #ifdef CONFIG_DEBUG_UART_OMAP
284 #include <debug_uart.h>
286 static inline void _debug_uart_init(void)
288 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
291 baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
293 serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
294 serial_dout(&com_port->mdr1, 0x7);
295 serial_dout(&com_port->mcr, UART_MCRVAL);
296 serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
298 serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
299 serial_dout(&com_port->dll, baud_divisor & 0xff);
300 serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
301 serial_dout(&com_port->lcr, UART_LCRVAL);
302 serial_dout(&com_port->mdr1, 0x0);
305 static inline void _debug_uart_putc(int ch)
307 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
309 while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
311 serial_dout(&com_port->thr, ch);
318 #ifdef CONFIG_DM_SERIAL
319 static int ns16550_serial_putc(struct udevice *dev, const char ch)
321 struct NS16550 *const com_port = dev_get_priv(dev);
323 if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
325 serial_out(ch, &com_port->thr);
328 * Call watchdog_reset() upon newline. This is done here in putc
329 * since the environment code uses a single puts() to print the complete
330 * environment upon "printenv". So we can't put this watchdog call
339 static int ns16550_serial_pending(struct udevice *dev, bool input)
341 struct NS16550 *const com_port = dev_get_priv(dev);
344 return (serial_in(&com_port->lsr) & UART_LSR_DR) ? 1 : 0;
346 return (serial_in(&com_port->lsr) & UART_LSR_THRE) ? 0 : 1;
349 static int ns16550_serial_getc(struct udevice *dev)
351 struct NS16550 *const com_port = dev_get_priv(dev);
353 if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
356 return serial_in(&com_port->rbr);
359 static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
361 struct NS16550 *const com_port = dev_get_priv(dev);
362 struct ns16550_platdata *plat = com_port->plat;
365 clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
367 NS16550_setbrg(com_port, clock_divisor);
372 int ns16550_serial_probe(struct udevice *dev)
374 struct NS16550 *const com_port = dev_get_priv(dev);
375 struct reset_ctl_bulk reset_bulk;
378 ret = reset_get_bulk(dev, &reset_bulk);
380 reset_deassert_bulk(&reset_bulk);
382 com_port->plat = dev_get_platdata(dev);
383 NS16550_init(com_port, -1);
388 #if CONFIG_IS_ENABLED(OF_CONTROL)
395 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
396 int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
398 struct ns16550_platdata *plat = dev->platdata;
399 const u32 port_type = dev_get_driver_data(dev);
404 /* try Processor Local Bus device first */
405 addr = dev_read_addr(dev);
406 #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
407 if (addr == FDT_ADDR_T_NONE) {
408 /* then try pci device */
409 struct fdt_pci_addr pci_addr;
413 /* we prefer to use a memory-mapped register */
414 ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev),
415 FDT_PCI_SPACE_MEM32, "reg",
418 /* try if there is any i/o-mapped register */
419 ret = fdtdec_get_pci_addr(gd->fdt_blob,
427 ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar);
435 if (addr == FDT_ADDR_T_NONE)
438 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
441 plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
444 plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
445 plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
447 err = clk_get_by_index(dev, 0, &clk);
449 err = clk_get_rate(&clk);
450 if (!IS_ERR_VALUE(err))
452 } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
453 debug("ns16550 failed to get clock\n");
458 plat->clock = dev_read_u32_default(dev, "clock-frequency",
459 CONFIG_SYS_NS16550_CLK);
461 debug("ns16550 clock not defined\n");
465 plat->fcr = UART_FCR_DEFVAL;
466 if (port_type == PORT_JZ4780)
467 plat->fcr |= UART_FCR_UME;
473 const struct dm_serial_ops ns16550_serial_ops = {
474 .putc = ns16550_serial_putc,
475 .pending = ns16550_serial_pending,
476 .getc = ns16550_serial_getc,
477 .setbrg = ns16550_serial_setbrg,
480 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
482 * Please consider existing compatible strings before adding a new
483 * one to keep this table compact. Or you may add a generic "ns16550"
484 * compatible string to your dts.
486 static const struct udevice_id ns16550_serial_ids[] = {
487 { .compatible = "ns16550", .data = PORT_NS16550 },
488 { .compatible = "ns16550a", .data = PORT_NS16550 },
489 { .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 },
490 { .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 },
491 { .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 },
492 { .compatible = "ti,omap2-uart", .data = PORT_NS16550 },
493 { .compatible = "ti,omap3-uart", .data = PORT_NS16550 },
494 { .compatible = "ti,omap4-uart", .data = PORT_NS16550 },
495 { .compatible = "ti,am3352-uart", .data = PORT_NS16550 },
496 { .compatible = "ti,am4372-uart", .data = PORT_NS16550 },
497 { .compatible = "ti,dra742-uart", .data = PORT_NS16550 },
500 #endif /* OF_CONTROL && !OF_PLATDATA */
502 #if CONFIG_IS_ENABLED(SERIAL_PRESENT)
504 /* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
505 #if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL)
506 U_BOOT_DRIVER(ns16550_serial) = {
507 .name = "ns16550_serial",
509 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
510 .of_match = ns16550_serial_ids,
511 .ofdata_to_platdata = ns16550_serial_ofdata_to_platdata,
512 .platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
514 .priv_auto_alloc_size = sizeof(struct NS16550),
515 .probe = ns16550_serial_probe,
516 .ops = &ns16550_serial_ops,
517 .flags = DM_FLAG_PRE_RELOC,
520 #endif /* SERIAL_PRESENT */
522 #endif /* CONFIG_DM_SERIAL */