2 * Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de>
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 /* i.MX27 has a completely wrong register layout and register definitions in the
28 * datasheet, the correct one is in the Freescale's Linux driver */
30 #error "i.MX27 CSPI not supported due to drastic differences in register definisions" \
31 "See linux mxc_spi driver from Freescale for details."
35 #define MXC_CSPIRXDATA 0x00
36 #define MXC_CSPITXDATA 0x04
37 #define MXC_CSPICTRL 0x08
38 #define MXC_CSPIINT 0x0C
39 #define MXC_CSPIDMA 0x10
40 #define MXC_CSPISTAT 0x14
41 #define MXC_CSPIPERIOD 0x18
42 #define MXC_CSPITEST 0x1C
43 #define MXC_CSPIRESET 0x00
45 #define MXC_CSPICTRL_EN (1 << 0)
46 #define MXC_CSPICTRL_MODE (1 << 1)
47 #define MXC_CSPICTRL_XCH (1 << 2)
48 #define MXC_CSPICTRL_SMC (1 << 3)
49 #define MXC_CSPICTRL_POL (1 << 4)
50 #define MXC_CSPICTRL_PHA (1 << 5)
51 #define MXC_CSPICTRL_SSCTL (1 << 6)
52 #define MXC_CSPICTRL_SSPOL (1 << 7)
53 #define MXC_CSPICTRL_CHIPSELECT(x) (((x) & 0x3) << 24)
54 #define MXC_CSPICTRL_BITCOUNT(x) (((x) & 0x1f) << 8)
55 #define MXC_CSPICTRL_DATARATE(x) (((x) & 0x7) << 16)
57 #define MXC_CSPIPERIOD_32KHZ (1 << 15)
59 static unsigned long spi_bases[] = {
67 struct mxc_spi_slave {
68 struct spi_slave slave;
73 static inline struct mxc_spi_slave *to_mxc_spi_slave(struct spi_slave *slave)
75 return container_of(slave, struct mxc_spi_slave, slave);
78 static inline u32 reg_read(unsigned long addr)
80 return *(volatile unsigned long*)addr;
83 static inline void reg_write(unsigned long addr, u32 val)
85 *(volatile unsigned long*)addr = val;
88 static u32 spi_xchg_single(struct spi_slave *slave, u32 data, int bitlen)
90 struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
91 unsigned int cfg_reg = reg_read(mxcs->base + MXC_CSPICTRL);
93 mxcs->ctrl_reg = (mxcs->ctrl_reg & ~MXC_CSPICTRL_BITCOUNT(31)) |
94 MXC_CSPICTRL_BITCOUNT(bitlen - 1);
96 if (cfg_reg != mxcs->ctrl_reg)
97 reg_write(mxcs->base + MXC_CSPICTRL, mxcs->ctrl_reg);
99 reg_write(mxcs->base + MXC_CSPITXDATA, data);
101 reg_write(mxcs->base + MXC_CSPICTRL, mxcs->ctrl_reg | MXC_CSPICTRL_XCH);
103 while (reg_read(mxcs->base + MXC_CSPICTRL) & MXC_CSPICTRL_XCH)
106 return reg_read(mxcs->base + MXC_CSPIRXDATA);
109 int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
110 void *din, unsigned long flags)
112 int n_blks = (bitlen + 31) / 32;
116 if ((int)dout & 3 || (int)din & 3) {
117 printf("Error: unaligned buffers in: %p, out: %p\n", din, dout);
121 for (i = 0, in_l = (u32 *)din, out_l = (u32 *)dout;
123 i++, in_l++, out_l++, bitlen -= 32) {
124 u32 data = spi_xchg_single(slave, *out_l, bitlen);
126 /* Check if we're only transfering 8 or 16 bits */
130 else if (bitlen < 17)
142 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
143 unsigned int max_hz, unsigned int mode)
145 unsigned int ctrl_reg;
146 struct mxc_spi_slave *mxcs;
148 if (bus >= sizeof(spi_bases) / sizeof(spi_bases[0]) ||
152 ctrl_reg = MXC_CSPICTRL_CHIPSELECT(cs) |
153 MXC_CSPICTRL_BITCOUNT(31) |
154 MXC_CSPICTRL_DATARATE(7) | /* FIXME: calculate data rate */
159 ctrl_reg |= MXC_CSPICTRL_PHA;
160 if (!(mode & SPI_CPOL))
161 ctrl_reg |= MXC_CSPICTRL_POL;
162 if (mode & SPI_CS_HIGH)
163 ctrl_reg |= MXC_CSPICTRL_SSPOL;
165 mxcs = malloc(sizeof(struct mxc_spi_slave));
169 mxcs->slave.bus = bus;
171 mxcs->base = spi_bases[bus];
172 mxcs->ctrl_reg = ctrl_reg;
177 void spi_free_slave(struct spi_slave *slave)
179 struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
184 int spi_claim_bus(struct spi_slave *slave)
186 struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave);
188 reg_write(mxcs->base + MXC_CSPIRESET, 1);
190 reg_write(mxcs->base + MXC_CSPICTRL, mxcs->ctrl_reg);
191 reg_write(mxcs->base + MXC_CSPIPERIOD,
192 MXC_CSPIPERIOD_32KHZ);
193 reg_write(mxcs->base + MXC_CSPIINT, 0);
198 void spi_release_bus(struct spi_slave *slave)
200 /* TODO: Shut the controller down */