2 * Copyright 2011, Marvell Semiconductor Inc.
3 * Lei Wen <leiwen@marvell.com>
5 * SPDX-License-Identifier: GPL-2.0+
7 * Back ported to the 8xx platform (from the 8260 platform) by
8 * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
16 #include <asm/byteorder.h>
17 #include <asm/errno.h>
19 #include <asm/unaligned.h>
20 #include <linux/types.h>
21 #include <linux/usb/ch9.h>
22 #include <linux/usb/gadget.h>
23 #include <usb/ci_udc.h>
24 #include "../host/ehci.h"
28 * Check if the system has too long cachelines. If the cachelines are
29 * longer then 128b, the driver will not be able flush/invalidate data
30 * cache over separate QH entries. We use 128b because one QH entry is
31 * 64b long and there are always two QH list entries for each endpoint.
33 #if ARCH_DMA_MINALIGN > 128
34 #error This driver can not work on systems with caches longer than 128b
38 * Every QTD must be individually aligned, since we can program any
39 * QTD's address into HW. Cache flushing requires ARCH_DMA_MINALIGN,
40 * and the USB HW requires 32-byte alignment. Align to both:
42 #define ILIST_ALIGN roundup(ARCH_DMA_MINALIGN, 32)
43 /* Each QTD is this size */
44 #define ILIST_ENT_RAW_SZ sizeof(struct ept_queue_item)
46 * Align the size of the QTD too, so we can add this value to each
47 * QTD's address to get another aligned address.
49 #define ILIST_ENT_SZ roundup(ILIST_ENT_RAW_SZ, ILIST_ALIGN)
50 /* For each endpoint, we need 2 QTDs, one for each of IN and OUT */
51 #define ILIST_SZ (NUM_ENDPOINTS * 2 * ILIST_ENT_SZ)
54 #define DBG(x...) do {} while (0)
56 #define DBG(x...) printf(x)
57 static const char *reqname(unsigned r)
60 case USB_REQ_GET_STATUS: return "GET_STATUS";
61 case USB_REQ_CLEAR_FEATURE: return "CLEAR_FEATURE";
62 case USB_REQ_SET_FEATURE: return "SET_FEATURE";
63 case USB_REQ_SET_ADDRESS: return "SET_ADDRESS";
64 case USB_REQ_GET_DESCRIPTOR: return "GET_DESCRIPTOR";
65 case USB_REQ_SET_DESCRIPTOR: return "SET_DESCRIPTOR";
66 case USB_REQ_GET_CONFIGURATION: return "GET_CONFIGURATION";
67 case USB_REQ_SET_CONFIGURATION: return "SET_CONFIGURATION";
68 case USB_REQ_GET_INTERFACE: return "GET_INTERFACE";
69 case USB_REQ_SET_INTERFACE: return "SET_INTERFACE";
70 default: return "*UNKNOWN*";
75 static struct usb_endpoint_descriptor ep0_desc = {
76 .bLength = sizeof(struct usb_endpoint_descriptor),
77 .bDescriptorType = USB_DT_ENDPOINT,
78 .bEndpointAddress = USB_DIR_IN,
79 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
82 static int ci_pullup(struct usb_gadget *gadget, int is_on);
83 static int ci_ep_enable(struct usb_ep *ep,
84 const struct usb_endpoint_descriptor *desc);
85 static int ci_ep_disable(struct usb_ep *ep);
86 static int ci_ep_queue(struct usb_ep *ep,
87 struct usb_request *req, gfp_t gfp_flags);
88 static struct usb_request *
89 ci_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags);
90 static void ci_ep_free_request(struct usb_ep *ep, struct usb_request *_req);
92 static struct usb_gadget_ops ci_udc_ops = {
96 static struct usb_ep_ops ci_ep_ops = {
97 .enable = ci_ep_enable,
98 .disable = ci_ep_disable,
100 .alloc_request = ci_ep_alloc_request,
101 .free_request = ci_ep_free_request,
104 /* Init values for USB endpoints. */
105 static const struct usb_ep ci_ep_init[2] = {
111 [1] = { /* EP 1..n */
118 static struct ci_drv controller = {
127 * ci_get_qh() - return queue head for endpoint
128 * @ep_num: Endpoint number
129 * @dir_in: Direction of the endpoint (IN = 1, OUT = 0)
131 * This function returns the QH associated with particular endpoint
132 * and it's direction.
134 static struct ept_queue_head *ci_get_qh(int ep_num, int dir_in)
136 return &controller.epts[(ep_num * 2) + dir_in];
140 * ci_get_qtd() - return queue item for endpoint
141 * @ep_num: Endpoint number
142 * @dir_in: Direction of the endpoint (IN = 1, OUT = 0)
144 * This function returns the QH associated with particular endpoint
145 * and it's direction.
147 static struct ept_queue_item *ci_get_qtd(int ep_num, int dir_in)
149 int index = (ep_num * 2) + dir_in;
150 uint8_t *imem = controller.items_mem + (index * ILIST_ENT_SZ);
151 return (struct ept_queue_item *)imem;
155 * ci_flush_qh - flush cache over queue head
156 * @ep_num: Endpoint number
158 * This function flushes cache over QH for particular endpoint.
160 static void ci_flush_qh(int ep_num)
162 struct ept_queue_head *head = ci_get_qh(ep_num, 0);
163 const uint32_t start = (uint32_t)head;
164 const uint32_t end = start + 2 * sizeof(*head);
166 flush_dcache_range(start, end);
170 * ci_invalidate_qh - invalidate cache over queue head
171 * @ep_num: Endpoint number
173 * This function invalidates cache over QH for particular endpoint.
175 static void ci_invalidate_qh(int ep_num)
177 struct ept_queue_head *head = ci_get_qh(ep_num, 0);
178 uint32_t start = (uint32_t)head;
179 uint32_t end = start + 2 * sizeof(*head);
181 invalidate_dcache_range(start, end);
185 * ci_flush_qtd - flush cache over queue item
186 * @ep_num: Endpoint number
188 * This function flushes cache over qTD pair for particular endpoint.
190 static void ci_flush_qtd(int ep_num)
192 struct ept_queue_item *item = ci_get_qtd(ep_num, 0);
193 const uint32_t start = (uint32_t)item;
194 const uint32_t end = start + 2 * ILIST_ENT_SZ;
196 flush_dcache_range(start, end);
200 * ci_invalidate_qtd - invalidate cache over queue item
201 * @ep_num: Endpoint number
203 * This function invalidates cache over qTD pair for particular endpoint.
205 static void ci_invalidate_qtd(int ep_num)
207 struct ept_queue_item *item = ci_get_qtd(ep_num, 0);
208 const uint32_t start = (uint32_t)item;
209 const uint32_t end = start + 2 * ILIST_ENT_SZ;
211 invalidate_dcache_range(start, end);
214 static struct usb_request *
215 ci_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags)
217 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep);
219 struct ci_req *ci_req;
221 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
222 if (num == 0 && controller.ep0_req)
223 return &controller.ep0_req->req;
225 ci_req = calloc(1, sizeof(*ci_req));
229 INIT_LIST_HEAD(&ci_req->queue);
232 controller.ep0_req = ci_req;
237 static void ci_ep_free_request(struct usb_ep *ep, struct usb_request *req)
239 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep);
240 struct ci_req *ci_req = container_of(req, struct ci_req, req);
243 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
245 if (!controller.ep0_req)
247 controller.ep0_req = 0;
255 static void ep_enable(int num, int in, int maxpacket)
257 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
260 n = readl(&udc->epctrl[num]);
262 n |= (CTRL_TXE | CTRL_TXR | CTRL_TXT_BULK);
264 n |= (CTRL_RXE | CTRL_RXR | CTRL_RXT_BULK);
267 struct ept_queue_head *head = ci_get_qh(num, in);
269 head->config = CONFIG_MAX_PKT(maxpacket) | CONFIG_ZLT;
272 writel(n, &udc->epctrl[num]);
275 static int ci_ep_enable(struct usb_ep *ep,
276 const struct usb_endpoint_descriptor *desc)
278 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep);
280 num = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
281 in = (desc->bEndpointAddress & USB_DIR_IN) != 0;
285 int max = get_unaligned_le16(&desc->wMaxPacketSize);
287 if ((max > 64) && (controller.gadget.speed == USB_SPEED_FULL))
289 if (ep->maxpacket != max) {
290 DBG("%s: from %d to %d\n", __func__,
295 ep_enable(num, in, ep->maxpacket);
296 DBG("%s: num=%d maxpacket=%d\n", __func__, num, ep->maxpacket);
300 static int ci_ep_disable(struct usb_ep *ep)
302 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep);
308 static int ci_bounce(struct ci_req *ci_req, int in)
310 struct usb_request *req = &ci_req->req;
311 uint32_t addr = (uint32_t)req->buf;
313 uint32_t aligned_used_len;
315 /* Input buffer address is not aligned. */
316 if (addr & (ARCH_DMA_MINALIGN - 1))
319 /* Input buffer length is not aligned. */
320 if (req->length & (ARCH_DMA_MINALIGN - 1))
323 /* The buffer is well aligned, only flush cache. */
324 ci_req->hw_len = req->length;
325 ci_req->hw_buf = req->buf;
329 if (ci_req->b_buf && req->length > ci_req->b_len) {
333 if (!ci_req->b_buf) {
334 ci_req->b_len = roundup(req->length, ARCH_DMA_MINALIGN);
335 ci_req->b_buf = memalign(ARCH_DMA_MINALIGN, ci_req->b_len);
339 ci_req->hw_len = ci_req->b_len;
340 ci_req->hw_buf = ci_req->b_buf;
343 memcpy(ci_req->hw_buf, req->buf, req->length);
346 hwaddr = (uint32_t)ci_req->hw_buf;
347 aligned_used_len = roundup(req->length, ARCH_DMA_MINALIGN);
348 flush_dcache_range(hwaddr, hwaddr + aligned_used_len);
353 static void ci_debounce(struct ci_req *ci_req, int in)
355 struct usb_request *req = &ci_req->req;
356 uint32_t addr = (uint32_t)req->buf;
357 uint32_t hwaddr = (uint32_t)ci_req->hw_buf;
358 uint32_t aligned_used_len;
363 aligned_used_len = roundup(req->actual, ARCH_DMA_MINALIGN);
364 invalidate_dcache_range(hwaddr, hwaddr + aligned_used_len);
367 return; /* not a bounce */
369 memcpy(req->buf, ci_req->hw_buf, req->actual);
372 static void ci_ep_submit_next_request(struct ci_ep *ci_ep)
374 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
375 struct ept_queue_item *item;
376 struct ept_queue_head *head;
377 int bit, num, len, in;
378 struct ci_req *ci_req;
380 ci_ep->req_primed = true;
382 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
383 in = (ci_ep->desc->bEndpointAddress & USB_DIR_IN) != 0;
384 item = ci_get_qtd(num, in);
385 head = ci_get_qh(num, in);
387 ci_req = list_first_entry(&ci_ep->queue, struct ci_req, queue);
388 len = ci_req->req.length;
390 item->info = INFO_BYTES(len) | INFO_ACTIVE;
391 item->page0 = (uint32_t)ci_req->hw_buf;
392 item->page1 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x1000;
393 item->page2 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x2000;
394 item->page3 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x3000;
395 item->page4 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x4000;
397 head->next = (unsigned) item;
401 * When sending the data for an IN transaction, the attached host
402 * knows that all data for the IN is sent when one of the following
404 * a) A zero-length packet is transmitted.
405 * b) A packet with length that isn't an exact multiple of the ep's
406 * maxpacket is transmitted.
407 * c) Enough data is sent to exactly fill the host's maximum expected
408 * IN transaction size.
410 * One of these conditions MUST apply at the end of an IN transaction,
411 * or the transaction will not be considered complete by the host. If
412 * none of (a)..(c) already applies, then we must force (a) to apply
413 * by explicitly sending an extra zero-length packet.
416 if (in && len && !(len % ci_ep->ep.maxpacket) && ci_req->req.zero) {
418 * Each endpoint has 2 items allocated, even though typically
419 * only 1 is used at a time since either an IN or an OUT but
420 * not both is queued. For an IN transaction, item currently
421 * points at the second of these items, so we know that we
422 * can use the other to transmit the extra zero-length packet.
424 struct ept_queue_item *other_item = ci_get_qtd(num, 0);
425 item->next = (unsigned)other_item;
427 item->info = INFO_ACTIVE;
430 item->next = TERMINATE;
431 item->info |= INFO_IOC;
435 DBG("ept%d %s queue len %x, req %p, buffer %p\n",
436 num, in ? "in" : "out", len, ci_req, ci_req->hw_buf);
444 writel(bit, &udc->epprime);
447 static int ci_ep_queue(struct usb_ep *ep,
448 struct usb_request *req, gfp_t gfp_flags)
450 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep);
451 struct ci_req *ci_req = container_of(req, struct ci_req, req);
453 int __maybe_unused num;
455 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
456 in = (ci_ep->desc->bEndpointAddress & USB_DIR_IN) != 0;
458 if (!num && ci_ep->req_primed) {
460 * The flipping of ep0 between IN and OUT relies on
461 * ci_ep_queue consuming the current IN/OUT setting
462 * immediately. If this is deferred to a later point when the
463 * req is pulled out of ci_req->queue, then the IN/OUT setting
464 * may have been changed since the req was queued, and state
465 * will get out of sync. This condition doesn't occur today,
466 * but could if bugs were introduced later, and this error
467 * check will save a lot of debugging time.
469 printf("%s: ep0 transaction already in progress\n", __func__);
473 ret = ci_bounce(ci_req, in);
477 DBG("ept%d %s pre-queue req %p, buffer %p\n",
478 num, in ? "in" : "out", ci_req, ci_req->hw_buf);
479 list_add_tail(&ci_req->queue, &ci_ep->queue);
481 if (!ci_ep->req_primed)
482 ci_ep_submit_next_request(ci_ep);
487 static void flip_ep0_direction(void)
489 if (ep0_desc.bEndpointAddress == USB_DIR_IN) {
490 DBG("%s: Flipping ep0 to OUT\n", __func__);
491 ep0_desc.bEndpointAddress = 0;
493 DBG("%s: Flipping ep0 to IN\n", __func__);
494 ep0_desc.bEndpointAddress = USB_DIR_IN;
498 static void handle_ep_complete(struct ci_ep *ci_ep)
500 struct ept_queue_item *item;
502 struct ci_req *ci_req;
504 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
505 in = (ci_ep->desc->bEndpointAddress & USB_DIR_IN) != 0;
506 item = ci_get_qtd(num, in);
507 ci_invalidate_qtd(num);
509 len = (item->info >> 16) & 0x7fff;
510 if (item->info & 0xff)
511 printf("EP%d/%s FAIL info=%x pg0=%x\n",
512 num, in ? "in" : "out", item->info, item->page0);
514 ci_req = list_first_entry(&ci_ep->queue, struct ci_req, queue);
515 list_del_init(&ci_req->queue);
516 ci_ep->req_primed = false;
518 if (!list_empty(&ci_ep->queue))
519 ci_ep_submit_next_request(ci_ep);
521 ci_req->req.actual = ci_req->req.length - len;
522 ci_debounce(ci_req, in);
524 DBG("ept%d %s req %p, complete %x\n",
525 num, in ? "in" : "out", ci_req, len);
526 if (num != 0 || controller.ep0_data_phase)
527 ci_req->req.complete(&ci_ep->ep, &ci_req->req);
528 if (num == 0 && controller.ep0_data_phase) {
530 * Data Stage is complete, so flip ep0 dir for Status Stage,
531 * which always transfers a packet in the opposite direction.
533 DBG("%s: flip ep0 dir for Status Stage\n", __func__);
534 flip_ep0_direction();
535 controller.ep0_data_phase = false;
536 ci_req->req.length = 0;
537 usb_ep_queue(&ci_ep->ep, &ci_req->req, 0);
541 #define SETUP(type, request) (((type) << 8) | (request))
543 static void handle_setup(void)
545 struct ci_ep *ci_ep = &controller.ep[0];
546 struct ci_req *ci_req;
547 struct usb_request *req;
548 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
549 struct ept_queue_head *head;
550 struct usb_ctrlrequest r;
552 int num, in, _num, _in, i;
555 ci_req = controller.ep0_req;
557 head = ci_get_qh(0, 0); /* EP0 OUT */
560 memcpy(&r, head->setup_data, sizeof(struct usb_ctrlrequest));
561 #ifdef CONFIG_CI_UDC_HAS_HOSTPC
562 writel(EPT_RX(0), &udc->epsetupstat);
564 writel(EPT_RX(0), &udc->epstat);
566 DBG("handle setup %s, %x, %x index %x value %x length %x\n",
567 reqname(r.bRequest), r.bRequestType, r.bRequest, r.wIndex,
568 r.wValue, r.wLength);
570 /* Set EP0 dir for Data Stage based on Setup Stage data */
571 if (r.bRequestType & USB_DIR_IN) {
572 DBG("%s: Set ep0 to IN for Data Stage\n", __func__);
573 ep0_desc.bEndpointAddress = USB_DIR_IN;
575 DBG("%s: Set ep0 to OUT for Data Stage\n", __func__);
576 ep0_desc.bEndpointAddress = 0;
579 controller.ep0_data_phase = true;
581 /* 0 length -> no Data Stage. Flip dir for Status Stage */
582 DBG("%s: 0 length: flip ep0 dir for Status Stage\n", __func__);
583 flip_ep0_direction();
584 controller.ep0_data_phase = false;
587 list_del_init(&ci_req->queue);
588 ci_ep->req_primed = false;
590 switch (SETUP(r.bRequestType, r.bRequest)) {
591 case SETUP(USB_RECIP_ENDPOINT, USB_REQ_CLEAR_FEATURE):
592 _num = r.wIndex & 15;
593 _in = !!(r.wIndex & 0x80);
595 if ((r.wValue == 0) && (r.wLength == 0)) {
597 for (i = 0; i < NUM_ENDPOINTS; i++) {
598 struct ci_ep *ep = &controller.ep[i];
602 num = ep->desc->bEndpointAddress
603 & USB_ENDPOINT_NUMBER_MASK;
604 in = (ep->desc->bEndpointAddress
606 if ((num == _num) && (in == _in)) {
607 ep_enable(num, in, ep->ep.maxpacket);
608 usb_ep_queue(controller.gadget.ep0,
616 case SETUP(USB_RECIP_DEVICE, USB_REQ_SET_ADDRESS):
618 * write address delayed (will take effect
619 * after the next IN txn)
621 writel((r.wValue << 25) | (1 << 24), &udc->devaddr);
623 usb_ep_queue(controller.gadget.ep0, req, 0);
626 case SETUP(USB_DIR_IN | USB_RECIP_DEVICE, USB_REQ_GET_STATUS):
628 buf = (char *)req->buf;
629 buf[0] = 1 << USB_DEVICE_SELF_POWERED;
631 usb_ep_queue(controller.gadget.ep0, req, 0);
634 /* pass request up to the gadget driver */
635 if (controller.driver)
636 status = controller.driver->setup(&controller.gadget, &r);
642 DBG("STALL reqname %s type %x value %x, index %x\n",
643 reqname(r.bRequest), r.bRequestType, r.wValue, r.wIndex);
644 writel((1<<16) | (1 << 0), &udc->epctrl[0]);
647 static void stop_activity(void)
650 struct ept_queue_head *head;
651 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
652 writel(readl(&udc->epcomp), &udc->epcomp);
653 #ifdef CONFIG_CI_UDC_HAS_HOSTPC
654 writel(readl(&udc->epsetupstat), &udc->epsetupstat);
656 writel(readl(&udc->epstat), &udc->epstat);
657 writel(0xffffffff, &udc->epflush);
659 /* error out any pending reqs */
660 for (i = 0; i < NUM_ENDPOINTS; i++) {
662 writel(0, &udc->epctrl[i]);
663 if (controller.ep[i].desc) {
664 num = controller.ep[i].desc->bEndpointAddress
665 & USB_ENDPOINT_NUMBER_MASK;
666 in = (controller.ep[i].desc->bEndpointAddress
668 head = ci_get_qh(num, in);
669 head->info = INFO_ACTIVE;
677 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
678 unsigned n = readl(&udc->usbsts);
679 writel(n, &udc->usbsts);
682 n &= (STS_SLI | STS_URI | STS_PCI | STS_UI | STS_UEI);
687 DBG("-- reset --\n");
691 DBG("-- suspend --\n");
695 int speed = USB_SPEED_FULL;
697 #ifdef CONFIG_CI_UDC_HAS_HOSTPC
698 bit = (readl(&udc->hostpc1_devlc) >> 25) & 3;
700 bit = (readl(&udc->portsc) >> 26) & 3;
702 DBG("-- portchange %x %s\n", bit, (bit == 2) ? "High" : "Full");
704 speed = USB_SPEED_HIGH;
707 controller.gadget.speed = speed;
708 for (i = 1; i < NUM_ENDPOINTS; i++) {
709 if (controller.ep[i].ep.maxpacket > max)
710 controller.ep[i].ep.maxpacket = max;
715 printf("<UEI %x>\n", readl(&udc->epcomp));
717 if ((n & STS_UI) || (n & STS_UEI)) {
718 #ifdef CONFIG_CI_UDC_HAS_HOSTPC
719 n = readl(&udc->epsetupstat);
721 n = readl(&udc->epstat);
726 n = readl(&udc->epcomp);
728 writel(n, &udc->epcomp);
730 for (i = 0; i < NUM_ENDPOINTS && n; i++) {
731 if (controller.ep[i].desc) {
732 num = controller.ep[i].desc->bEndpointAddress
733 & USB_ENDPOINT_NUMBER_MASK;
734 in = (controller.ep[i].desc->bEndpointAddress
736 bit = (in) ? EPT_TX(num) : EPT_RX(num);
738 handle_ep_complete(&controller.ep[i]);
744 int usb_gadget_handle_interrupts(void)
747 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
749 value = readl(&udc->usbsts);
756 void udc_disconnect(void)
758 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
761 writel(USBCMD_FS2, &udc->usbcmd);
763 if (controller.driver)
764 controller.driver->disconnect(&controller.gadget);
767 static int ci_pullup(struct usb_gadget *gadget, int is_on)
769 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
772 writel(USBCMD_ITC(MICRO_8FRAME) | USBCMD_RST, &udc->usbcmd);
775 writel((unsigned)controller.epts, &udc->epinitaddr);
777 /* select DEVICE mode */
778 writel(USBMODE_DEVICE, &udc->usbmode);
780 writel(0xffffffff, &udc->epflush);
782 /* Turn on the USB connection by enabling the pullup resistor */
783 writel(USBCMD_ITC(MICRO_8FRAME) | USBCMD_RUN, &udc->usbcmd);
791 static int ci_udc_probe(void)
793 struct ept_queue_head *head;
796 const int num = 2 * NUM_ENDPOINTS;
798 const int eplist_min_align = 4096;
799 const int eplist_align = roundup(eplist_min_align, ARCH_DMA_MINALIGN);
800 const int eplist_raw_sz = num * sizeof(struct ept_queue_head);
801 const int eplist_sz = roundup(eplist_raw_sz, ARCH_DMA_MINALIGN);
803 /* The QH list must be aligned to 4096 bytes. */
804 controller.epts = memalign(eplist_align, eplist_sz);
805 if (!controller.epts)
807 memset(controller.epts, 0, eplist_sz);
809 controller.items_mem = memalign(ILIST_ALIGN, ILIST_SZ);
810 if (!controller.items_mem) {
811 free(controller.epts);
814 memset(controller.items_mem, 0, ILIST_SZ);
816 for (i = 0; i < 2 * NUM_ENDPOINTS; i++) {
818 * Configure QH for each endpoint. The structure of the QH list
819 * is such that each two subsequent fields, N and N+1 where N is
820 * even, in the QH list represent QH for one endpoint. The Nth
821 * entry represents OUT configuration and the N+1th entry does
822 * represent IN configuration of the endpoint.
824 head = controller.epts + i;
826 head->config = CONFIG_MAX_PKT(EP0_MAX_PACKET_SIZE)
827 | CONFIG_ZLT | CONFIG_IOS;
829 head->config = CONFIG_MAX_PKT(EP_MAX_PACKET_SIZE)
831 head->next = TERMINATE;
840 INIT_LIST_HEAD(&controller.gadget.ep_list);
843 memcpy(&controller.ep[0].ep, &ci_ep_init[0], sizeof(*ci_ep_init));
844 controller.ep[0].desc = &ep0_desc;
845 INIT_LIST_HEAD(&controller.ep[0].queue);
846 controller.ep[0].req_primed = false;
847 controller.gadget.ep0 = &controller.ep[0].ep;
848 INIT_LIST_HEAD(&controller.gadget.ep0->ep_list);
851 for (i = 1; i < NUM_ENDPOINTS; i++) {
852 memcpy(&controller.ep[i].ep, &ci_ep_init[1],
853 sizeof(*ci_ep_init));
854 INIT_LIST_HEAD(&controller.ep[i].queue);
855 controller.ep[i].req_primed = false;
856 list_add_tail(&controller.ep[i].ep.ep_list,
857 &controller.gadget.ep_list);
860 ci_ep_alloc_request(&controller.ep[0].ep, 0);
861 if (!controller.ep0_req) {
862 free(controller.items_mem);
863 free(controller.epts);
870 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
876 if (!driver->bind || !driver->setup || !driver->disconnect)
878 if (driver->speed != USB_SPEED_FULL && driver->speed != USB_SPEED_HIGH)
881 ret = usb_lowlevel_init(0, USB_INIT_DEVICE, (void **)&controller.ctrl);
885 ret = ci_udc_probe();
886 #if defined(CONFIG_USB_EHCI_MX6) || defined(CONFIG_USB_EHCI_MXS)
888 * FIXME: usb_lowlevel_init()->ehci_hcd_init() should be doing all
889 * HW-specific initialization, e.g. ULPI-vs-UTMI PHY selection
892 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
894 /* select ULPI phy */
895 writel(PTS(PTS_ENABLE) | PFSC, &udc->portsc);
899 ret = driver->bind(&controller.gadget);
901 DBG("driver->bind() returned %d\n", ret);
904 controller.driver = driver;
909 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
913 driver->unbind(&controller.gadget);
914 controller.driver = NULL;
916 ci_ep_free_request(&controller.ep[0].ep, &controller.ep0_req->req);
917 free(controller.items_mem);
918 free(controller.epts);
923 bool dfu_usb_get_reset(void)
925 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
927 return !!(readl(&udc->usbsts) & STS_URI);