2 * Copyright (c) 2007-2008, Juniper Networks, Inc.
3 * Copyright (c) 2008, Excito Elektronik i Skåne AB
4 * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation version 2 of
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #include <asm/byteorder.h>
32 struct ehci_hccr *hccr; /* R/O registers, not need for volatile */
33 volatile struct ehci_hcor *hcor;
35 static uint16_t portreset;
36 static struct QH qh_list __attribute__((aligned(32)));
38 static struct descriptor {
39 struct usb_hub_descriptor hub;
40 struct usb_device_descriptor device;
41 struct usb_linux_config_descriptor config;
42 struct usb_linux_interface_descriptor interface;
43 struct usb_endpoint_descriptor endpoint;
44 } __attribute__ ((packed)) descriptor = {
46 0x8, /* bDescLength */
47 0x29, /* bDescriptorType: hub descriptor */
48 2, /* bNrPorts -- runtime modified */
49 0, /* wHubCharacteristics */
50 0xff, /* bPwrOn2PwrGood */
51 0, /* bHubCntrCurrent */
52 {}, /* Device removable */
53 {} /* at most 7 ports! XXX */
57 1, /* bDescriptorType: UDESC_DEVICE */
58 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
59 9, /* bDeviceClass: UDCLASS_HUB */
60 0, /* bDeviceSubClass: UDSUBCLASS_HUB */
61 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */
62 64, /* bMaxPacketSize: 64 bytes */
63 0x0000, /* idVendor */
64 0x0000, /* idProduct */
65 cpu_to_le16(0x0100), /* bcdDevice */
66 1, /* iManufacturer */
68 0, /* iSerialNumber */
69 1 /* bNumConfigurations: 1 */
73 2, /* bDescriptorType: UDESC_CONFIG */
75 1, /* bNumInterface */
76 1, /* bConfigurationValue */
77 0, /* iConfiguration */
78 0x40, /* bmAttributes: UC_SELF_POWER */
83 4, /* bDescriptorType: UDESC_INTERFACE */
84 0, /* bInterfaceNumber */
85 0, /* bAlternateSetting */
86 1, /* bNumEndpoints */
87 9, /* bInterfaceClass: UICLASS_HUB */
88 0, /* bInterfaceSubClass: UISUBCLASS_HUB */
89 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
94 5, /* bDescriptorType: UDESC_ENDPOINT */
95 0x81, /* bEndpointAddress:
96 * UE_DIR_IN | EHCI_INTR_ENDPT
98 3, /* bmAttributes: UE_INTERRUPT */
99 8, /* wMaxPacketSize */
104 #if defined(CONFIG_EHCI_IS_TDI)
105 #define ehci_is_TDI() (1)
107 #define ehci_is_TDI() (0)
110 #if defined(CONFIG_EHCI_DCACHE)
112 * Routines to handle (flush/invalidate) the dcache for the QH and qTD
113 * structures and data buffers. This is needed on platforms using this
114 * EHCI support with dcache enabled.
116 static void flush_invalidate(u32 addr, int size, int flush)
119 flush_dcache_range(addr, addr + size);
121 invalidate_dcache_range(addr, addr + size);
124 static void cache_qtd(struct qTD *qtd, int flush)
126 u32 *ptr = (u32 *)qtd->qt_buffer[0];
127 int len = (qtd->qt_token & 0x7fff0000) >> 16;
129 flush_invalidate((u32)qtd, sizeof(struct qTD), flush);
131 flush_invalidate((u32)ptr, len, flush);
135 static inline struct QH *qh_addr(struct QH *qh)
137 return (struct QH *)((u32)qh & 0xffffffe0);
140 static void cache_qh(struct QH *qh, int flush)
144 static struct qTD *first_qtd;
147 * Walk the QH list and flush/invalidate all entries
150 flush_invalidate((u32)qh_addr(qh), sizeof(struct QH), flush);
151 if ((u32)qh & QH_LINK_TYPE_QH)
154 qh = (struct QH *)qh->qh_link;
159 * Save first qTD pointer, needed for invalidating pass on this QH
162 first_qtd = qtd = (struct qTD *)(*(u32 *)&qh->qh_overlay &
168 * Walk the qTD list and flush/invalidate all entries
173 cache_qtd(qtd, flush);
174 next = (struct qTD *)((u32)qtd->qt_next & 0xffffffe0);
181 static inline void ehci_flush_dcache(struct QH *qh)
186 static inline void ehci_invalidate_dcache(struct QH *qh)
190 #else /* CONFIG_EHCI_DCACHE */
194 static inline void ehci_flush_dcache(struct QH *qh)
198 static inline void ehci_invalidate_dcache(struct QH *qh)
201 #endif /* CONFIG_EHCI_DCACHE */
203 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
207 result = ehci_readl(ptr);
209 if (result == ~(uint32_t)0)
219 static void ehci_free(void *p, size_t sz)
224 static int ehci_reset(void)
231 cmd = ehci_readl(&hcor->or_usbcmd);
233 ehci_writel(&hcor->or_usbcmd, cmd);
234 ret = handshake((uint32_t *)&hcor->or_usbcmd, CMD_RESET, 0, 250 * 1000);
236 printf("EHCI fail to reset\n");
241 reg_ptr = (uint32_t *)((u8 *)hcor + USBMODE);
242 tmp = ehci_readl(reg_ptr);
243 tmp |= USBMODE_CM_HC;
244 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
247 ehci_writel(reg_ptr, tmp);
253 static void *ehci_alloc(size_t sz, size_t align)
255 static struct QH qh __attribute__((aligned(32)));
256 static struct qTD td[3] __attribute__((aligned (32)));
261 case sizeof(struct QH):
265 case sizeof(struct qTD):
267 debug("out of TDs\n");
274 debug("unknown allocation size\n");
282 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
284 uint32_t addr, delta, next;
287 addr = (uint32_t) buf;
290 td->qt_buffer[idx] = cpu_to_hc32(addr);
291 td->qt_buffer_hi[idx] = 0;
292 next = (addr + 4096) & ~4095;
302 debug("out of buffer pointers (%u bytes left)\n", sz);
310 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
311 int length, struct devrequest *req)
315 volatile struct qTD *vtd;
318 uint32_t endpt, token, usbsts;
323 debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
324 buffer, length, req);
326 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
327 req->request, req->request,
328 req->requesttype, req->requesttype,
329 le16_to_cpu(req->value), le16_to_cpu(req->value),
330 le16_to_cpu(req->index));
332 qh = ehci_alloc(sizeof(struct QH), 32);
334 debug("unable to allocate QH\n");
337 qh->qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
338 c = (usb_pipespeed(pipe) != USB_SPEED_HIGH &&
339 usb_pipeendpoint(pipe) == 0) ? 1 : 0;
342 (usb_maxpacket(dev, pipe) << 16) |
345 (usb_pipespeed(pipe) << 12) |
346 (usb_pipeendpoint(pipe) << 8) |
347 (0 << 7) | (usb_pipedevice(pipe) << 0);
348 qh->qh_endpt1 = cpu_to_hc32(endpt);
350 (dev->portnr << 23) |
351 (dev->parent->devnum << 16) | (0 << 8) | (0 << 0);
352 qh->qh_endpt2 = cpu_to_hc32(endpt);
353 qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
356 tdp = &qh->qh_overlay.qt_next;
359 usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
362 td = ehci_alloc(sizeof(struct qTD), 32);
364 debug("unable to allocate SETUP td\n");
367 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
368 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
370 (sizeof(*req) << 16) |
371 (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0);
372 td->qt_token = cpu_to_hc32(token);
373 if (ehci_td_buffer(td, req, sizeof(*req)) != 0) {
374 debug("unable construct SETUP td\n");
375 ehci_free(td, sizeof(*td));
378 *tdp = cpu_to_hc32((uint32_t) td);
383 if (length > 0 || req == NULL) {
384 td = ehci_alloc(sizeof(struct qTD), 32);
386 debug("unable to allocate DATA td\n");
389 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
390 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
391 token = (toggle << 31) |
393 ((req == NULL ? 1 : 0) << 15) |
396 ((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0);
397 td->qt_token = cpu_to_hc32(token);
398 if (ehci_td_buffer(td, buffer, length) != 0) {
399 debug("unable construct DATA td\n");
400 ehci_free(td, sizeof(*td));
403 *tdp = cpu_to_hc32((uint32_t) td);
408 td = ehci_alloc(sizeof(struct qTD), 32);
410 debug("unable to allocate ACK td\n");
413 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
414 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
415 token = (toggle << 31) |
420 ((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0);
421 td->qt_token = cpu_to_hc32(token);
422 *tdp = cpu_to_hc32((uint32_t) td);
426 qh_list.qh_link = cpu_to_hc32((uint32_t) qh | QH_LINK_TYPE_QH);
429 ehci_flush_dcache(&qh_list);
431 usbsts = ehci_readl(&hcor->or_usbsts);
432 ehci_writel(&hcor->or_usbsts, (usbsts & 0x3f));
434 /* Enable async. schedule. */
435 cmd = ehci_readl(&hcor->or_usbcmd);
437 ehci_writel(&hcor->or_usbcmd, cmd);
439 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, STD_ASS,
442 printf("EHCI fail timeout STD_ASS set\n");
446 /* Wait for TDs to be processed. */
450 /* Invalidate dcache */
451 ehci_invalidate_dcache(&qh_list);
452 token = hc32_to_cpu(vtd->qt_token);
455 } while (get_timer(ts) < CONFIG_SYS_HZ);
457 /* Disable async schedule. */
458 cmd = ehci_readl(&hcor->or_usbcmd);
460 ehci_writel(&hcor->or_usbcmd, cmd);
462 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, 0,
465 printf("EHCI fail timeout STD_ASS reset\n");
469 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
471 token = hc32_to_cpu(qh->qh_overlay.qt_token);
472 if (!(token & 0x80)) {
473 debug("TOKEN=%#x\n", token);
474 switch (token & 0xfc) {
476 toggle = token >> 31;
477 usb_settoggle(dev, usb_pipeendpoint(pipe),
478 usb_pipeout(pipe), toggle);
482 dev->status = USB_ST_STALLED;
486 dev->status = USB_ST_BUF_ERR;
490 dev->status = USB_ST_BABBLE_DET;
493 dev->status = USB_ST_CRC_ERR;
494 if ((token & 0x40) == 0x40)
495 dev->status |= USB_ST_STALLED;
498 dev->act_len = length - ((token >> 16) & 0x7fff);
501 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
502 dev->devnum, ehci_readl(&hcor->or_usbsts),
503 ehci_readl(&hcor->or_portsc[0]),
504 ehci_readl(&hcor->or_portsc[1]));
507 return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
510 td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
511 while (td != (void *)QT_NEXT_TERMINATE) {
512 qh->qh_overlay.qt_next = td->qt_next;
513 ehci_free(td, sizeof(*td));
514 td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
516 ehci_free(qh, sizeof(*qh));
520 static inline int min3(int a, int b, int c)
531 ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
532 int length, struct devrequest *req)
539 uint32_t *status_reg;
541 if (le16_to_cpu(req->index) > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
542 printf("The request port(%d) is not configured\n",
543 le16_to_cpu(req->index) - 1);
546 status_reg = (uint32_t *)&hcor->or_portsc[
547 le16_to_cpu(req->index) - 1];
550 debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
551 req->request, req->request,
552 req->requesttype, req->requesttype,
553 le16_to_cpu(req->value), le16_to_cpu(req->index));
555 typeReq = req->request | req->requesttype << 8;
558 case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
559 switch (le16_to_cpu(req->value) >> 8) {
561 debug("USB_DT_DEVICE request\n");
562 srcptr = &descriptor.device;
566 debug("USB_DT_CONFIG config\n");
567 srcptr = &descriptor.config;
571 debug("USB_DT_STRING config\n");
572 switch (le16_to_cpu(req->value) & 0xff) {
573 case 0: /* Language */
578 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
581 case 2: /* Product */
582 srcptr = "\52\3E\0H\0C\0I\0 "
584 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
588 debug("unknown value DT_STRING %x\n",
589 le16_to_cpu(req->value));
594 debug("unknown value %x\n", le16_to_cpu(req->value));
598 case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
599 switch (le16_to_cpu(req->value) >> 8) {
601 debug("USB_DT_HUB config\n");
602 srcptr = &descriptor.hub;
606 debug("unknown value %x\n", le16_to_cpu(req->value));
610 case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
611 debug("USB_REQ_SET_ADDRESS\n");
612 rootdev = le16_to_cpu(req->value);
614 case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
615 debug("USB_REQ_SET_CONFIGURATION\n");
618 case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
619 tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */
624 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
625 memset(tmpbuf, 0, 4);
626 reg = ehci_readl(status_reg);
627 if (reg & EHCI_PS_CS)
628 tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
629 if (reg & EHCI_PS_PE)
630 tmpbuf[0] |= USB_PORT_STAT_ENABLE;
631 if (reg & EHCI_PS_SUSP)
632 tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
633 if (reg & EHCI_PS_OCA)
634 tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
635 if (reg & EHCI_PS_PR)
636 tmpbuf[0] |= USB_PORT_STAT_RESET;
637 if (reg & EHCI_PS_PP)
638 tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
641 switch ((reg >> 26) & 3) {
645 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
649 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
653 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
656 if (reg & EHCI_PS_CSC)
657 tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
658 if (reg & EHCI_PS_PEC)
659 tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
660 if (reg & EHCI_PS_OCC)
661 tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
662 if (portreset & (1 << le16_to_cpu(req->index)))
663 tmpbuf[2] |= USB_PORT_STAT_C_RESET;
668 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
669 reg = ehci_readl(status_reg);
670 reg &= ~EHCI_PS_CLEAR;
671 switch (le16_to_cpu(req->value)) {
672 case USB_PORT_FEAT_ENABLE:
674 ehci_writel(status_reg, reg);
676 case USB_PORT_FEAT_POWER:
677 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) {
679 ehci_writel(status_reg, reg);
682 case USB_PORT_FEAT_RESET:
683 if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
685 EHCI_PS_IS_LOWSPEED(reg)) {
686 /* Low speed device, give up ownership. */
687 debug("port %d low speed --> companion\n",
690 ehci_writel(status_reg, reg);
697 ehci_writel(status_reg, reg);
699 * caller must wait, then call GetPortStatus
700 * usb 2.0 specification say 50 ms resets on
704 /* terminate the reset */
705 ehci_writel(status_reg, reg & ~EHCI_PS_PR);
707 * A host controller must terminate the reset
708 * and stabilize the state of the port within
711 ret = handshake(status_reg, EHCI_PS_PR, 0,
715 1 << le16_to_cpu(req->index);
717 printf("port(%d) reset error\n",
718 le16_to_cpu(req->index) - 1);
722 debug("unknown feature %x\n", le16_to_cpu(req->value));
725 /* unblock posted writes */
726 (void) ehci_readl(&hcor->or_usbcmd);
728 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
729 reg = ehci_readl(status_reg);
730 switch (le16_to_cpu(req->value)) {
731 case USB_PORT_FEAT_ENABLE:
734 case USB_PORT_FEAT_C_ENABLE:
735 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_PE;
737 case USB_PORT_FEAT_POWER:
738 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams)))
739 reg = reg & ~(EHCI_PS_CLEAR | EHCI_PS_PP);
740 case USB_PORT_FEAT_C_CONNECTION:
741 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_CSC;
743 case USB_PORT_FEAT_OVER_CURRENT:
744 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC;
746 case USB_PORT_FEAT_C_RESET:
747 portreset &= ~(1 << le16_to_cpu(req->index));
750 debug("unknown feature %x\n", le16_to_cpu(req->value));
753 ehci_writel(status_reg, reg);
754 /* unblock posted write */
755 (void) ehci_readl(&hcor->or_usbcmd);
758 debug("Unknown request\n");
763 len = min3(srclen, le16_to_cpu(req->length), length);
764 if (srcptr != NULL && len > 0)
765 memcpy(buffer, srcptr, len);
774 debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
775 req->requesttype, req->request, le16_to_cpu(req->value),
776 le16_to_cpu(req->index), le16_to_cpu(req->length));
779 dev->status = USB_ST_STALLED;
783 int usb_lowlevel_stop(void)
785 return ehci_hcd_stop();
788 int usb_lowlevel_init(void)
793 if (ehci_hcd_init() != 0)
796 /* EHCI spec section 4.1 */
797 if (ehci_reset() != 0)
800 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
801 if (ehci_hcd_init() != 0)
805 /* Set head of reclaim list */
806 memset(&qh_list, 0, sizeof(qh_list));
807 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
808 qh_list.qh_endpt1 = cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH << 12));
809 qh_list.qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE);
810 qh_list.qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
811 qh_list.qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
812 qh_list.qh_overlay.qt_token = cpu_to_hc32(0x40);
814 /* Set async. queue head pointer. */
815 ehci_writel(&hcor->or_asynclistaddr, (uint32_t)&qh_list);
817 reg = ehci_readl(&hccr->cr_hcsparams);
818 descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
819 printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
820 /* Port Indicators */
821 if (HCS_INDICATOR(reg))
822 descriptor.hub.wHubCharacteristics |= 0x80;
823 /* Port Power Control */
825 descriptor.hub.wHubCharacteristics |= 0x01;
827 /* Start the host controller. */
828 cmd = ehci_readl(&hcor->or_usbcmd);
830 * Philips, Intel, and maybe others need CMD_RUN before the
831 * root hub will detect new devices (why?); NEC doesn't
833 cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
835 ehci_writel(&hcor->or_usbcmd, cmd);
837 /* take control over the ports */
838 cmd = ehci_readl(&hcor->or_configflag);
840 ehci_writel(&hcor->or_configflag, cmd);
841 /* unblock posted write */
842 cmd = ehci_readl(&hcor->or_usbcmd);
844 reg = HC_VERSION(ehci_readl(&hccr->cr_capbase));
845 printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
853 submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
857 if (usb_pipetype(pipe) != PIPE_BULK) {
858 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
861 return ehci_submit_async(dev, pipe, buffer, length, NULL);
865 submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
866 int length, struct devrequest *setup)
869 if (usb_pipetype(pipe) != PIPE_CONTROL) {
870 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
874 if (usb_pipedevice(pipe) == rootdev) {
876 dev->speed = USB_SPEED_HIGH;
877 return ehci_submit_root(dev, pipe, buffer, length, setup);
879 return ehci_submit_async(dev, pipe, buffer, length, setup);
883 submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
884 int length, int interval)
887 debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
888 dev, pipe, buffer, length, interval);