2 * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
4 * Interrupt support is added. Now, it has been tested
5 * on ULI1575 chip and works well with USB keyboard.
8 * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
11 * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
13 * Note: Much of this code has been derived from Linux 2.4
14 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
15 * (C) Copyright 2000-2002 David Brownell
17 * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
18 * ebenard@eukrea.com - based on s3c24x0's driver
20 * See file CREDITS for list of people who contributed to this
23 * This program is free software; you can redistribute it and/or
24 * modify it under the terms of the GNU General Public License as
25 * published by the Free Software Foundation; either version 2 of
26 * the License, or (at your option) any later version.
28 * This program is distributed in the hope that it will be useful,
29 * but WITHOUT ANY WARRANTY; without even the implied warranty of
30 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
31 * GNU General Public License for more details.
33 * You should have received a copy of the GNU General Public License
34 * along with this program; if not, write to the Free Software
35 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
41 * 1 - Read doc/README.generic_usb_ohci
42 * 2 - this driver is intended for use with USB Mass Storage Devices
43 * (BBB) and USB keyboard. There is NO support for Isochronous pipes!
44 * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
45 * to activate workaround for bug #41 or this driver will NOT work!
50 #ifdef CONFIG_USB_OHCI_NEW
52 #include <asm/byteorder.h>
54 #if defined(CONFIG_PCI_OHCI)
62 #ifdef CONFIG_AT91RM9200
63 #include <asm/arch/hardware.h> /* needed for AT91_USB_HOST_BASE */
66 #if defined(CONFIG_ARM920T) || \
67 defined(CONFIG_S3C2400) || \
68 defined(CONFIG_S3C2410) || \
69 defined(CONFIG_440EP) || \
70 defined(CONFIG_PCI_OHCI) || \
71 defined(CONFIG_MPC5200) || \
72 defined(CFG_OHCI_USE_NPS)
73 # define OHCI_USE_NPS /* force NoPowerSwitching mode */
76 #undef OHCI_VERBOSE_DEBUG /* not always helpful */
79 #undef OHCI_FILL_TRACE
81 /* For initializing controller (mask in an HCFS mode too) */
82 #define OHCI_CONTROL_INIT \
83 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
86 * e.g. PCI controllers need this
88 #ifdef CFG_OHCI_SWAP_REG_ACCESS
89 # define readl(a) __swap_32(*((vu_long *)(a)))
90 # define writel(a, b) (*((vu_long *)(b)) = __swap_32((vu_long)a))
92 # define readl(a) (*((vu_long *)(a)))
93 # define writel(a, b) (*((vu_long *)(b)) = ((vu_long)a))
94 #endif /* CFG_OHCI_SWAP_REG_ACCESS */
96 #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
98 #ifdef CONFIG_PCI_OHCI
99 static struct pci_device_id ohci_pci_ids[] = {
100 {0x10b9, 0x5237}, /* ULI1575 PCI OHCI module ids */
101 {0x1033, 0x0035}, /* NEC PCI OHCI module ids */
102 {0x1131, 0x1561}, /* Philips 1561 PCI OHCI module ids */
103 /* Please add supported PCI OHCI controller ids here */
109 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
111 #define dbg(format, arg...) do {} while(0)
113 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
116 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
118 #define info(format, arg...) do {} while(0)
121 #ifdef CFG_OHCI_BE_CONTROLLER
122 # define m16_swap(x) cpu_to_be16(x)
123 # define m32_swap(x) cpu_to_be32(x)
125 # define m16_swap(x) cpu_to_le16(x)
126 # define m32_swap(x) cpu_to_le32(x)
127 #endif /* CFG_OHCI_BE_CONTROLLER */
131 /* this must be aligned to a 256 byte boundary */
132 struct ohci_hcca ghcca[1];
133 /* a pointer to the aligned storage */
134 struct ohci_hcca *phcca;
135 /* this allocates EDs for all possible endpoints */
136 struct ohci_device ohci_dev;
139 /* device which was disconnected */
140 struct usb_device *devgone;
142 /*-------------------------------------------------------------------------*/
144 /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
145 * The erratum (#4) description is incorrect. AMD's workaround waits
146 * till some bits (mostly reserved) are clear; ok for all revs.
148 #define OHCI_QUIRK_AMD756 0xabcd
149 #define read_roothub(hc, register, mask) ({ \
150 u32 temp = readl (&hc->regs->roothub.register); \
151 if (hc->flags & OHCI_QUIRK_AMD756) \
152 while (temp & mask) \
153 temp = readl (&hc->regs->roothub.register); \
156 static u32 roothub_a (struct ohci *hc)
157 { return read_roothub (hc, a, 0xfc0fe000); }
158 static inline u32 roothub_b (struct ohci *hc)
159 { return readl (&hc->regs->roothub.b); }
160 static inline u32 roothub_status (struct ohci *hc)
161 { return readl (&hc->regs->roothub.status); }
162 static u32 roothub_portstatus (struct ohci *hc, int i)
163 { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
165 /* forward declaration */
166 static int hc_interrupt (void);
168 td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
169 int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
171 /*-------------------------------------------------------------------------*
172 * URB support functions
173 *-------------------------------------------------------------------------*/
175 /* free HCD-private data associated with this URB */
177 static void urb_free_priv (urb_priv_t * urb)
183 last = urb->length - 1;
185 for (i = 0; i <= last; i++) {
196 /*-------------------------------------------------------------------------*/
199 static int sohci_get_current_frame_number (struct usb_device * dev);
201 /* debug| print the main components of an URB
202 * small: 0) header + data packets 1) just header */
204 static void pkt_print (urb_priv_t *purb, struct usb_device * dev,
205 unsigned long pipe, void * buffer,
206 int transfer_len, struct devrequest * setup, char * str, int small)
208 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
210 sohci_get_current_frame_number (dev),
211 usb_pipedevice (pipe),
212 usb_pipeendpoint (pipe),
213 usb_pipeout (pipe)? 'O': 'I',
214 usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
215 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
216 (purb ? purb->actual_length : 0),
217 transfer_len, dev->status);
218 #ifdef OHCI_VERBOSE_DEBUG
222 if (usb_pipecontrol (pipe)) {
223 printf (__FILE__ ": cmd(8):");
224 for (i = 0; i < 8 ; i++)
225 printf (" %02x", ((__u8 *) setup) [i]);
228 if (transfer_len > 0 && buffer) {
229 printf (__FILE__ ": data(%d/%d):",
230 (purb ? purb->actual_length : 0),
232 len = usb_pipeout (pipe)?
234 (purb ? purb->actual_length : 0);
235 for (i = 0; i < 16 && i < len; i++)
236 printf (" %02x", ((__u8 *) buffer) [i]);
237 printf ("%s\n", i < len? "...": "");
243 /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
244 void ep_print_int_eds (ohci_t *ohci, char * str) {
247 for (i= 0; i < 32; i++) {
249 ed_p = &(ohci->hcca->int_table [i]);
252 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
253 while (*ed_p != 0 && j--) {
254 ed_t *ed = (ed_t *)m32_swap(ed_p);
255 printf (" ed: %4x;", ed->hwINFO);
256 ed_p = &ed->hwNextED;
262 static void ohci_dump_intr_mask (char *label, __u32 mask)
264 dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
267 (mask & OHCI_INTR_MIE) ? " MIE" : "",
268 (mask & OHCI_INTR_OC) ? " OC" : "",
269 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
270 (mask & OHCI_INTR_FNO) ? " FNO" : "",
271 (mask & OHCI_INTR_UE) ? " UE" : "",
272 (mask & OHCI_INTR_RD) ? " RD" : "",
273 (mask & OHCI_INTR_SF) ? " SF" : "",
274 (mask & OHCI_INTR_WDH) ? " WDH" : "",
275 (mask & OHCI_INTR_SO) ? " SO" : ""
279 static void maybe_print_eds (char *label, __u32 value)
281 ed_t *edp = (ed_t *)value;
284 dbg ("%s %08x", label, value);
285 dbg ("%08x", edp->hwINFO);
286 dbg ("%08x", edp->hwTailP);
287 dbg ("%08x", edp->hwHeadP);
288 dbg ("%08x", edp->hwNextED);
292 static char * hcfs2string (int state)
295 case OHCI_USB_RESET: return "reset";
296 case OHCI_USB_RESUME: return "resume";
297 case OHCI_USB_OPER: return "operational";
298 case OHCI_USB_SUSPEND: return "suspend";
303 /* dump control and status registers */
304 static void ohci_dump_status (ohci_t *controller)
306 struct ohci_regs *regs = controller->regs;
309 temp = readl (®s->revision) & 0xff;
311 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
313 temp = readl (®s->control);
314 dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
315 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
316 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
317 (temp & OHCI_CTRL_IR) ? " IR" : "",
318 hcfs2string (temp & OHCI_CTRL_HCFS),
319 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
320 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
321 (temp & OHCI_CTRL_IE) ? " IE" : "",
322 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
323 temp & OHCI_CTRL_CBSR
326 temp = readl (®s->cmdstatus);
327 dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
328 (temp & OHCI_SOC) >> 16,
329 (temp & OHCI_OCR) ? " OCR" : "",
330 (temp & OHCI_BLF) ? " BLF" : "",
331 (temp & OHCI_CLF) ? " CLF" : "",
332 (temp & OHCI_HCR) ? " HCR" : ""
335 ohci_dump_intr_mask ("intrstatus", readl (®s->intrstatus));
336 ohci_dump_intr_mask ("intrenable", readl (®s->intrenable));
338 maybe_print_eds ("ed_periodcurrent", readl (®s->ed_periodcurrent));
340 maybe_print_eds ("ed_controlhead", readl (®s->ed_controlhead));
341 maybe_print_eds ("ed_controlcurrent", readl (®s->ed_controlcurrent));
343 maybe_print_eds ("ed_bulkhead", readl (®s->ed_bulkhead));
344 maybe_print_eds ("ed_bulkcurrent", readl (®s->ed_bulkcurrent));
346 maybe_print_eds ("donehead", readl (®s->donehead));
349 static void ohci_dump_roothub (ohci_t *controller, int verbose)
353 temp = roothub_a (controller);
354 ndp = (temp & RH_A_NDP);
355 #ifdef CONFIG_AT91C_PQFP_UHPBUG
356 ndp = (ndp == 2) ? 1:0;
359 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
360 ((temp & RH_A_POTPGT) >> 24) & 0xff,
361 (temp & RH_A_NOCP) ? " NOCP" : "",
362 (temp & RH_A_OCPM) ? " OCPM" : "",
363 (temp & RH_A_DT) ? " DT" : "",
364 (temp & RH_A_NPS) ? " NPS" : "",
365 (temp & RH_A_PSM) ? " PSM" : "",
368 temp = roothub_b (controller);
369 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
371 (temp & RH_B_PPCM) >> 16,
374 temp = roothub_status (controller);
375 dbg ("roothub.status: %08x%s%s%s%s%s%s",
377 (temp & RH_HS_CRWE) ? " CRWE" : "",
378 (temp & RH_HS_OCIC) ? " OCIC" : "",
379 (temp & RH_HS_LPSC) ? " LPSC" : "",
380 (temp & RH_HS_DRWE) ? " DRWE" : "",
381 (temp & RH_HS_OCI) ? " OCI" : "",
382 (temp & RH_HS_LPS) ? " LPS" : ""
386 for (i = 0; i < ndp; i++) {
387 temp = roothub_portstatus (controller, i);
388 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
391 (temp & RH_PS_PRSC) ? " PRSC" : "",
392 (temp & RH_PS_OCIC) ? " OCIC" : "",
393 (temp & RH_PS_PSSC) ? " PSSC" : "",
394 (temp & RH_PS_PESC) ? " PESC" : "",
395 (temp & RH_PS_CSC) ? " CSC" : "",
397 (temp & RH_PS_LSDA) ? " LSDA" : "",
398 (temp & RH_PS_PPS) ? " PPS" : "",
399 (temp & RH_PS_PRS) ? " PRS" : "",
400 (temp & RH_PS_POCI) ? " POCI" : "",
401 (temp & RH_PS_PSS) ? " PSS" : "",
403 (temp & RH_PS_PES) ? " PES" : "",
404 (temp & RH_PS_CCS) ? " CCS" : ""
409 static void ohci_dump (ohci_t *controller, int verbose)
411 dbg ("OHCI controller usb-%s state", controller->slot_name);
413 /* dumps some of the state we know about */
414 ohci_dump_status (controller);
416 ep_print_int_eds (controller, "hcca");
417 dbg ("hcca frame #%04x", controller->hcca->frame_no);
418 ohci_dump_roothub (controller, 1);
422 /*-------------------------------------------------------------------------*
423 * Interface functions (URB)
424 *-------------------------------------------------------------------------*/
426 /* get a transfer request */
428 int sohci_submit_job(urb_priv_t *urb, struct devrequest *setup)
432 urb_priv_t *purb_priv = urb;
434 struct usb_device *dev = urb->dev;
435 unsigned long pipe = urb->pipe;
436 void *buffer = urb->transfer_buffer;
437 int transfer_len = urb->transfer_buffer_length;
438 int interval = urb->interval;
442 /* when controller's hung, permit only roothub cleanup attempts
443 * such as powering down ports */
444 if (ohci->disabled) {
445 err("sohci_submit_job: EPIPE");
449 /* we're about to begin a new transaction here so mark the URB unfinished */
452 /* every endpoint has a ed, locate and fill it */
453 if (!(ed = ep_add_ed (dev, pipe, interval, 1))) {
454 err("sohci_submit_job: ENOMEM");
458 /* for the private part of the URB we need the number of TDs (size) */
459 switch (usb_pipetype (pipe)) {
460 case PIPE_BULK: /* one TD for every 4096 Byte */
461 size = (transfer_len - 1) / 4096 + 1;
463 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
464 size = (transfer_len == 0)? 2:
465 (transfer_len - 1) / 4096 + 3;
467 case PIPE_INTERRUPT: /* 1 TD */
474 if (size >= (N_URB_TD - 1)) {
475 err("need %d TDs, only have %d", size, N_URB_TD);
478 purb_priv->pipe = pipe;
480 /* fill the private part of the URB */
481 purb_priv->length = size;
483 purb_priv->actual_length = 0;
485 /* allocate the TDs */
486 /* note that td[0] was allocated in ep_add_ed */
487 for (i = 0; i < size; i++) {
488 purb_priv->td[i] = td_alloc (dev);
489 if (!purb_priv->td[i]) {
490 purb_priv->length = i;
491 urb_free_priv (purb_priv);
492 err("sohci_submit_job: ENOMEM");
497 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
498 urb_free_priv (purb_priv);
499 err("sohci_submit_job: EINVAL");
503 /* link the ed into a chain if is not already */
504 if (ed->state != ED_OPER)
507 /* fill the TDs and link it to the ed */
508 td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
513 static inline int sohci_return_job(struct ohci *hc, urb_priv_t *urb)
515 struct ohci_regs *regs = hc->regs;
517 switch (usb_pipetype (urb->pipe)) {
519 /* implicitly requeued */
520 if (urb->dev->irq_handle &&
521 (urb->dev->irq_act_len = urb->actual_length)) {
522 writel (OHCI_INTR_WDH, ®s->intrenable);
523 readl (®s->intrenable); /* PCI posting flush */
524 urb->dev->irq_handle(urb->dev);
525 writel (OHCI_INTR_WDH, ®s->intrdisable);
526 readl (®s->intrdisable); /* PCI posting flush */
528 urb->actual_length = 0;
532 urb->transfer_buffer,
533 urb->transfer_buffer_length,
547 /*-------------------------------------------------------------------------*/
550 /* tell us the current USB frame number */
552 static int sohci_get_current_frame_number (struct usb_device *usb_dev)
554 ohci_t *ohci = &gohci;
556 return m16_swap (ohci->hcca->frame_no);
560 /*-------------------------------------------------------------------------*
561 * ED handling functions
562 *-------------------------------------------------------------------------*/
564 /* search for the right branch to insert an interrupt ed into the int tree
565 * do some load ballancing;
566 * returns the branch and
567 * sets the interval to interval = 2^integer (ld (interval)) */
569 static int ep_int_ballance (ohci_t * ohci, int interval, int load)
573 /* search for the least loaded interrupt endpoint
574 * branch of all 32 branches
576 for (i = 0; i < 32; i++)
577 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
580 branch = branch % interval;
581 for (i = branch; i < 32; i += interval)
582 ohci->ohci_int_load [i] += load;
587 /*-------------------------------------------------------------------------*/
589 /* 2^int( ld (inter)) */
591 static int ep_2_n_interval (int inter)
594 for (i = 0; ((inter >> i) > 1 ) && (i < 5); i++);
598 /*-------------------------------------------------------------------------*/
600 /* the int tree is a binary tree
601 * in order to process it sequentially the indexes of the branches have to be mapped
602 * the mapping reverses the bits of a word of num_bits length */
604 static int ep_rev (int num_bits, int word)
608 for (i = 0; i < num_bits; i++)
609 wout |= (((word >> i) & 1) << (num_bits - i - 1));
613 /*-------------------------------------------------------------------------*
614 * ED handling functions
615 *-------------------------------------------------------------------------*/
617 /* link an ed into one of the HC chains */
619 static int ep_link (ohci_t *ohci, ed_t *edi)
621 volatile ed_t *ed = edi;
630 ed->int_interval = 0;
635 if (ohci->ed_controltail == NULL) {
636 writel (ed, &ohci->regs->ed_controlhead);
638 ohci->ed_controltail->hwNextED = m32_swap ((unsigned long)ed);
640 ed->ed_prev = ohci->ed_controltail;
641 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
642 !ohci->ed_rm_list[1] && !ohci->sleeping) {
643 ohci->hc_control |= OHCI_CTRL_CLE;
644 writel (ohci->hc_control, &ohci->regs->control);
646 ohci->ed_controltail = edi;
651 if (ohci->ed_bulktail == NULL) {
652 writel (ed, &ohci->regs->ed_bulkhead);
654 ohci->ed_bulktail->hwNextED = m32_swap ((unsigned long)ed);
656 ed->ed_prev = ohci->ed_bulktail;
657 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
658 !ohci->ed_rm_list[1] && !ohci->sleeping) {
659 ohci->hc_control |= OHCI_CTRL_BLE;
660 writel (ohci->hc_control, &ohci->regs->control);
662 ohci->ed_bulktail = edi;
667 interval = ep_2_n_interval (ed->int_period);
668 ed->int_interval = interval;
669 int_branch = ep_int_ballance (ohci, interval, load);
670 ed->int_branch = int_branch;
672 for (i = 0; i < ep_rev (6, interval); i += inter) {
674 for (ed_p = &(ohci->hcca->int_table[ep_rev (5, i) + int_branch]);
675 (*ed_p != 0) && (((ed_t *)ed_p)->int_interval >= interval);
676 ed_p = &(((ed_t *)ed_p)->hwNextED))
677 inter = ep_rev (6, ((ed_t *)ed_p)->int_interval);
678 ed->hwNextED = *ed_p;
679 *ed_p = m32_swap((unsigned long)ed);
686 /*-------------------------------------------------------------------------*/
688 /* scan the periodic table to find and unlink this ED */
689 static void periodic_unlink ( struct ohci *ohci, volatile struct ed *ed,
690 unsigned index, unsigned period)
692 for (; index < NUM_INTS; index += period) {
693 __u32 *ed_p = &ohci->hcca->int_table [index];
695 /* ED might have been unlinked through another path */
697 if (((struct ed *)m32_swap ((unsigned long)ed_p)) == ed) {
698 *ed_p = ed->hwNextED;
701 ed_p = & (((struct ed *)m32_swap ((unsigned long)ed_p))->hwNextED);
706 /* unlink an ed from one of the HC chains.
707 * just the link to the ed is unlinked.
708 * the link from the ed still points to another operational ed or 0
709 * so the HC can eventually finish the processing of the unlinked ed */
711 static int ep_unlink (ohci_t *ohci, ed_t *edi)
713 volatile ed_t *ed = edi;
716 ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
720 if (ed->ed_prev == NULL) {
722 ohci->hc_control &= ~OHCI_CTRL_CLE;
723 writel (ohci->hc_control, &ohci->regs->control);
725 writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
727 ed->ed_prev->hwNextED = ed->hwNextED;
729 if (ohci->ed_controltail == ed) {
730 ohci->ed_controltail = ed->ed_prev;
732 ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
737 if (ed->ed_prev == NULL) {
739 ohci->hc_control &= ~OHCI_CTRL_BLE;
740 writel (ohci->hc_control, &ohci->regs->control);
742 writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
744 ed->ed_prev->hwNextED = ed->hwNextED;
746 if (ohci->ed_bulktail == ed) {
747 ohci->ed_bulktail = ed->ed_prev;
749 ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
754 periodic_unlink (ohci, ed, 0, 1);
755 for (i = ed->int_branch; i < 32; i += ed->int_interval)
756 ohci->ohci_int_load[i] -= ed->int_load;
759 ed->state = ED_UNLINK;
763 /*-------------------------------------------------------------------------*/
765 /* add/reinit an endpoint; this should be done once at the
766 * usb_set_configuration command, but the USB stack is a little bit
767 * stateless so we do it at every transaction if the state of the ed
768 * is ED_NEW then a dummy td is added and the state is changed to
769 * ED_UNLINK in all other cases the state is left unchanged the ed
770 * info fields are setted anyway even though most of them should not
773 static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe,
774 int interval, int load)
780 ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
781 (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
783 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
784 err("ep_add_ed: pending delete");
785 /* pending delete request */
789 if (ed->state == ED_NEW) {
790 ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
791 /* dummy td; end of td list for ed */
792 td = td_alloc (usb_dev);
793 ed->hwTailP = m32_swap ((unsigned long)td);
794 ed->hwHeadP = ed->hwTailP;
795 ed->state = ED_UNLINK;
796 ed->type = usb_pipetype (pipe);
800 ed->hwINFO = m32_swap (usb_pipedevice (pipe)
801 | usb_pipeendpoint (pipe) << 7
802 | (usb_pipeisoc (pipe)? 0x8000: 0)
803 | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
804 | usb_pipeslow (pipe) << 13
805 | usb_maxpacket (usb_dev, pipe) << 16);
807 if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
808 ed->int_period = interval;
815 /*-------------------------------------------------------------------------*
816 * TD handling functions
817 *-------------------------------------------------------------------------*/
819 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
821 static void td_fill (ohci_t *ohci, unsigned int info,
823 struct usb_device *dev, int index, urb_priv_t *urb_priv)
825 volatile td_t *td, *td_pt;
826 #ifdef OHCI_FILL_TRACE
830 if (index > urb_priv->length) {
831 err("index > length");
834 /* use this td as the next dummy */
835 td_pt = urb_priv->td [index];
838 /* fill the old dummy TD */
839 td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
841 td->ed = urb_priv->ed;
842 td->next_dl_td = NULL;
844 td->data = (__u32)data;
845 #ifdef OHCI_FILL_TRACE
846 if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
847 for (i = 0; i < len; i++)
848 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
855 td->hwINFO = m32_swap (info);
856 td->hwCBP = m32_swap ((unsigned long)data);
858 td->hwBE = m32_swap ((unsigned long)(data + len - 1));
861 td->hwNextTD = m32_swap ((unsigned long)td_pt);
863 /* append to queue */
864 td->ed->hwTailP = td->hwNextTD;
867 /*-------------------------------------------------------------------------*/
869 /* prepare all TDs of a transfer */
871 static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
872 int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
874 ohci_t *ohci = &gohci;
875 int data_len = transfer_len;
879 unsigned int toggle = 0;
881 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
882 if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
883 toggle = TD_T_TOGGLE;
886 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
894 switch (usb_pipetype (pipe)) {
896 info = usb_pipeout (pipe)?
897 TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
898 while(data_len > 4096) {
899 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
900 data += 4096; data_len -= 4096; cnt++;
902 info = usb_pipeout (pipe)?
903 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
904 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
908 writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
912 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
913 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
915 info = usb_pipeout (pipe)?
916 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
917 /* NOTE: mishandles transfers >8K, some >4K */
918 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
920 info = usb_pipeout (pipe)?
921 TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
922 td_fill (ohci, info, data, 0, dev, cnt++, urb);
924 writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
928 info = usb_pipeout (urb->pipe)?
929 TD_CC | TD_DP_OUT | toggle:
930 TD_CC | TD_R | TD_DP_IN | toggle;
931 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
934 if (urb->length != cnt)
935 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
938 /*-------------------------------------------------------------------------*
939 * Done List handling functions
940 *-------------------------------------------------------------------------*/
942 /* calculate the transfer length and update the urb */
944 static void dl_transfer_length(td_t * td)
946 __u32 tdINFO, tdBE, tdCBP;
947 urb_priv_t *lurb_priv = td->ed->purb;
949 tdINFO = m32_swap (td->hwINFO);
950 tdBE = m32_swap (td->hwBE);
951 tdCBP = m32_swap (td->hwCBP);
953 if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
954 ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
957 lurb_priv->actual_length += tdBE - td->data + 1;
959 lurb_priv->actual_length += tdCBP - td->data;
964 /*-------------------------------------------------------------------------*/
966 /* replies to the request have to be on a FIFO basis so
967 * we reverse the reversed done-list */
969 static td_t * dl_reverse_done_list (ohci_t *ohci)
973 td_t *td_list = NULL;
974 urb_priv_t *lurb_priv = NULL;
976 td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
977 ohci->hcca->done_head = 0;
980 td_list = (td_t *)td_list_hc;
982 if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
983 lurb_priv = td_list->ed->purb;
984 dbg(" USB-error/status: %x : %p",
985 TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
986 if (td_list->ed->hwHeadP & m32_swap (0x1)) {
987 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
988 td_list->ed->hwHeadP =
989 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
990 (td_list->ed->hwHeadP & m32_swap (0x2));
991 lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
993 td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
995 #ifdef CONFIG_MPC5200
996 td_list->hwNextTD = 0;
1000 td_list->next_dl_td = td_rev;
1002 td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
1007 /*-------------------------------------------------------------------------*/
1010 static int dl_done_list (ohci_t *ohci, td_t *td_list)
1012 td_t *td_list_next = NULL;
1017 urb_priv_t *lurb_priv;
1018 __u32 tdINFO, edHeadP, edTailP;
1021 td_list_next = td_list->next_dl_td;
1023 tdINFO = m32_swap (td_list->hwINFO);
1026 lurb_priv = ed->purb;
1028 dl_transfer_length(td_list);
1030 /* error code of transfer */
1031 cc = TD_CC_GET (tdINFO);
1033 dbg("ConditionCode %#x", cc);
1034 stat = cc_to_error[cc];
1037 /* see if this done list makes for all TD's of current URB,
1038 * and mark the URB finished if so */
1039 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
1041 if ((ed->state & (ED_OPER | ED_UNLINK)) &&
1042 (lurb_priv->state != URB_DEL))
1044 if ((ed->state & (ED_OPER | ED_UNLINK)))
1046 lurb_priv->finished = sohci_return_job(ohci,
1049 dbg("dl_done_list: strange.., ED state %x, ed->state\n");
1051 dbg("dl_done_list: processing TD %x, len %x\n", lurb_priv->td_cnt,
1053 if (ed->state != ED_NEW &&
1054 (usb_pipetype (lurb_priv->pipe) != PIPE_INTERRUPT)) {
1055 edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
1056 edTailP = m32_swap (ed->hwTailP);
1058 /* unlink eds if they are not busy */
1059 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1060 ep_unlink (ohci, ed);
1063 td_list = td_list_next;
1068 /*-------------------------------------------------------------------------*
1070 *-------------------------------------------------------------------------*/
1072 /* Device descriptor */
1073 static __u8 root_hub_dev_des[] =
1075 0x12, /* __u8 bLength; */
1076 0x01, /* __u8 bDescriptorType; Device */
1077 0x10, /* __u16 bcdUSB; v1.1 */
1079 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
1080 0x00, /* __u8 bDeviceSubClass; */
1081 0x00, /* __u8 bDeviceProtocol; */
1082 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
1083 0x00, /* __u16 idVendor; */
1085 0x00, /* __u16 idProduct; */
1087 0x00, /* __u16 bcdDevice; */
1089 0x00, /* __u8 iManufacturer; */
1090 0x01, /* __u8 iProduct; */
1091 0x00, /* __u8 iSerialNumber; */
1092 0x01 /* __u8 bNumConfigurations; */
1095 /* Configuration descriptor */
1096 static __u8 root_hub_config_des[] =
1098 0x09, /* __u8 bLength; */
1099 0x02, /* __u8 bDescriptorType; Configuration */
1100 0x19, /* __u16 wTotalLength; */
1102 0x01, /* __u8 bNumInterfaces; */
1103 0x01, /* __u8 bConfigurationValue; */
1104 0x00, /* __u8 iConfiguration; */
1105 0x40, /* __u8 bmAttributes;
1106 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
1107 0x00, /* __u8 MaxPower; */
1110 0x09, /* __u8 if_bLength; */
1111 0x04, /* __u8 if_bDescriptorType; Interface */
1112 0x00, /* __u8 if_bInterfaceNumber; */
1113 0x00, /* __u8 if_bAlternateSetting; */
1114 0x01, /* __u8 if_bNumEndpoints; */
1115 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
1116 0x00, /* __u8 if_bInterfaceSubClass; */
1117 0x00, /* __u8 if_bInterfaceProtocol; */
1118 0x00, /* __u8 if_iInterface; */
1121 0x07, /* __u8 ep_bLength; */
1122 0x05, /* __u8 ep_bDescriptorType; Endpoint */
1123 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
1124 0x03, /* __u8 ep_bmAttributes; Interrupt */
1125 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
1127 0xff /* __u8 ep_bInterval; 255 ms */
1130 static unsigned char root_hub_str_index0[] =
1132 0x04, /* __u8 bLength; */
1133 0x03, /* __u8 bDescriptorType; String-descriptor */
1134 0x09, /* __u8 lang ID */
1135 0x04, /* __u8 lang ID */
1138 static unsigned char root_hub_str_index1[] =
1140 28, /* __u8 bLength; */
1141 0x03, /* __u8 bDescriptorType; String-descriptor */
1142 'O', /* __u8 Unicode */
1143 0, /* __u8 Unicode */
1144 'H', /* __u8 Unicode */
1145 0, /* __u8 Unicode */
1146 'C', /* __u8 Unicode */
1147 0, /* __u8 Unicode */
1148 'I', /* __u8 Unicode */
1149 0, /* __u8 Unicode */
1150 ' ', /* __u8 Unicode */
1151 0, /* __u8 Unicode */
1152 'R', /* __u8 Unicode */
1153 0, /* __u8 Unicode */
1154 'o', /* __u8 Unicode */
1155 0, /* __u8 Unicode */
1156 'o', /* __u8 Unicode */
1157 0, /* __u8 Unicode */
1158 't', /* __u8 Unicode */
1159 0, /* __u8 Unicode */
1160 ' ', /* __u8 Unicode */
1161 0, /* __u8 Unicode */
1162 'H', /* __u8 Unicode */
1163 0, /* __u8 Unicode */
1164 'u', /* __u8 Unicode */
1165 0, /* __u8 Unicode */
1166 'b', /* __u8 Unicode */
1167 0, /* __u8 Unicode */
1170 /* Hub class-specific descriptor is constructed dynamically */
1172 /*-------------------------------------------------------------------------*/
1174 #define OK(x) len = (x); break
1176 #define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
1177 #define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
1179 #define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
1180 #define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
1182 #define RD_RH_STAT roothub_status(&gohci)
1183 #define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
1185 /* request to virtual root hub */
1187 int rh_check_port_status(ohci_t *controller)
1193 temp = roothub_a (controller);
1194 ndp = (temp & RH_A_NDP);
1195 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1196 ndp = (ndp == 2) ? 1:0;
1198 for (i = 0; i < ndp; i++) {
1199 temp = roothub_portstatus (controller, i);
1200 /* check for a device disconnect */
1201 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1202 (RH_PS_PESC | RH_PS_CSC)) &&
1203 ((temp & RH_PS_CCS) == 0)) {
1211 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1212 void *buffer, int transfer_len, struct devrequest *cmd)
1214 void * data = buffer;
1215 int leni = transfer_len;
1219 __u8 *data_buf = (__u8 *)datab;
1226 pkt_print(NULL, dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
1230 if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
1231 info("Root-Hub submit IRQ: NOT implemented");
1235 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
1236 wValue = cpu_to_le16 (cmd->value);
1237 wIndex = cpu_to_le16 (cmd->index);
1238 wLength = cpu_to_le16 (cmd->length);
1240 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1241 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1243 switch (bmRType_bReq) {
1244 /* Request Destination:
1245 without flags: Device,
1246 RH_INTERFACE: interface,
1247 RH_ENDPOINT: endpoint,
1248 RH_CLASS means HUB here,
1249 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1253 *(__u16 *) data_buf = cpu_to_le16 (1); OK (2);
1254 case RH_GET_STATUS | RH_INTERFACE:
1255 *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
1256 case RH_GET_STATUS | RH_ENDPOINT:
1257 *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
1258 case RH_GET_STATUS | RH_CLASS:
1259 *(__u32 *) data_buf = cpu_to_le32 (
1260 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1262 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1263 *(__u32 *) data_buf = cpu_to_le32 (RD_RH_PORTSTAT); OK (4);
1265 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1267 case (RH_ENDPOINT_STALL): OK (0);
1271 case RH_CLEAR_FEATURE | RH_CLASS:
1273 case RH_C_HUB_LOCAL_POWER:
1275 case (RH_C_HUB_OVER_CURRENT):
1276 WR_RH_STAT(RH_HS_OCIC); OK (0);
1280 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1282 case (RH_PORT_ENABLE):
1283 WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1284 case (RH_PORT_SUSPEND):
1285 WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1286 case (RH_PORT_POWER):
1287 WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1288 case (RH_C_PORT_CONNECTION):
1289 WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1290 case (RH_C_PORT_ENABLE):
1291 WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1292 case (RH_C_PORT_SUSPEND):
1293 WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1294 case (RH_C_PORT_OVER_CURRENT):
1295 WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1296 case (RH_C_PORT_RESET):
1297 WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1301 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1303 case (RH_PORT_SUSPEND):
1304 WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1305 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1306 if (RD_RH_PORTSTAT & RH_PS_CCS)
1307 WR_RH_PORTSTAT (RH_PS_PRS);
1309 case (RH_PORT_POWER):
1310 WR_RH_PORTSTAT (RH_PS_PPS );
1313 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1314 if (RD_RH_PORTSTAT & RH_PS_CCS)
1315 WR_RH_PORTSTAT (RH_PS_PES );
1320 case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
1322 case RH_GET_DESCRIPTOR:
1323 switch ((wValue & 0xff00) >> 8) {
1324 case (0x01): /* device descriptor */
1325 len = min_t(unsigned int,
1328 sizeof (root_hub_dev_des),
1330 data_buf = root_hub_dev_des; OK(len);
1331 case (0x02): /* configuration descriptor */
1332 len = min_t(unsigned int,
1335 sizeof (root_hub_config_des),
1337 data_buf = root_hub_config_des; OK(len);
1338 case (0x03): /* string descriptors */
1339 if(wValue==0x0300) {
1340 len = min_t(unsigned int,
1343 sizeof (root_hub_str_index0),
1345 data_buf = root_hub_str_index0;
1348 if(wValue==0x0301) {
1349 len = min_t(unsigned int,
1352 sizeof (root_hub_str_index1),
1354 data_buf = root_hub_str_index1;
1358 stat = USB_ST_STALLED;
1362 case RH_GET_DESCRIPTOR | RH_CLASS:
1364 __u32 temp = roothub_a (&gohci);
1366 data_buf [0] = 9; /* min length; */
1367 data_buf [1] = 0x29;
1368 data_buf [2] = temp & RH_A_NDP;
1369 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1370 data_buf [2] = (data_buf [2] == 2) ? 1:0;
1373 if (temp & RH_A_PSM) /* per-port power switching? */
1374 data_buf [3] |= 0x1;
1375 if (temp & RH_A_NOCP) /* no overcurrent reporting? */
1376 data_buf [3] |= 0x10;
1377 else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
1378 data_buf [3] |= 0x8;
1380 /* corresponds to data_buf[4-7] */
1382 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1383 temp = roothub_b (&gohci);
1384 data_buf [7] = temp & RH_B_DR;
1385 if (data_buf [2] < 7) {
1386 data_buf [8] = 0xff;
1389 data_buf [8] = (temp & RH_B_DR) >> 8;
1390 data_buf [10] = data_buf [9] = 0xff;
1393 len = min_t(unsigned int, leni,
1394 min_t(unsigned int, data_buf [0], wLength));
1398 case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
1400 case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
1403 dbg ("unsupported root hub command");
1404 stat = USB_ST_STALLED;
1408 ohci_dump_roothub (&gohci, 1);
1413 len = min_t(int, len, leni);
1414 if (data != data_buf)
1415 memcpy (data, data_buf, len);
1420 pkt_print(NULL, dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1428 /*-------------------------------------------------------------------------*/
1430 /* common code for handling submit messages - used for all but root hub */
1432 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1433 int transfer_len, struct devrequest *setup, int interval)
1436 int maxsize = usb_maxpacket(dev, pipe);
1440 urb = malloc(sizeof(urb_priv_t));
1441 memset(urb, 0, sizeof(urb_priv_t));
1445 urb->transfer_buffer = buffer;
1446 urb->transfer_buffer_length = transfer_len;
1447 urb->interval = interval;
1449 /* device pulled? Shortcut the action. */
1450 if (devgone == dev) {
1451 dev->status = USB_ST_CRC_ERR;
1456 urb->actual_length = 0;
1457 pkt_print(urb, dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1462 err("submit_common_message: pipesize for pipe %lx is zero",
1467 if (sohci_submit_job(urb, setup) < 0) {
1468 err("sohci_submit_job failed");
1474 /* ohci_dump_status(&gohci); */
1477 /* allow more time for a BULK device to react - some are slow */
1478 #define BULK_TO 5000 /* timeout in milliseconds */
1479 if (usb_pipetype (pipe) == PIPE_BULK)
1484 /* wait for it to complete */
1486 /* check whether the controller is done */
1487 stat = hc_interrupt();
1489 stat = USB_ST_CRC_ERR;
1493 /* NOTE: since we are not interrupt driven in U-Boot and always
1494 * handle only one URB at a time, we cannot assume the
1495 * transaction finished on the first successful return from
1496 * hc_interrupt().. unless the flag for current URB is set,
1497 * meaning that all TD's to/from device got actually
1498 * transferred and processed. If the current URB is not
1499 * finished we need to re-iterate this loop so as
1500 * hc_interrupt() gets called again as there needs to be some
1501 * more TD's to process still */
1502 if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
1503 /* 0xff is returned for an SF-interrupt */
1513 err("CTL:TIMEOUT ");
1514 dbg("submit_common_msg: TO status %x\n", stat);
1516 stat = USB_ST_CRC_ERR;
1522 dev->act_len = transfer_len;
1525 pkt_print(urb, dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1530 /* free TDs in urb_priv */
1531 if (usb_pipetype (pipe) != PIPE_INTERRUPT)
1532 urb_free_priv (urb);
1536 /* submit routines called from usb.c */
1537 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1540 info("submit_bulk_msg");
1541 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1544 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1545 int transfer_len, struct devrequest *setup)
1547 int maxsize = usb_maxpacket(dev, pipe);
1549 info("submit_control_msg");
1551 pkt_print(NULL, dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1556 err("submit_control_message: pipesize for pipe %lx is zero",
1560 if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1562 /* root hub - redirect */
1563 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1567 return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1570 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1571 int transfer_len, int interval)
1573 info("submit_int_msg");
1574 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL,
1578 /*-------------------------------------------------------------------------*
1580 *-------------------------------------------------------------------------*/
1582 /* reset the HC and BUS */
1584 static int hc_reset (ohci_t *ohci)
1587 int smm_timeout = 50; /* 0,5 sec */
1589 dbg("%s\n", __FUNCTION__);
1591 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1592 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1593 info("USB HC TakeOver from SMM");
1594 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1596 if (--smm_timeout == 0) {
1597 err("USB HC TakeOver failed!");
1603 /* Disable HC interrupts */
1604 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1606 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1608 readl(&ohci->regs->control));
1610 /* Reset USB (needed by some controllers) */
1611 ohci->hc_control = 0;
1612 writel (ohci->hc_control, &ohci->regs->control);
1614 /* HC Reset requires max 10 us delay */
1615 writel (OHCI_HCR, &ohci->regs->cmdstatus);
1616 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1617 if (--timeout == 0) {
1618 err("USB HC reset timed out!");
1626 /*-------------------------------------------------------------------------*/
1628 /* Start an OHCI controller, set the BUS operational
1630 * connect the virtual root hub */
1632 static int hc_start (ohci_t * ohci)
1635 unsigned int fminterval;
1639 /* Tell the controller where the control and bulk lists are
1640 * The lists are empty now. */
1642 writel (0, &ohci->regs->ed_controlhead);
1643 writel (0, &ohci->regs->ed_bulkhead);
1645 writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1647 fminterval = 0x2edf;
1648 writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1649 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1650 writel (fminterval, &ohci->regs->fminterval);
1651 writel (0x628, &ohci->regs->lsthresh);
1653 /* start controller operations */
1654 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1656 writel (ohci->hc_control, &ohci->regs->control);
1658 /* disable all interrupts */
1659 mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1660 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1661 OHCI_INTR_OC | OHCI_INTR_MIE);
1662 writel (mask, &ohci->regs->intrdisable);
1663 /* clear all interrupts */
1664 mask &= ~OHCI_INTR_MIE;
1665 writel (mask, &ohci->regs->intrstatus);
1666 /* Choose the interrupts we care about now - but w/o MIE */
1667 mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1668 writel (mask, &ohci->regs->intrenable);
1671 /* required for AMD-756 and some Mac platforms */
1672 writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1673 &ohci->regs->roothub.a);
1674 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1675 #endif /* OHCI_USE_NPS */
1677 #define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
1678 /* POTPGT delay is bits 24-31, in 2 ms units. */
1679 mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1681 /* connect the virtual root hub */
1682 ohci->rh.devnum = 0;
1687 /*-------------------------------------------------------------------------*/
1689 /* Poll USB interrupt. */
1690 void usb_event_poll(void)
1695 /* an interrupt happens */
1697 static int hc_interrupt (void)
1699 ohci_t *ohci = &gohci;
1700 struct ohci_regs *regs = ohci->regs;
1704 if ((ohci->hcca->done_head != 0) &&
1705 !(m32_swap (ohci->hcca->done_head) & 0x01)) {
1706 ints = OHCI_INTR_WDH;
1707 } else if ((ints = readl (®s->intrstatus)) == ~(u32)0) {
1709 err ("%s device removed!", ohci->slot_name);
1711 } else if ((ints &= readl (®s->intrenable)) == 0) {
1712 dbg("hc_interrupt: returning..\n");
1716 /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1718 if (ints & OHCI_INTR_RHSC) {
1723 if (ints & OHCI_INTR_UE) {
1725 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1727 /* e.g. due to PCI Master/Target Abort */
1730 ohci_dump (ohci, 1);
1734 /* FIXME: be optimistic, hope that bug won't repeat often. */
1735 /* Make some non-interrupt context restart the controller. */
1736 /* Count and limit the retries though; either hardware or */
1737 /* software errors can go forever... */
1742 if (ints & OHCI_INTR_WDH) {
1744 writel (OHCI_INTR_WDH, ®s->intrdisable);
1745 (void)readl (®s->intrdisable); /* flush */
1746 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1747 writel (OHCI_INTR_WDH, ®s->intrenable);
1748 (void)readl (®s->intrdisable); /* flush */
1751 if (ints & OHCI_INTR_SO) {
1752 dbg("USB Schedule overrun\n");
1753 writel (OHCI_INTR_SO, ®s->intrenable);
1757 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1758 if (ints & OHCI_INTR_SF) {
1759 unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
1761 writel (OHCI_INTR_SF, ®s->intrdisable);
1762 if (ohci->ed_rm_list[frame] != NULL)
1763 writel (OHCI_INTR_SF, ®s->intrenable);
1767 writel (ints, ®s->intrstatus);
1771 /*-------------------------------------------------------------------------*/
1773 /*-------------------------------------------------------------------------*/
1775 /* De-allocate all resources.. */
1777 static void hc_release_ohci (ohci_t *ohci)
1779 dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1781 if (!ohci->disabled)
1785 /*-------------------------------------------------------------------------*/
1788 * low level initalisation routine, called from usb.c
1790 static char ohci_inited = 0;
1792 int usb_lowlevel_init(void)
1794 #ifdef CONFIG_PCI_OHCI
1798 #ifdef CFG_USB_OHCI_CPU_INIT
1799 /* cpu dependant init */
1804 #ifdef CFG_USB_OHCI_BOARD_INIT
1805 /* board dependant init */
1806 if(usb_board_init())
1809 memset (&gohci, 0, sizeof (ohci_t));
1811 /* align the storage */
1812 if ((__u32)&ghcca[0] & 0xff) {
1813 err("HCCA not aligned!!");
1817 info("aligned ghcca %p", phcca);
1818 memset(&ohci_dev, 0, sizeof(struct ohci_device));
1819 if ((__u32)&ohci_dev.ed[0] & 0x7) {
1820 err("EDs not aligned!!");
1823 memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1824 if ((__u32)gtd & 0x7) {
1825 err("TDs not aligned!!");
1830 memset (phcca, 0, sizeof (struct ohci_hcca));
1835 #ifdef CONFIG_PCI_OHCI
1836 pdev = pci_find_devices(ohci_pci_ids, 0);
1841 pci_read_config_word(pdev, PCI_VENDOR_ID, &vid);
1842 pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
1843 printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
1844 vid, did, (pdev >> 16) & 0xff,
1845 (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
1846 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1847 printf("OHCI regs address 0x%08x\n", base);
1848 gohci.regs = (struct ohci_regs *)base;
1852 gohci.regs = (struct ohci_regs *)CFG_USB_OHCI_REGS_BASE;
1856 gohci.slot_name = CFG_USB_OHCI_SLOT_NAME;
1858 if (hc_reset (&gohci) < 0) {
1859 hc_release_ohci (&gohci);
1860 err ("can't reset usb-%s", gohci.slot_name);
1861 #ifdef CFG_USB_OHCI_BOARD_INIT
1862 /* board dependant cleanup */
1863 usb_board_init_fail();
1866 #ifdef CFG_USB_OHCI_CPU_INIT
1867 /* cpu dependant cleanup */
1868 usb_cpu_init_fail();
1873 /* FIXME this is a second HC reset; why?? */
1874 /* writel(gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
1876 if (hc_start (&gohci) < 0) {
1877 err ("can't start usb-%s", gohci.slot_name);
1878 hc_release_ohci (&gohci);
1879 /* Initialization failed */
1880 #ifdef CFG_USB_OHCI_BOARD_INIT
1881 /* board dependant cleanup */
1885 #ifdef CFG_USB_OHCI_CPU_INIT
1886 /* cpu dependant cleanup */
1893 ohci_dump (&gohci, 1);
1901 int usb_lowlevel_stop(void)
1903 /* this gets called really early - before the controller has */
1904 /* even been initialized! */
1907 /* TODO release any interrupts, etc. */
1908 /* call hc_release_ohci() here ? */
1911 #ifdef CFG_USB_OHCI_BOARD_INIT
1912 /* board dependant cleanup */
1913 if(usb_board_stop())
1917 #ifdef CFG_USB_OHCI_CPU_INIT
1918 /* cpu dependant cleanup */
1925 #endif /* CONFIG_USB_OHCI_NEW */