2 * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200.
5 * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
7 * Note: Much of this code has been derived from Linux 2.4
8 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
9 * (C) Copyright 2000-2002 David Brownell
11 * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
12 * ebenard@eukrea.com - based on s3c24x0's driver
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
35 * 1 - you MUST define LITTLEENDIAN in the configuration file for the
36 * board or this driver will NOT work!
37 * 2 - this driver is intended for use with USB Mass Storage Devices
38 * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
39 * 3 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
40 * to activate workaround for bug #41 or this driver will NOT work!
44 /* #include <pci.h> no PCI on the S3C24X0 */
46 #ifdef CONFIG_USB_OHCI_NEW
48 /* mk: are these really required? */
49 #if defined(CONFIG_S3C2400)
51 #elif defined(CONFIG_S3C2410)
53 #elif defined(CONFIG_ARM920T)
54 # include <asm/arch/hardware.h>
55 #elif defined(CONFIG_CPU_MONAHANS)
56 # include <asm/arch/pxa-regs.h>
57 #elif defined(CONFIG_MPC5200)
67 #if defined(CONFIG_ARM920T) || \
68 defined(CONFIG_S3C2400) || \
69 defined(CONFIG_S3C2410)
70 # define OHCI_USE_NPS /* force NoPowerSwitching mode */
73 #undef OHCI_VERBOSE_DEBUG /* not always helpful */
75 /* For initializing controller (mask in an HCFS mode too) */
76 #define OHCI_CONTROL_INIT \
77 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
79 #define readl(a) (*((vu_long *)(a)))
80 #define writel(a, b) (*((vu_long *)(b)) = ((vu_long)a))
82 #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
86 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
88 #define dbg(format, arg...) do {} while(0)
90 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
93 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
95 #define info(format, arg...) do {} while(0)
98 #define m16_swap(x) swap_16(x)
99 #define m32_swap(x) swap_32(x)
103 /* this must be aligned to a 256 byte boundary */
104 struct ohci_hcca ghcca[1];
105 /* a pointer to the aligned storage */
106 struct ohci_hcca *phcca;
107 /* this allocates EDs for all possible endpoints */
108 struct ohci_device ohci_dev;
113 /* device which was disconnected */
114 struct usb_device *devgone;
117 /* flag guarding URB transation */
118 int urb_finished = 0;
122 /*-------------------------------------------------------------------------*/
124 /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
125 * The erratum (#4) description is incorrect. AMD's workaround waits
126 * till some bits (mostly reserved) are clear; ok for all revs.
128 #define OHCI_QUIRK_AMD756 0xabcd
129 #define read_roothub(hc, register, mask) ({ \
130 u32 temp = readl (&hc->regs->roothub.register); \
131 if (hc->flags & OHCI_QUIRK_AMD756) \
132 while (temp & mask) \
133 temp = readl (&hc->regs->roothub.register); \
136 static u32 roothub_a (struct ohci *hc)
137 { return read_roothub (hc, a, 0xfc0fe000); }
138 static inline u32 roothub_b (struct ohci *hc)
139 { return readl (&hc->regs->roothub.b); }
140 static inline u32 roothub_status (struct ohci *hc)
141 { return readl (&hc->regs->roothub.status); }
142 static u32 roothub_portstatus (struct ohci *hc, int i)
143 { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
146 /* forward declaration */
147 static int hc_interrupt (void);
149 td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
150 int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
152 /*-------------------------------------------------------------------------*
153 * URB support functions
154 *-------------------------------------------------------------------------*/
156 /* free HCD-private data associated with this URB */
158 static void urb_free_priv (urb_priv_t * urb)
164 last = urb->length - 1;
166 for (i = 0; i <= last; i++) {
176 /*-------------------------------------------------------------------------*/
179 static int sohci_get_current_frame_number (struct usb_device * dev);
181 /* debug| print the main components of an URB
182 * small: 0) header + data packets 1) just header */
184 static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
185 int transfer_len, struct devrequest * setup, char * str, int small)
187 urb_priv_t * purb = &urb_priv;
189 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
191 sohci_get_current_frame_number (dev),
192 usb_pipedevice (pipe),
193 usb_pipeendpoint (pipe),
194 usb_pipeout (pipe)? 'O': 'I',
195 usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
196 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
198 transfer_len, dev->status);
199 #ifdef OHCI_VERBOSE_DEBUG
203 if (usb_pipecontrol (pipe)) {
204 printf (__FILE__ ": cmd(8):");
205 for (i = 0; i < 8 ; i++)
206 printf (" %02x", ((__u8 *) setup) [i]);
209 if (transfer_len > 0 && buffer) {
210 printf (__FILE__ ": data(%d/%d):",
213 len = usb_pipeout (pipe)?
214 transfer_len: purb->actual_length;
215 for (i = 0; i < 16 && i < len; i++)
216 printf (" %02x", ((__u8 *) buffer) [i]);
217 printf ("%s\n", i < len? "...": "");
223 /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
224 void ep_print_int_eds (ohci_t *ohci, char * str) {
227 for (i= 0; i < 32; i++) {
229 ed_p = &(ohci->hcca->int_table [i]);
232 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
233 while (*ed_p != 0 && j--) {
234 ed_t *ed = (ed_t *)m32_swap(ed_p);
235 printf (" ed: %4x;", ed->hwINFO);
236 ed_p = &ed->hwNextED;
242 static void ohci_dump_intr_mask (char *label, __u32 mask)
244 dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
247 (mask & OHCI_INTR_MIE) ? " MIE" : "",
248 (mask & OHCI_INTR_OC) ? " OC" : "",
249 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
250 (mask & OHCI_INTR_FNO) ? " FNO" : "",
251 (mask & OHCI_INTR_UE) ? " UE" : "",
252 (mask & OHCI_INTR_RD) ? " RD" : "",
253 (mask & OHCI_INTR_SF) ? " SF" : "",
254 (mask & OHCI_INTR_WDH) ? " WDH" : "",
255 (mask & OHCI_INTR_SO) ? " SO" : ""
259 static void maybe_print_eds (char *label, __u32 value)
261 ed_t *edp = (ed_t *)value;
264 dbg ("%s %08x", label, value);
265 dbg ("%08x", edp->hwINFO);
266 dbg ("%08x", edp->hwTailP);
267 dbg ("%08x", edp->hwHeadP);
268 dbg ("%08x", edp->hwNextED);
272 static char * hcfs2string (int state)
275 case OHCI_USB_RESET: return "reset";
276 case OHCI_USB_RESUME: return "resume";
277 case OHCI_USB_OPER: return "operational";
278 case OHCI_USB_SUSPEND: return "suspend";
283 /* dump control and status registers */
284 static void ohci_dump_status (ohci_t *controller)
286 struct ohci_regs *regs = controller->regs;
289 temp = readl (®s->revision) & 0xff;
291 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
293 temp = readl (®s->control);
294 dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
295 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
296 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
297 (temp & OHCI_CTRL_IR) ? " IR" : "",
298 hcfs2string (temp & OHCI_CTRL_HCFS),
299 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
300 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
301 (temp & OHCI_CTRL_IE) ? " IE" : "",
302 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
303 temp & OHCI_CTRL_CBSR
306 temp = readl (®s->cmdstatus);
307 dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
308 (temp & OHCI_SOC) >> 16,
309 (temp & OHCI_OCR) ? " OCR" : "",
310 (temp & OHCI_BLF) ? " BLF" : "",
311 (temp & OHCI_CLF) ? " CLF" : "",
312 (temp & OHCI_HCR) ? " HCR" : ""
315 ohci_dump_intr_mask ("intrstatus", readl (®s->intrstatus));
316 ohci_dump_intr_mask ("intrenable", readl (®s->intrenable));
318 maybe_print_eds ("ed_periodcurrent", readl (®s->ed_periodcurrent));
320 maybe_print_eds ("ed_controlhead", readl (®s->ed_controlhead));
321 maybe_print_eds ("ed_controlcurrent", readl (®s->ed_controlcurrent));
323 maybe_print_eds ("ed_bulkhead", readl (®s->ed_bulkhead));
324 maybe_print_eds ("ed_bulkcurrent", readl (®s->ed_bulkcurrent));
326 maybe_print_eds ("donehead", readl (®s->donehead));
329 static void ohci_dump_roothub (ohci_t *controller, int verbose)
333 temp = roothub_a (controller);
334 ndp = (temp & RH_A_NDP);
335 #ifdef CONFIG_AT91C_PQFP_UHPBUG
336 ndp = (ndp == 2) ? 1:0;
339 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
340 ((temp & RH_A_POTPGT) >> 24) & 0xff,
341 (temp & RH_A_NOCP) ? " NOCP" : "",
342 (temp & RH_A_OCPM) ? " OCPM" : "",
343 (temp & RH_A_DT) ? " DT" : "",
344 (temp & RH_A_NPS) ? " NPS" : "",
345 (temp & RH_A_PSM) ? " PSM" : "",
348 temp = roothub_b (controller);
349 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
351 (temp & RH_B_PPCM) >> 16,
354 temp = roothub_status (controller);
355 dbg ("roothub.status: %08x%s%s%s%s%s%s",
357 (temp & RH_HS_CRWE) ? " CRWE" : "",
358 (temp & RH_HS_OCIC) ? " OCIC" : "",
359 (temp & RH_HS_LPSC) ? " LPSC" : "",
360 (temp & RH_HS_DRWE) ? " DRWE" : "",
361 (temp & RH_HS_OCI) ? " OCI" : "",
362 (temp & RH_HS_LPS) ? " LPS" : ""
366 for (i = 0; i < ndp; i++) {
367 temp = roothub_portstatus (controller, i);
368 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
371 (temp & RH_PS_PRSC) ? " PRSC" : "",
372 (temp & RH_PS_OCIC) ? " OCIC" : "",
373 (temp & RH_PS_PSSC) ? " PSSC" : "",
374 (temp & RH_PS_PESC) ? " PESC" : "",
375 (temp & RH_PS_CSC) ? " CSC" : "",
377 (temp & RH_PS_LSDA) ? " LSDA" : "",
378 (temp & RH_PS_PPS) ? " PPS" : "",
379 (temp & RH_PS_PRS) ? " PRS" : "",
380 (temp & RH_PS_POCI) ? " POCI" : "",
381 (temp & RH_PS_PSS) ? " PSS" : "",
383 (temp & RH_PS_PES) ? " PES" : "",
384 (temp & RH_PS_CCS) ? " CCS" : ""
389 static void ohci_dump (ohci_t *controller, int verbose)
391 dbg ("OHCI controller usb-%s state", controller->slot_name);
393 /* dumps some of the state we know about */
394 ohci_dump_status (controller);
396 ep_print_int_eds (controller, "hcca");
397 dbg ("hcca frame #%04x", controller->hcca->frame_no);
398 ohci_dump_roothub (controller, 1);
404 /*-------------------------------------------------------------------------*
405 * Interface functions (URB)
406 *-------------------------------------------------------------------------*/
408 /* get a transfer request */
410 int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
411 int transfer_len, struct devrequest *setup, int interval)
415 urb_priv_t *purb_priv;
420 /* when controller's hung, permit only roothub cleanup attempts
421 * such as powering down ports */
422 if (ohci->disabled) {
423 err("sohci_submit_job: EPIPE");
427 /* if we have an unfinished URB from previous transaction let's
428 * fail and scream as quickly as possible so as not to corrupt
429 * further communication */
431 err("sohci_submit_job: URB NOT FINISHED");
434 /* we're about to begin a new transaction here so mark the URB unfinished */
438 /* every endpoint has a ed, locate and fill it */
439 if (!(ed = ep_add_ed (dev, pipe))) {
440 err("sohci_submit_job: ENOMEM");
444 /* for the private part of the URB we need the number of TDs (size) */
445 switch (usb_pipetype (pipe)) {
446 case PIPE_BULK: /* one TD for every 4096 Byte */
447 size = (transfer_len - 1) / 4096 + 1;
449 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
450 size = (transfer_len == 0)? 2:
451 (transfer_len - 1) / 4096 + 3;
455 if (size >= (N_URB_TD - 1)) {
456 err("need %d TDs, only have %d", size, N_URB_TD);
459 purb_priv = &urb_priv;
460 purb_priv->pipe = pipe;
462 /* fill the private part of the URB */
463 purb_priv->length = size;
465 purb_priv->actual_length = 0;
467 /* allocate the TDs */
468 /* note that td[0] was allocated in ep_add_ed */
469 for (i = 0; i < size; i++) {
470 purb_priv->td[i] = td_alloc (dev);
471 if (!purb_priv->td[i]) {
472 purb_priv->length = i;
473 urb_free_priv (purb_priv);
474 err("sohci_submit_job: ENOMEM");
479 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
480 urb_free_priv (purb_priv);
481 err("sohci_submit_job: EINVAL");
485 /* link the ed into a chain if is not already */
486 if (ed->state != ED_OPER)
489 /* fill the TDs and link it to the ed */
490 td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
495 /*-------------------------------------------------------------------------*/
498 /* tell us the current USB frame number */
500 static int sohci_get_current_frame_number (struct usb_device *usb_dev)
502 ohci_t *ohci = &gohci;
504 return m16_swap (ohci->hcca->frame_no);
508 /*-------------------------------------------------------------------------*
509 * ED handling functions
510 *-------------------------------------------------------------------------*/
512 /* link an ed into one of the HC chains */
514 static int ep_link (ohci_t *ohci, ed_t *edi)
516 volatile ed_t *ed = edi;
523 if (ohci->ed_controltail == NULL) {
524 writel (ed, &ohci->regs->ed_controlhead);
526 ohci->ed_controltail->hwNextED = m32_swap (ed);
528 ed->ed_prev = ohci->ed_controltail;
529 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
530 !ohci->ed_rm_list[1] && !ohci->sleeping) {
531 ohci->hc_control |= OHCI_CTRL_CLE;
532 writel (ohci->hc_control, &ohci->regs->control);
534 ohci->ed_controltail = edi;
539 if (ohci->ed_bulktail == NULL) {
540 writel (ed, &ohci->regs->ed_bulkhead);
542 ohci->ed_bulktail->hwNextED = m32_swap (ed);
544 ed->ed_prev = ohci->ed_bulktail;
545 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
546 !ohci->ed_rm_list[1] && !ohci->sleeping) {
547 ohci->hc_control |= OHCI_CTRL_BLE;
548 writel (ohci->hc_control, &ohci->regs->control);
550 ohci->ed_bulktail = edi;
556 /*-------------------------------------------------------------------------*/
558 /* unlink an ed from one of the HC chains.
559 * just the link to the ed is unlinked.
560 * the link from the ed still points to another operational ed or 0
561 * so the HC can eventually finish the processing of the unlinked ed */
563 static int ep_unlink (ohci_t *ohci, ed_t *edi)
565 volatile ed_t *ed = edi;
567 ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
571 if (ed->ed_prev == NULL) {
573 ohci->hc_control &= ~OHCI_CTRL_CLE;
574 writel (ohci->hc_control, &ohci->regs->control);
576 writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
578 ed->ed_prev->hwNextED = ed->hwNextED;
580 if (ohci->ed_controltail == ed) {
581 ohci->ed_controltail = ed->ed_prev;
583 ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
588 if (ed->ed_prev == NULL) {
590 ohci->hc_control &= ~OHCI_CTRL_BLE;
591 writel (ohci->hc_control, &ohci->regs->control);
593 writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
595 ed->ed_prev->hwNextED = ed->hwNextED;
597 if (ohci->ed_bulktail == ed) {
598 ohci->ed_bulktail = ed->ed_prev;
600 ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
604 ed->state = ED_UNLINK;
609 /*-------------------------------------------------------------------------*/
611 /* add/reinit an endpoint; this should be done once at the
612 * usb_set_configuration command, but the USB stack is a little bit
613 * stateless so we do it at every transaction if the state of the ed
614 * is ED_NEW then a dummy td is added and the state is changed to
615 * ED_UNLINK in all other cases the state is left unchanged the ed
616 * info fields are setted anyway even though most of them should not
619 static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
625 ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
626 (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
628 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
629 err("ep_add_ed: pending delete");
630 /* pending delete request */
634 if (ed->state == ED_NEW) {
635 ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
636 /* dummy td; end of td list for ed */
637 td = td_alloc (usb_dev);
638 ed->hwTailP = m32_swap (td);
639 ed->hwHeadP = ed->hwTailP;
640 ed->state = ED_UNLINK;
641 ed->type = usb_pipetype (pipe);
645 ed->hwINFO = m32_swap (usb_pipedevice (pipe)
646 | usb_pipeendpoint (pipe) << 7
647 | (usb_pipeisoc (pipe)? 0x8000: 0)
648 | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
649 | usb_pipeslow (pipe) << 13
650 | usb_maxpacket (usb_dev, pipe) << 16);
655 /*-------------------------------------------------------------------------*
656 * TD handling functions
657 *-------------------------------------------------------------------------*/
659 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
661 static void td_fill (ohci_t *ohci, unsigned int info,
663 struct usb_device *dev, int index, urb_priv_t *urb_priv)
665 volatile td_t *td, *td_pt;
666 #ifdef OHCI_FILL_TRACE
670 if (index > urb_priv->length) {
671 err("index > length");
674 /* use this td as the next dummy */
675 td_pt = urb_priv->td [index];
678 /* fill the old dummy TD */
679 td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
681 td->ed = urb_priv->ed;
682 td->next_dl_td = NULL;
684 td->data = (__u32)data;
685 #ifdef OHCI_FILL_TRACE
686 if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
687 for (i = 0; i < len; i++)
688 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
695 td->hwINFO = m32_swap (info);
696 td->hwCBP = m32_swap (data);
698 td->hwBE = m32_swap (data + len - 1);
701 td->hwNextTD = m32_swap (td_pt);
702 #ifndef S3C24X0_merge
703 td->hwPSW [0] = m16_swap (((__u32)data & 0x0FFF) | 0xE000);
706 /* append to queue */
707 td->ed->hwTailP = td->hwNextTD;
710 /*-------------------------------------------------------------------------*/
712 /* prepare all TDs of a transfer */
714 static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
715 int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
717 ohci_t *ohci = &gohci;
718 int data_len = transfer_len;
722 unsigned int toggle = 0;
724 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
725 if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
726 toggle = TD_T_TOGGLE;
729 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
737 switch (usb_pipetype (pipe)) {
739 info = usb_pipeout (pipe)?
740 TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
741 while(data_len > 4096) {
742 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
743 data += 4096; data_len -= 4096; cnt++;
745 info = usb_pipeout (pipe)?
746 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
747 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
751 writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
755 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
756 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
758 info = usb_pipeout (pipe)?
759 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
760 /* NOTE: mishandles transfers >8K, some >4K */
761 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
763 info = usb_pipeout (pipe)?
764 TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
765 td_fill (ohci, info, data, 0, dev, cnt++, urb);
767 writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
770 if (urb->length != cnt)
771 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
774 /*-------------------------------------------------------------------------*
775 * Done List handling functions
776 *-------------------------------------------------------------------------*/
779 /* calculate the transfer length and update the urb */
781 static void dl_transfer_length(td_t * td)
783 __u32 tdINFO, tdBE, tdCBP;
784 urb_priv_t *lurb_priv = &urb_priv;
786 tdINFO = m32_swap (td->hwINFO);
787 tdBE = m32_swap (td->hwBE);
788 tdCBP = m32_swap (td->hwCBP);
791 if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
792 ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
795 lurb_priv->actual_length += tdBE - td->data + 1;
797 lurb_priv->actual_length += tdCBP - td->data;
802 /*-------------------------------------------------------------------------*/
804 /* replies to the request have to be on a FIFO basis so
805 * we reverse the reversed done-list */
807 static td_t * dl_reverse_done_list (ohci_t *ohci)
811 td_t *td_list = NULL;
812 urb_priv_t *lurb_priv = NULL;
814 td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
815 ohci->hcca->done_head = 0;
818 td_list = (td_t *)td_list_hc;
820 if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
821 lurb_priv = &urb_priv;
822 dbg(" USB-error/status: %x : %p",
823 TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
824 if (td_list->ed->hwHeadP & m32_swap (0x1)) {
825 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
826 td_list->ed->hwHeadP =
827 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
828 (td_list->ed->hwHeadP & m32_swap (0x2));
829 lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
831 td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
833 #ifdef CONFIG_MPC5200
834 td_list->hwNextTD = 0;
838 td_list->next_dl_td = td_rev;
840 td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
845 /*-------------------------------------------------------------------------*/
848 static int dl_done_list (ohci_t *ohci, td_t *td_list)
850 td_t *td_list_next = NULL;
855 urb_priv_t *lurb_priv;
856 __u32 tdINFO, edHeadP, edTailP;
859 td_list_next = td_list->next_dl_td;
861 lurb_priv = &urb_priv;
862 tdINFO = m32_swap (td_list->hwINFO);
866 dl_transfer_length(td_list);
868 /* error code of transfer */
869 cc = TD_CC_GET (tdINFO);
871 dbg("ConditionCode %#x", cc);
872 stat = cc_to_error[cc];
875 /* see if this done list makes for all TD's of current URB,
876 * and mark the URB finished if so */
877 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
878 if ((ed->state & (ED_OPER | ED_UNLINK)))
881 dbg("dl_done_list: strange.., ED state %x, ed->state\n");
883 dbg("dl_done_list: processing TD %x, len %x\n", lurb_priv->td_cnt,
886 if (ed->state != ED_NEW) {
887 edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
888 edTailP = m32_swap (ed->hwTailP);
890 /* unlink eds if they are not busy */
891 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
892 ep_unlink (ohci, ed);
895 td_list = td_list_next;
900 /*-------------------------------------------------------------------------*
902 *-------------------------------------------------------------------------*/
904 /* Device descriptor */
905 static __u8 root_hub_dev_des[] =
907 0x12, /* __u8 bLength; */
908 0x01, /* __u8 bDescriptorType; Device */
909 0x10, /* __u16 bcdUSB; v1.1 */
911 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
912 0x00, /* __u8 bDeviceSubClass; */
913 0x00, /* __u8 bDeviceProtocol; */
914 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
915 0x00, /* __u16 idVendor; */
917 0x00, /* __u16 idProduct; */
919 0x00, /* __u16 bcdDevice; */
921 0x00, /* __u8 iManufacturer; */
922 0x01, /* __u8 iProduct; */
923 0x00, /* __u8 iSerialNumber; */
924 0x01 /* __u8 bNumConfigurations; */
928 /* Configuration descriptor */
929 static __u8 root_hub_config_des[] =
931 0x09, /* __u8 bLength; */
932 0x02, /* __u8 bDescriptorType; Configuration */
933 0x19, /* __u16 wTotalLength; */
935 0x01, /* __u8 bNumInterfaces; */
936 0x01, /* __u8 bConfigurationValue; */
937 0x00, /* __u8 iConfiguration; */
938 0x40, /* __u8 bmAttributes;
939 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
940 0x00, /* __u8 MaxPower; */
943 0x09, /* __u8 if_bLength; */
944 0x04, /* __u8 if_bDescriptorType; Interface */
945 0x00, /* __u8 if_bInterfaceNumber; */
946 0x00, /* __u8 if_bAlternateSetting; */
947 0x01, /* __u8 if_bNumEndpoints; */
948 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
949 0x00, /* __u8 if_bInterfaceSubClass; */
950 0x00, /* __u8 if_bInterfaceProtocol; */
951 0x00, /* __u8 if_iInterface; */
954 0x07, /* __u8 ep_bLength; */
955 0x05, /* __u8 ep_bDescriptorType; Endpoint */
956 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
957 0x03, /* __u8 ep_bmAttributes; Interrupt */
958 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
960 0xff /* __u8 ep_bInterval; 255 ms */
963 static unsigned char root_hub_str_index0[] =
965 0x04, /* __u8 bLength; */
966 0x03, /* __u8 bDescriptorType; String-descriptor */
967 0x09, /* __u8 lang ID */
968 0x04, /* __u8 lang ID */
971 static unsigned char root_hub_str_index1[] =
973 28, /* __u8 bLength; */
974 0x03, /* __u8 bDescriptorType; String-descriptor */
975 'O', /* __u8 Unicode */
976 0, /* __u8 Unicode */
977 'H', /* __u8 Unicode */
978 0, /* __u8 Unicode */
979 'C', /* __u8 Unicode */
980 0, /* __u8 Unicode */
981 'I', /* __u8 Unicode */
982 0, /* __u8 Unicode */
983 ' ', /* __u8 Unicode */
984 0, /* __u8 Unicode */
985 'R', /* __u8 Unicode */
986 0, /* __u8 Unicode */
987 'o', /* __u8 Unicode */
988 0, /* __u8 Unicode */
989 'o', /* __u8 Unicode */
990 0, /* __u8 Unicode */
991 't', /* __u8 Unicode */
992 0, /* __u8 Unicode */
993 ' ', /* __u8 Unicode */
994 0, /* __u8 Unicode */
995 'H', /* __u8 Unicode */
996 0, /* __u8 Unicode */
997 'u', /* __u8 Unicode */
998 0, /* __u8 Unicode */
999 'b', /* __u8 Unicode */
1000 0, /* __u8 Unicode */
1003 /* Hub class-specific descriptor is constructed dynamically */
1006 /*-------------------------------------------------------------------------*/
1008 #define OK(x) len = (x); break
1010 #define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
1011 #define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
1013 #define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
1014 #define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
1016 #define RD_RH_STAT roothub_status(&gohci)
1017 #define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
1019 /* request to virtual root hub */
1021 int rh_check_port_status(ohci_t *controller)
1027 temp = roothub_a (controller);
1028 ndp = (temp & RH_A_NDP);
1029 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1030 ndp = (ndp == 2) ? 1:0;
1032 for (i = 0; i < ndp; i++) {
1033 temp = roothub_portstatus (controller, i);
1034 /* check for a device disconnect */
1035 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1036 (RH_PS_PESC | RH_PS_CSC)) &&
1037 ((temp & RH_PS_CCS) == 0)) {
1045 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1046 void *buffer, int transfer_len, struct devrequest *cmd)
1048 void * data = buffer;
1049 int leni = transfer_len;
1053 __u8 *data_buf = (__u8 *)datab;
1060 urb_priv.actual_length = 0;
1061 pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
1065 if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
1066 info("Root-Hub submit IRQ: NOT implemented");
1070 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
1071 wValue = m16_swap (cmd->value);
1072 wIndex = m16_swap (cmd->index);
1073 wLength = m16_swap (cmd->length);
1075 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1076 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1078 switch (bmRType_bReq) {
1079 /* Request Destination:
1080 without flags: Device,
1081 RH_INTERFACE: interface,
1082 RH_ENDPOINT: endpoint,
1083 RH_CLASS means HUB here,
1084 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1088 *(__u16 *) data_buf = m16_swap (1); OK (2);
1089 case RH_GET_STATUS | RH_INTERFACE:
1090 *(__u16 *) data_buf = m16_swap (0); OK (2);
1091 case RH_GET_STATUS | RH_ENDPOINT:
1092 *(__u16 *) data_buf = m16_swap (0); OK (2);
1093 case RH_GET_STATUS | RH_CLASS:
1094 *(__u32 *) data_buf = m32_swap (
1095 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1097 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1098 *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
1100 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1102 case (RH_ENDPOINT_STALL): OK (0);
1106 case RH_CLEAR_FEATURE | RH_CLASS:
1108 case RH_C_HUB_LOCAL_POWER:
1110 case (RH_C_HUB_OVER_CURRENT):
1111 WR_RH_STAT(RH_HS_OCIC); OK (0);
1115 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1117 case (RH_PORT_ENABLE):
1118 WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1119 case (RH_PORT_SUSPEND):
1120 WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1121 case (RH_PORT_POWER):
1122 WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1123 case (RH_C_PORT_CONNECTION):
1124 WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1125 case (RH_C_PORT_ENABLE):
1126 WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1127 case (RH_C_PORT_SUSPEND):
1128 WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1129 case (RH_C_PORT_OVER_CURRENT):
1130 WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1131 case (RH_C_PORT_RESET):
1132 WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1136 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1138 case (RH_PORT_SUSPEND):
1139 WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1140 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1141 if (RD_RH_PORTSTAT & RH_PS_CCS)
1142 WR_RH_PORTSTAT (RH_PS_PRS);
1144 case (RH_PORT_POWER):
1145 WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
1146 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1147 if (RD_RH_PORTSTAT & RH_PS_CCS)
1148 WR_RH_PORTSTAT (RH_PS_PES );
1153 case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
1155 case RH_GET_DESCRIPTOR:
1156 switch ((wValue & 0xff00) >> 8) {
1157 case (0x01): /* device descriptor */
1158 len = min_t(unsigned int,
1161 sizeof (root_hub_dev_des),
1163 data_buf = root_hub_dev_des; OK(len);
1164 case (0x02): /* configuration descriptor */
1165 len = min_t(unsigned int,
1168 sizeof (root_hub_config_des),
1170 data_buf = root_hub_config_des; OK(len);
1171 case (0x03): /* string descriptors */
1172 if(wValue==0x0300) {
1173 len = min_t(unsigned int,
1176 sizeof (root_hub_str_index0),
1178 data_buf = root_hub_str_index0;
1181 if(wValue==0x0301) {
1182 len = min_t(unsigned int,
1185 sizeof (root_hub_str_index1),
1187 data_buf = root_hub_str_index1;
1191 stat = USB_ST_STALLED;
1195 case RH_GET_DESCRIPTOR | RH_CLASS:
1197 __u32 temp = roothub_a (&gohci);
1199 data_buf [0] = 9; /* min length; */
1200 data_buf [1] = 0x29;
1201 data_buf [2] = temp & RH_A_NDP;
1202 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1203 data_buf [2] = (data_buf [2] == 2) ? 1:0;
1206 if (temp & RH_A_PSM) /* per-port power switching? */
1207 data_buf [3] |= 0x1;
1208 if (temp & RH_A_NOCP) /* no overcurrent reporting? */
1209 data_buf [3] |= 0x10;
1210 else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
1211 data_buf [3] |= 0x8;
1213 /* corresponds to data_buf[4-7] */
1215 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1216 temp = roothub_b (&gohci);
1217 data_buf [7] = temp & RH_B_DR;
1218 if (data_buf [2] < 7) {
1219 data_buf [8] = 0xff;
1222 data_buf [8] = (temp & RH_B_DR) >> 8;
1223 data_buf [10] = data_buf [9] = 0xff;
1226 len = min_t(unsigned int, leni,
1227 min_t(unsigned int, data_buf [0], wLength));
1231 case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
1233 case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
1236 dbg ("unsupported root hub command");
1237 stat = USB_ST_STALLED;
1241 ohci_dump_roothub (&gohci, 1);
1246 len = min_t(int, len, leni);
1247 if (data != data_buf)
1248 memcpy (data, data_buf, len);
1254 urb_priv.actual_length = transfer_len;
1255 pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1263 /*-------------------------------------------------------------------------*/
1265 /* common code for handling submit messages - used for all but root hub */
1267 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1268 int transfer_len, struct devrequest *setup, int interval)
1271 int maxsize = usb_maxpacket(dev, pipe);
1274 /* device pulled? Shortcut the action. */
1275 if (devgone == dev) {
1276 dev->status = USB_ST_CRC_ERR;
1281 urb_priv.actual_length = 0;
1282 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1287 err("submit_common_message: pipesize for pipe %lx is zero",
1292 if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
1293 err("sohci_submit_job failed");
1298 /* ohci_dump_status(&gohci); */
1300 /* allow more time for a BULK device to react - some are slow */
1301 #define BULK_TO 5000 /* timeout in milliseconds */
1302 if (usb_pipetype (pipe) == PIPE_BULK)
1307 /* wait for it to complete */
1309 /* check whether the controller is done */
1310 stat = hc_interrupt();
1312 stat = USB_ST_CRC_ERR;
1316 #ifdef S3C24X0_merge
1317 /* NOTE: since we are not interrupt driven in U-Boot and always
1318 * handle only one URB at a time, we cannot assume the
1319 * transaction finished on the first successful return from
1320 * hc_interrupt().. unless the flag for current URB is set,
1321 * meaning that all TD's to/from device got actually
1322 * transferred and processed. If the current URB is not
1323 * finished we need to re-iterate this loop so as
1324 * hc_interrupt() gets called again as there needs to be some
1325 * more TD's to process still */
1326 if ((stat >= 0) && (stat != 0xff) && (urb_finished)) {
1328 if (stat >= 0 && stat != 0xff) {
1330 /* 0xff is returned for an SF-interrupt */
1337 err("CTL:TIMEOUT ");
1338 #ifdef S3C24X0_merge
1339 dbg("submit_common_msg: TO status %x\n", stat);
1342 stat = USB_ST_CRC_ERR;
1346 #ifndef S3C24X0_merge
1347 /* we got an Root Hub Status Change interrupt */
1350 ohci_dump_roothub (&gohci, 1);
1354 timeout = rh_check_port_status(&gohci);
1356 #if 0 /* this does nothing useful, but leave it here in case that changes */
1357 /* the called routine adds 1 to the passed value */
1358 usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
1362 * This is potentially dangerous because it assumes
1363 * that only one device is ever plugged in!
1368 #endif /* S3C24X0_merge */
1371 dev->act_len = transfer_len;
1374 pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1379 /* free TDs in urb_priv */
1380 urb_free_priv (&urb_priv);
1384 /* submit routines called from usb.c */
1385 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1388 info("submit_bulk_msg");
1389 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1392 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1393 int transfer_len, struct devrequest *setup)
1395 int maxsize = usb_maxpacket(dev, pipe);
1397 info("submit_control_msg");
1399 urb_priv.actual_length = 0;
1400 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1405 err("submit_control_message: pipesize for pipe %lx is zero",
1409 if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1411 /* root hub - redirect */
1412 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1416 return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1419 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1420 int transfer_len, int interval)
1422 info("submit_int_msg");
1426 /*-------------------------------------------------------------------------*
1428 *-------------------------------------------------------------------------*/
1430 /* reset the HC and BUS */
1432 static int hc_reset (ohci_t *ohci)
1435 int smm_timeout = 50; /* 0,5 sec */
1437 dbg("%s\n", __FUNCTION__);
1439 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1440 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1441 info("USB HC TakeOver from SMM");
1442 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1444 if (--smm_timeout == 0) {
1445 err("USB HC TakeOver failed!");
1451 /* Disable HC interrupts */
1452 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1454 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1456 readl(&ohci->regs->control));
1458 /* Reset USB (needed by some controllers) */
1459 ohci->hc_control = 0;
1460 writel (ohci->hc_control, &ohci->regs->control);
1462 /* HC Reset requires max 10 us delay */
1463 writel (OHCI_HCR, &ohci->regs->cmdstatus);
1464 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1465 if (--timeout == 0) {
1466 err("USB HC reset timed out!");
1474 /*-------------------------------------------------------------------------*/
1476 /* Start an OHCI controller, set the BUS operational
1478 * connect the virtual root hub */
1480 static int hc_start (ohci_t * ohci)
1483 unsigned int fminterval;
1487 /* Tell the controller where the control and bulk lists are
1488 * The lists are empty now. */
1490 writel (0, &ohci->regs->ed_controlhead);
1491 writel (0, &ohci->regs->ed_bulkhead);
1493 writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1495 fminterval = 0x2edf;
1496 writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1497 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1498 writel (fminterval, &ohci->regs->fminterval);
1499 writel (0x628, &ohci->regs->lsthresh);
1501 /* start controller operations */
1502 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1504 writel (ohci->hc_control, &ohci->regs->control);
1506 /* disable all interrupts */
1507 mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1508 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1509 OHCI_INTR_OC | OHCI_INTR_MIE);
1510 writel (mask, &ohci->regs->intrdisable);
1511 /* clear all interrupts */
1512 mask &= ~OHCI_INTR_MIE;
1513 writel (mask, &ohci->regs->intrstatus);
1514 /* Choose the interrupts we care about now - but w/o MIE */
1515 mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1516 writel (mask, &ohci->regs->intrenable);
1519 /* required for AMD-756 and some Mac platforms */
1520 writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1521 &ohci->regs->roothub.a);
1522 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1523 #endif /* OHCI_USE_NPS */
1525 #define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
1526 /* POTPGT delay is bits 24-31, in 2 ms units. */
1527 mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1529 /* connect the virtual root hub */
1530 ohci->rh.devnum = 0;
1535 /*-------------------------------------------------------------------------*/
1537 /* an interrupt happens */
1539 static int hc_interrupt (void)
1541 ohci_t *ohci = &gohci;
1542 struct ohci_regs *regs = ohci->regs;
1546 #ifdef S3C24X0_merge
1548 if ((ohci->hcca->done_head != 0) &&
1549 !(m32_swap (ohci->hcca->done_head) & 0x01)) {
1550 ints = OHCI_INTR_WDH;
1551 } else if ((ints = readl (®s->intrstatus)) == ~(u32)0) {
1553 err ("%s device removed!", ohci->slot_name);
1555 } else if ((ints &= readl (®s->intrenable)) == 0) {
1556 dbg("hc_interrupt: returning..\n");
1560 if ((ohci->hcca->done_head != 0) && !(m32_swap (ohci->hcca->done_head) & 0x01)) {
1561 ints = OHCI_INTR_WDH;
1563 ints = readl (®s->intrstatus);
1566 /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1568 if (ints & OHCI_INTR_RHSC) {
1570 #ifdef S3C24X0_merge
1575 if (ints & OHCI_INTR_UE) {
1577 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1579 /* e.g. due to PCI Master/Target Abort */
1582 ohci_dump (ohci, 1);
1586 /* FIXME: be optimistic, hope that bug won't repeat often. */
1587 /* Make some non-interrupt context restart the controller. */
1588 /* Count and limit the retries though; either hardware or */
1589 /* software errors can go forever... */
1594 if (ints & OHCI_INTR_WDH) {
1596 writel (OHCI_INTR_WDH, ®s->intrdisable);
1597 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1598 writel (OHCI_INTR_WDH, ®s->intrenable);
1601 if (ints & OHCI_INTR_SO) {
1602 dbg("USB Schedule overrun\n");
1603 writel (OHCI_INTR_SO, ®s->intrenable);
1607 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1608 if (ints & OHCI_INTR_SF) {
1609 unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
1611 writel (OHCI_INTR_SF, ®s->intrdisable);
1612 if (ohci->ed_rm_list[frame] != NULL)
1613 writel (OHCI_INTR_SF, ®s->intrenable);
1617 writel (ints, ®s->intrstatus);
1621 /*-------------------------------------------------------------------------*/
1623 /*-------------------------------------------------------------------------*/
1625 /* De-allocate all resources.. */
1627 static void hc_release_ohci (ohci_t *ohci)
1629 dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1631 if (!ohci->disabled)
1635 /*-------------------------------------------------------------------------*/
1638 * low level initalisation routine, called from usb.c
1640 static char ohci_inited = 0;
1642 int usb_lowlevel_init(void)
1645 #ifdef CFG_USB_OHCI_CPU_INIT
1646 /* cpu dependant init */
1651 #ifdef CFG_USB_OHCI_BOARD_INIT
1652 /* board dependant init */
1653 if(usb_board_init())
1656 memset (&gohci, 0, sizeof (ohci_t));
1657 memset (&urb_priv, 0, sizeof (urb_priv_t));
1659 /* align the storage */
1660 if ((__u32)&ghcca[0] & 0xff) {
1661 err("HCCA not aligned!!");
1665 info("aligned ghcca %p", phcca);
1666 memset(&ohci_dev, 0, sizeof(struct ohci_device));
1667 if ((__u32)&ohci_dev.ed[0] & 0x7) {
1668 err("EDs not aligned!!");
1671 memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1672 if ((__u32)gtd & 0x7) {
1673 err("TDs not aligned!!");
1678 memset (phcca, 0, sizeof (struct ohci_hcca));
1683 gohci.regs = (struct ohci_regs *)CFG_USB_OHCI_REGS_BASE;
1686 gohci.slot_name = CFG_USB_OHCI_SLOT_NAME;
1688 if (hc_reset (&gohci) < 0) {
1689 hc_release_ohci (&gohci);
1690 err ("can't reset usb-%s", gohci.slot_name);
1691 #ifdef CFG_USB_OHCI_BOARD_INIT
1692 /* board dependant cleanup */
1693 usb_board_init_fail();
1696 #ifdef CFG_USB_OHCI_CPU_INIT
1697 /* cpu dependant cleanup */
1698 usb_cpu_init_fail();
1703 /* FIXME this is a second HC reset; why?? */
1704 /* writel(gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
1706 if (hc_start (&gohci) < 0) {
1707 err ("can't start usb-%s", gohci.slot_name);
1708 hc_release_ohci (&gohci);
1709 /* Initialization failed */
1710 #ifdef CFG_USB_OHCI_BOARD_INIT
1711 /* board dependant cleanup */
1715 #ifdef CFG_USB_OHCI_CPU_INIT
1716 /* cpu dependant cleanup */
1723 ohci_dump (&gohci, 1);
1726 # ifdef S3C24X0_merge
1734 int usb_lowlevel_stop(void)
1736 /* this gets called really early - before the controller has */
1737 /* even been initialized! */
1740 /* TODO release any interrupts, etc. */
1741 /* call hc_release_ohci() here ? */
1744 #ifdef CFG_USB_OHCI_BOARD_INIT
1745 /* board dependant cleanup */
1746 if(usb_board_stop())
1750 #ifdef CFG_USB_OHCI_CPU_INIT
1751 /* cpu dependant cleanup */
1759 #endif /* CONFIG_USB_OHCI_NEW */