1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2012 Samsung Electronics
5 * Author: InKi Dae <inki.dae@samsung.com>
6 * Author: Donghwa Lee <dh09.lee@samsung.com>
10 #include <asm/arch/dsim.h>
11 #include <asm/arch/mipi_dsim.h>
12 #include <asm/arch/power.h>
13 #include <asm/arch/cpu.h>
15 #include "exynos_mipi_dsi_lowlevel.h"
16 #include "exynos_mipi_dsi_common.h"
18 void exynos_mipi_dsi_func_reset(struct mipi_dsim_device *dsim)
22 struct exynos_mipi_dsim *mipi_dsim =
23 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
25 reg = readl(&mipi_dsim->swrst);
29 writel(reg, &mipi_dsim->swrst);
32 void exynos_mipi_dsi_sw_reset(struct mipi_dsim_device *dsim)
36 struct exynos_mipi_dsim *mipi_dsim =
37 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
39 reg = readl(&mipi_dsim->swrst);
44 writel(reg, &mipi_dsim->swrst);
47 void exynos_mipi_dsi_sw_release(struct mipi_dsim_device *dsim)
49 struct exynos_mipi_dsim *mipi_dsim =
50 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
51 unsigned int reg = readl(&mipi_dsim->intsrc);
53 reg |= INTSRC_SWRST_RELEASE;
55 writel(reg, &mipi_dsim->intsrc);
58 void exynos_mipi_dsi_set_interrupt_mask(struct mipi_dsim_device *dsim,
59 unsigned int mode, unsigned int mask)
61 struct exynos_mipi_dsim *mipi_dsim =
62 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
63 unsigned int reg = readl(&mipi_dsim->intmsk);
70 writel(reg, &mipi_dsim->intmsk);
73 void exynos_mipi_dsi_init_fifo_pointer(struct mipi_dsim_device *dsim,
77 struct exynos_mipi_dsim *mipi_dsim =
78 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
80 reg = readl(&mipi_dsim->fifoctrl);
82 writel(reg & ~(cfg), &mipi_dsim->fifoctrl);
86 writel(reg, &mipi_dsim->fifoctrl);
90 * this function set PLL P, M and S value in D-PHY
92 void exynos_mipi_dsi_set_phy_tunning(struct mipi_dsim_device *dsim,
95 struct exynos_mipi_dsim *mipi_dsim =
96 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
98 writel(DSIM_AFC_CTL(value), &mipi_dsim->phyacchr);
101 void exynos_mipi_dsi_set_main_disp_resol(struct mipi_dsim_device *dsim,
102 unsigned int width_resol, unsigned int height_resol)
105 struct exynos_mipi_dsim *mipi_dsim =
106 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
108 /* standby should be set after configuration so set to not ready*/
109 reg = (readl(&mipi_dsim->mdresol)) & ~(DSIM_MAIN_STAND_BY);
110 writel(reg, &mipi_dsim->mdresol);
112 /* reset resolution */
113 reg &= ~(DSIM_MAIN_VRESOL(0x7ff) | DSIM_MAIN_HRESOL(0x7ff));
114 reg |= DSIM_MAIN_VRESOL(height_resol) | DSIM_MAIN_HRESOL(width_resol);
116 reg |= DSIM_MAIN_STAND_BY;
117 writel(reg, &mipi_dsim->mdresol);
120 void exynos_mipi_dsi_set_main_disp_vporch(struct mipi_dsim_device *dsim,
121 unsigned int cmd_allow, unsigned int vfront, unsigned int vback)
124 struct exynos_mipi_dsim *mipi_dsim =
125 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
127 reg = (readl(&mipi_dsim->mvporch)) &
128 ~((DSIM_CMD_ALLOW_MASK) | (DSIM_STABLE_VFP_MASK) |
129 (DSIM_MAIN_VBP_MASK));
131 reg |= ((cmd_allow & 0xf) << DSIM_CMD_ALLOW_SHIFT) |
132 ((vfront & 0x7ff) << DSIM_STABLE_VFP_SHIFT) |
133 ((vback & 0x7ff) << DSIM_MAIN_VBP_SHIFT);
135 writel(reg, &mipi_dsim->mvporch);
138 void exynos_mipi_dsi_set_main_disp_hporch(struct mipi_dsim_device *dsim,
139 unsigned int front, unsigned int back)
142 struct exynos_mipi_dsim *mipi_dsim =
143 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
145 reg = (readl(&mipi_dsim->mhporch)) &
146 ~((DSIM_MAIN_HFP_MASK) | (DSIM_MAIN_HBP_MASK));
148 reg |= (front << DSIM_MAIN_HFP_SHIFT) | (back << DSIM_MAIN_HBP_SHIFT);
150 writel(reg, &mipi_dsim->mhporch);
153 void exynos_mipi_dsi_set_main_disp_sync_area(struct mipi_dsim_device *dsim,
154 unsigned int vert, unsigned int hori)
157 struct exynos_mipi_dsim *mipi_dsim =
158 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
160 reg = (readl(&mipi_dsim->msync)) &
161 ~((DSIM_MAIN_VSA_MASK) | (DSIM_MAIN_HSA_MASK));
163 reg |= ((vert & 0x3ff) << DSIM_MAIN_VSA_SHIFT) |
164 (hori << DSIM_MAIN_HSA_SHIFT);
166 writel(reg, &mipi_dsim->msync);
169 void exynos_mipi_dsi_set_sub_disp_resol(struct mipi_dsim_device *dsim,
170 unsigned int vert, unsigned int hori)
173 struct exynos_mipi_dsim *mipi_dsim =
174 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
176 reg = (readl(&mipi_dsim->sdresol)) &
177 ~(DSIM_SUB_STANDY_MASK);
179 writel(reg, &mipi_dsim->sdresol);
181 reg &= ~(DSIM_SUB_VRESOL_MASK) | ~(DSIM_SUB_HRESOL_MASK);
182 reg |= ((vert & 0x7ff) << DSIM_SUB_VRESOL_SHIFT) |
183 ((hori & 0x7ff) << DSIM_SUB_HRESOL_SHIFT);
184 writel(reg, &mipi_dsim->sdresol);
187 reg |= (1 << DSIM_SUB_STANDY_SHIFT);
188 writel(reg, &mipi_dsim->sdresol);
191 void exynos_mipi_dsi_init_config(struct mipi_dsim_device *dsim)
193 struct mipi_dsim_config *dsim_config = dsim->dsim_config;
194 struct exynos_mipi_dsim *mipi_dsim =
195 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
196 unsigned int cfg = (readl(&mipi_dsim->config)) &
197 ~((1 << DSIM_EOT_PACKET_SHIFT) |
198 (0x1f << DSIM_HSA_MODE_SHIFT) |
199 (0x3 << DSIM_NUM_OF_DATALANE_SHIFT));
201 cfg |= (dsim_config->auto_flush << DSIM_AUTO_FLUSH_SHIFT) |
202 (dsim_config->eot_disable << DSIM_EOT_PACKET_SHIFT) |
203 (dsim_config->auto_vertical_cnt << DSIM_AUTO_MODE_SHIFT) |
204 (dsim_config->hse << DSIM_HSE_MODE_SHIFT) |
205 (dsim_config->hfp << DSIM_HFP_MODE_SHIFT) |
206 (dsim_config->hbp << DSIM_HBP_MODE_SHIFT) |
207 (dsim_config->hsa << DSIM_HSA_MODE_SHIFT) |
208 (dsim_config->e_no_data_lane << DSIM_NUM_OF_DATALANE_SHIFT);
210 writel(cfg, &mipi_dsim->config);
213 void exynos_mipi_dsi_display_config(struct mipi_dsim_device *dsim,
214 struct mipi_dsim_config *dsim_config)
216 struct exynos_mipi_dsim *mipi_dsim =
217 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
219 u32 reg = (readl(&mipi_dsim->config)) &
220 ~((0x3 << DSIM_BURST_MODE_SHIFT) | (1 << DSIM_VIDEO_MODE_SHIFT)
221 | (0x3 << DSIM_MAINVC_SHIFT) | (0x7 << DSIM_MAINPIX_SHIFT)
222 | (0x3 << DSIM_SUBVC_SHIFT) | (0x7 << DSIM_SUBPIX_SHIFT));
224 if (dsim_config->e_interface == DSIM_VIDEO)
225 reg |= (1 << DSIM_VIDEO_MODE_SHIFT);
226 else if (dsim_config->e_interface == DSIM_COMMAND)
227 reg &= ~(1 << DSIM_VIDEO_MODE_SHIFT);
229 printf("unknown lcd type.\n");
234 reg |= ((u8) (dsim_config->e_burst_mode) & 0x3) << DSIM_BURST_MODE_SHIFT
235 | ((u8) (dsim_config->e_virtual_ch) & 0x3) << DSIM_MAINVC_SHIFT
236 | ((u8) (dsim_config->e_pixel_format) & 0x7) << DSIM_MAINPIX_SHIFT;
238 writel(reg, &mipi_dsim->config);
241 void exynos_mipi_dsi_enable_lane(struct mipi_dsim_device *dsim,
242 unsigned int lane, unsigned int enable)
245 struct exynos_mipi_dsim *mipi_dsim =
246 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
248 reg = readl(&mipi_dsim->config);
251 reg |= DSIM_LANE_ENx(lane);
253 reg &= ~DSIM_LANE_ENx(lane);
255 writel(reg, &mipi_dsim->config);
258 void exynos_mipi_dsi_set_data_lane_number(struct mipi_dsim_device *dsim,
262 struct exynos_mipi_dsim *mipi_dsim =
263 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
265 /* get the data lane number. */
266 cfg = DSIM_NUM_OF_DATA_LANE(count);
268 writel(cfg, &mipi_dsim->config);
271 void exynos_mipi_dsi_enable_afc(struct mipi_dsim_device *dsim,
272 unsigned int enable, unsigned int afc_code)
274 struct exynos_mipi_dsim *mipi_dsim =
275 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
276 unsigned int reg = readl(&mipi_dsim->phyacchr);
282 reg &= ~(0x7 << DSIM_AFC_CTL_SHIFT);
283 reg |= DSIM_AFC_CTL(afc_code);
287 writel(reg, &mipi_dsim->phyacchr);
290 void exynos_mipi_dsi_enable_pll_bypass(struct mipi_dsim_device *dsim,
293 struct exynos_mipi_dsim *mipi_dsim =
294 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
295 unsigned int reg = (readl(&mipi_dsim->clkctrl)) &
296 ~(DSIM_PLL_BYPASS_EXTERNAL);
298 reg |= enable << DSIM_PLL_BYPASS_SHIFT;
300 writel(reg, &mipi_dsim->clkctrl);
303 void exynos_mipi_dsi_pll_freq_band(struct mipi_dsim_device *dsim,
304 unsigned int freq_band)
306 struct exynos_mipi_dsim *mipi_dsim =
307 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
308 unsigned int reg = (readl(&mipi_dsim->pllctrl)) &
309 ~(0x1f << DSIM_FREQ_BAND_SHIFT);
311 reg |= ((freq_band & 0x1f) << DSIM_FREQ_BAND_SHIFT);
313 writel(reg, &mipi_dsim->pllctrl);
316 void exynos_mipi_dsi_pll_freq(struct mipi_dsim_device *dsim,
317 unsigned int pre_divider, unsigned int main_divider,
320 struct exynos_mipi_dsim *mipi_dsim =
321 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
322 unsigned int reg = (readl(&mipi_dsim->pllctrl)) &
325 reg |= ((pre_divider & 0x3f) << DSIM_PREDIV_SHIFT) |
326 ((main_divider & 0x1ff) << DSIM_MAIN_SHIFT) |
327 ((scaler & 0x7) << DSIM_SCALER_SHIFT);
329 writel(reg, &mipi_dsim->pllctrl);
332 void exynos_mipi_dsi_pll_stable_time(struct mipi_dsim_device *dsim,
333 unsigned int lock_time)
335 struct exynos_mipi_dsim *mipi_dsim =
336 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
338 writel(lock_time, &mipi_dsim->plltmr);
341 void exynos_mipi_dsi_enable_pll(struct mipi_dsim_device *dsim,
344 struct exynos_mipi_dsim *mipi_dsim =
345 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
346 unsigned int reg = (readl(&mipi_dsim->pllctrl)) &
347 ~(0x1 << DSIM_PLL_EN_SHIFT);
349 reg |= ((enable & 0x1) << DSIM_PLL_EN_SHIFT);
351 writel(reg, &mipi_dsim->pllctrl);
354 void exynos_mipi_dsi_set_byte_clock_src(struct mipi_dsim_device *dsim,
357 struct exynos_mipi_dsim *mipi_dsim =
358 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
359 unsigned int reg = (readl(&mipi_dsim->clkctrl)) &
360 ~(0x3 << DSIM_BYTE_CLK_SRC_SHIFT);
362 reg |= ((unsigned int) src) << DSIM_BYTE_CLK_SRC_SHIFT;
364 writel(reg, &mipi_dsim->clkctrl);
367 void exynos_mipi_dsi_enable_byte_clock(struct mipi_dsim_device *dsim,
370 struct exynos_mipi_dsim *mipi_dsim =
371 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
372 unsigned int reg = (readl(&mipi_dsim->clkctrl)) &
373 ~(1 << DSIM_BYTE_CLKEN_SHIFT);
375 reg |= enable << DSIM_BYTE_CLKEN_SHIFT;
377 writel(reg, &mipi_dsim->clkctrl);
380 void exynos_mipi_dsi_set_esc_clk_prs(struct mipi_dsim_device *dsim,
381 unsigned int enable, unsigned int prs_val)
383 struct exynos_mipi_dsim *mipi_dsim =
384 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
385 unsigned int reg = (readl(&mipi_dsim->clkctrl)) &
386 ~((1 << DSIM_ESC_CLKEN_SHIFT) | (0xffff));
388 reg |= enable << DSIM_ESC_CLKEN_SHIFT;
392 writel(reg, &mipi_dsim->clkctrl);
395 void exynos_mipi_dsi_enable_esc_clk_on_lane(struct mipi_dsim_device *dsim,
396 unsigned int lane_sel, unsigned int enable)
398 struct exynos_mipi_dsim *mipi_dsim =
399 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
400 unsigned int reg = readl(&mipi_dsim->clkctrl);
403 reg |= DSIM_LANE_ESC_CLKEN(lane_sel);
405 reg &= ~DSIM_LANE_ESC_CLKEN(lane_sel);
407 writel(reg, &mipi_dsim->clkctrl);
410 void exynos_mipi_dsi_force_dphy_stop_state(struct mipi_dsim_device *dsim,
413 struct exynos_mipi_dsim *mipi_dsim =
414 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
415 unsigned int reg = (readl(&mipi_dsim->escmode)) &
416 ~(0x1 << DSIM_FORCE_STOP_STATE_SHIFT);
418 reg |= ((enable & 0x1) << DSIM_FORCE_STOP_STATE_SHIFT);
420 writel(reg, &mipi_dsim->escmode);
423 unsigned int exynos_mipi_dsi_is_lane_state(struct mipi_dsim_device *dsim)
425 struct exynos_mipi_dsim *mipi_dsim =
426 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
427 unsigned int reg = readl(&mipi_dsim->status);
430 * check clock and data lane states.
431 * if MIPI-DSI controller was enabled at bootloader then
432 * TX_READY_HS_CLK is enabled otherwise STOP_STATE_CLK.
433 * so it should be checked for two case.
435 if ((reg & DSIM_STOP_STATE_DAT(0xf)) &&
436 ((reg & DSIM_STOP_STATE_CLK) ||
437 (reg & DSIM_TX_READY_HS_CLK)))
443 void exynos_mipi_dsi_set_stop_state_counter(struct mipi_dsim_device *dsim,
444 unsigned int cnt_val)
446 struct exynos_mipi_dsim *mipi_dsim =
447 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
448 unsigned int reg = (readl(&mipi_dsim->escmode)) &
449 ~(0x7ff << DSIM_STOP_STATE_CNT_SHIFT);
451 reg |= ((cnt_val & 0x7ff) << DSIM_STOP_STATE_CNT_SHIFT);
453 writel(reg, &mipi_dsim->escmode);
456 void exynos_mipi_dsi_set_bta_timeout(struct mipi_dsim_device *dsim,
457 unsigned int timeout)
459 struct exynos_mipi_dsim *mipi_dsim =
460 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
461 unsigned int reg = (readl(&mipi_dsim->timeout)) &
462 ~(0xff << DSIM_BTA_TOUT_SHIFT);
464 reg |= (timeout << DSIM_BTA_TOUT_SHIFT);
466 writel(reg, &mipi_dsim->timeout);
469 void exynos_mipi_dsi_set_lpdr_timeout(struct mipi_dsim_device *dsim,
470 unsigned int timeout)
472 struct exynos_mipi_dsim *mipi_dsim =
473 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
474 unsigned int reg = (readl(&mipi_dsim->timeout)) &
475 ~(0xffff << DSIM_LPDR_TOUT_SHIFT);
477 reg |= (timeout << DSIM_LPDR_TOUT_SHIFT);
479 writel(reg, &mipi_dsim->timeout);
482 void exynos_mipi_dsi_set_cpu_transfer_mode(struct mipi_dsim_device *dsim,
485 struct exynos_mipi_dsim *mipi_dsim =
486 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
487 unsigned int reg = readl(&mipi_dsim->escmode);
489 reg &= ~DSIM_CMD_LPDT_LP;
492 reg |= DSIM_CMD_LPDT_LP;
494 writel(reg, &mipi_dsim->escmode);
497 void exynos_mipi_dsi_set_lcdc_transfer_mode(struct mipi_dsim_device *dsim,
500 struct exynos_mipi_dsim *mipi_dsim =
501 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
502 unsigned int reg = readl(&mipi_dsim->escmode);
504 reg &= ~DSIM_TX_LPDT_LP;
507 reg |= DSIM_TX_LPDT_LP;
509 writel(reg, &mipi_dsim->escmode);
512 void exynos_mipi_dsi_enable_hs_clock(struct mipi_dsim_device *dsim,
515 struct exynos_mipi_dsim *mipi_dsim =
516 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
517 unsigned int reg = (readl(&mipi_dsim->clkctrl)) &
518 ~(1 << DSIM_TX_REQUEST_HSCLK_SHIFT);
520 reg |= enable << DSIM_TX_REQUEST_HSCLK_SHIFT;
522 writel(reg, &mipi_dsim->clkctrl);
525 void exynos_mipi_dsi_dp_dn_swap(struct mipi_dsim_device *dsim,
526 unsigned int swap_en)
528 struct exynos_mipi_dsim *mipi_dsim =
529 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
530 unsigned int reg = readl(&mipi_dsim->phyacchr1);
532 reg &= ~(0x3 << DSIM_DPDN_SWAP_DATA_SHIFT);
533 reg |= (swap_en & 0x3) << DSIM_DPDN_SWAP_DATA_SHIFT;
535 writel(reg, &mipi_dsim->phyacchr1);
538 void exynos_mipi_dsi_hs_zero_ctrl(struct mipi_dsim_device *dsim,
539 unsigned int hs_zero)
541 struct exynos_mipi_dsim *mipi_dsim =
542 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
543 unsigned int reg = (readl(&mipi_dsim->pllctrl)) &
544 ~(0xf << DSIM_ZEROCTRL_SHIFT);
546 reg |= ((hs_zero & 0xf) << DSIM_ZEROCTRL_SHIFT);
548 writel(reg, &mipi_dsim->pllctrl);
551 void exynos_mipi_dsi_prep_ctrl(struct mipi_dsim_device *dsim, unsigned int prep)
553 struct exynos_mipi_dsim *mipi_dsim =
554 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
555 unsigned int reg = (readl(&mipi_dsim->pllctrl)) &
556 ~(0x7 << DSIM_PRECTRL_SHIFT);
558 reg |= ((prep & 0x7) << DSIM_PRECTRL_SHIFT);
560 writel(reg, &mipi_dsim->pllctrl);
563 void exynos_mipi_dsi_clear_interrupt(struct mipi_dsim_device *dsim)
565 struct exynos_mipi_dsim *mipi_dsim =
566 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
567 unsigned int reg = readl(&mipi_dsim->intsrc);
569 reg |= INTSRC_PLL_STABLE;
571 writel(reg, &mipi_dsim->intsrc);
574 void exynos_mipi_dsi_clear_all_interrupt(struct mipi_dsim_device *dsim)
576 struct exynos_mipi_dsim *mipi_dsim =
577 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
579 writel(0xffffffff, &mipi_dsim->intsrc);
582 unsigned int exynos_mipi_dsi_is_pll_stable(struct mipi_dsim_device *dsim)
585 struct exynos_mipi_dsim *mipi_dsim =
586 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
588 reg = readl(&mipi_dsim->status);
590 return reg & DSIM_PLL_STABLE ? 1 : 0;
593 unsigned int exynos_mipi_dsi_get_fifo_state(struct mipi_dsim_device *dsim)
595 struct exynos_mipi_dsim *mipi_dsim =
596 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
598 return readl(&mipi_dsim->fifoctrl) & ~(0x1f);
601 void exynos_mipi_dsi_wr_tx_header(struct mipi_dsim_device *dsim,
602 unsigned int di, const unsigned char data0, const unsigned char data1)
604 struct exynos_mipi_dsim *mipi_dsim =
605 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
606 unsigned int reg = (DSIM_PKTHDR_DAT1(data1) | DSIM_PKTHDR_DAT0(data0) |
609 writel(reg, &mipi_dsim->pkthdr);
612 unsigned int _exynos_mipi_dsi_get_frame_done_status(struct mipi_dsim_device
615 struct exynos_mipi_dsim *mipi_dsim =
616 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
617 unsigned int reg = readl(&mipi_dsim->intsrc);
619 return (reg & INTSRC_FRAME_DONE) ? 1 : 0;
622 void _exynos_mipi_dsi_clear_frame_done(struct mipi_dsim_device *dsim)
624 struct exynos_mipi_dsim *mipi_dsim =
625 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
626 unsigned int reg = readl(&mipi_dsim->intsrc);
628 writel(reg | INTSRC_FRAME_DONE, &mipi_dsim->intsrc);
631 void exynos_mipi_dsi_wr_tx_data(struct mipi_dsim_device *dsim,
632 unsigned int tx_data)
634 struct exynos_mipi_dsim *mipi_dsim =
635 (struct exynos_mipi_dsim *)samsung_get_base_mipi_dsim();
637 writel(tx_data, &mipi_dsim->payload);